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git.ipfire.org Git - thirdparty/binutils-gdb.git/blob - sim/mn10300/op_utils.c
2 #include "sim-syscall.h"
14 #include <sys/times.h>
19 #define REG0(X) ((X) & 0x3)
20 #define REG1(X) (((X) & 0xc) >> 2)
21 #define REG0_4(X) (((X) & 0x30) >> 4)
22 #define REG0_8(X) (((X) & 0x300) >> 8)
23 #define REG1_8(X) (((X) & 0xc00) >> 10)
24 #define REG0_16(X) (((X) & 0x30000) >> 16)
25 #define REG1_16(X) (((X) & 0xc0000) >> 18)
28 INLINE_SIM_MAIN (void)
29 genericAdd(unsigned32 source
, unsigned32 destReg
)
34 dest
= State
.regs
[destReg
];
36 State
.regs
[destReg
] = sum
;
39 n
= (sum
& 0x80000000);
40 c
= (sum
< source
) || (sum
< dest
);
41 v
= ((dest
& 0x80000000) == (source
& 0x80000000)
42 && (dest
& 0x80000000) != (sum
& 0x80000000));
44 PSW
&= ~(PSW_Z
| PSW_N
| PSW_C
| PSW_V
);
45 PSW
|= ((z
? PSW_Z
: 0) | ( n
? PSW_N
: 0)
46 | (c
? PSW_C
: 0) | (v
? PSW_V
: 0));
52 INLINE_SIM_MAIN (void)
53 genericSub(unsigned32 source
, unsigned32 destReg
)
56 unsigned32 dest
, difference
;
58 dest
= State
.regs
[destReg
];
59 difference
= dest
- source
;
60 State
.regs
[destReg
] = difference
;
62 z
= (difference
== 0);
63 n
= (difference
& 0x80000000);
65 v
= ((dest
& 0x80000000) != (source
& 0x80000000)
66 && (dest
& 0x80000000) != (difference
& 0x80000000));
68 PSW
&= ~(PSW_Z
| PSW_N
| PSW_C
| PSW_V
);
69 PSW
|= ((z
? PSW_Z
: 0) | ( n
? PSW_N
: 0)
70 | (c
? PSW_C
: 0) | (v
? PSW_V
: 0));
73 INLINE_SIM_MAIN (void)
74 genericCmp(unsigned32 leftOpnd
, unsigned32 rightOpnd
)
79 value
= rightOpnd
- leftOpnd
;
82 n
= (value
& 0x80000000);
83 c
= (leftOpnd
> rightOpnd
);
84 v
= ((rightOpnd
& 0x80000000) != (leftOpnd
& 0x80000000)
85 && (rightOpnd
& 0x80000000) != (value
& 0x80000000));
87 PSW
&= ~(PSW_Z
| PSW_N
| PSW_C
| PSW_V
);
88 PSW
|= ((z
? PSW_Z
: 0) | ( n
? PSW_N
: 0)
89 | (c
? PSW_C
: 0) | (v
? PSW_V
: 0));
93 INLINE_SIM_MAIN (void)
94 genericOr(unsigned32 source
, unsigned32 destReg
)
98 State
.regs
[destReg
] |= source
;
99 z
= (State
.regs
[destReg
] == 0);
100 n
= (State
.regs
[destReg
] & 0x80000000) != 0;
101 PSW
&= ~(PSW_Z
| PSW_N
| PSW_C
| PSW_V
);
102 PSW
|= ((z
? PSW_Z
: 0) | (n
? PSW_N
: 0));
106 INLINE_SIM_MAIN (void)
107 genericXor(unsigned32 source
, unsigned32 destReg
)
111 State
.regs
[destReg
] ^= source
;
112 z
= (State
.regs
[destReg
] == 0);
113 n
= (State
.regs
[destReg
] & 0x80000000) != 0;
114 PSW
&= ~(PSW_Z
| PSW_N
| PSW_C
| PSW_V
);
115 PSW
|= ((z
? PSW_Z
: 0) | (n
? PSW_N
: 0));
119 INLINE_SIM_MAIN (void)
120 genericBtst(unsigned32 leftOpnd
, unsigned32 rightOpnd
)
127 n
= (temp
& 0x80000000) != 0;
129 PSW
&= ~(PSW_Z
| PSW_N
| PSW_C
| PSW_V
);
130 PSW
|= (z
? PSW_Z
: 0) | (n
? PSW_N
: 0);
134 INLINE_SIM_MAIN (void)
137 /* Registers passed to trap 0. */
139 /* Function number. */
140 reg_t func
= State
.regs
[0];
142 reg_t parm1
= State
.regs
[1];
143 reg_t parm2
= load_word (State
.regs
[REG_SP
] + 12);
144 reg_t parm3
= load_word (State
.regs
[REG_SP
] + 16);
145 reg_t parm4
= load_word (State
.regs
[REG_SP
] + 20);
147 /* We use this for simulated system calls; we may need to change
148 it to a reserved instruction if we conflict with uses at
150 int save_errno
= errno
;
153 if (func
== TARGET_SYS_exit
)
155 /* EXIT - caller can look in parm1 to work out the reason */
156 sim_engine_halt (simulator
, STATE_CPU (simulator
, 0), NULL
, PC
,
157 (parm1
== 0xdead ? SIM_SIGABRT
: sim_exited
), parm1
);
161 long result
, result2
;
164 sim_syscall_multi (STATE_CPU (simulator
, 0), func
, parm1
, parm2
,
165 parm3
, parm4
, &result
, &result2
, &errcode
);
167 /* Registers set by trap 0. */
168 State
.regs
[0] = errcode
;
169 State
.regs
[1] = result
;