1 /* This file is part of the program psim.
3 Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 3 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, see <http://www.gnu.org/licenses/>.
36 /* current instruction address */
37 unsigned_word program_counter
;
40 core
*physical
; /* all of memory */
42 vm_instruction_map
*instruction_map
; /* instructions */
43 vm_data_map
*data_map
; /* data */
45 /* the system this processor is contained within */
47 os_emul
*os_emulation
;
52 /* Current CPU model information */
53 model_data
*model_ptr
;
55 #if WITH_IDECODE_CACHE_SIZE
56 /* a cache to store cracked instructions */
57 idecode_cache icache
[WITH_IDECODE_CACHE_SIZE
];
60 /* any interrupt state */
63 /* address reservation: keep the physical address and the contents
64 of memory at that address */
65 memory_reservation reservation
;
67 /* offset from event time to this cpu's idea of the local time */
68 signed64 time_base_local_time
;
69 signed64 decrementer_local_time
;
70 event_entry_tag decrementer_event
;
76 cpu_create(psim
*system
,
79 os_emul
*os_emulation
,
82 cpu
*processor
= ZALLOC(cpu
);
84 /* create the virtual memory map from the core */
85 processor
->physical
= memory
;
86 processor
->virtual = vm_create(memory
);
87 processor
->instruction_map
= vm_create_instruction_map(processor
->virtual);
88 processor
->data_map
= vm_create_data_map(processor
->virtual);
90 if (CURRENT_MODEL_ISSUE
> 0)
91 processor
->model_ptr
= model_create (processor
);
93 /* link back to core system */
94 processor
->system
= system
;
95 processor
->events
= psim_event_queue(system
);
96 processor
->cpu_nr
= cpu_nr
;
97 processor
->monitor
= monitor
;
98 processor
->os_emulation
= os_emulation
;
106 cpu_init(cpu
*processor
)
108 memset(&processor
->regs
, 0, sizeof(processor
->regs
));
109 /* vm init is delayed until after the device tree has been init as
110 the devices may further init the cpu */
111 if (CURRENT_MODEL_ISSUE
> 0)
112 model_init (processor
->model_ptr
);
116 /* find ones way home */
120 cpu_system(cpu
*processor
)
122 return processor
->system
;
127 cpu_nr(cpu
*processor
)
129 return processor
->cpu_nr
;
134 cpu_monitor(cpu
*processor
)
136 return processor
->monitor
;
141 cpu_os_emulation(cpu
*processor
)
143 return processor
->os_emulation
;
148 cpu_model(cpu
*processor
)
150 return processor
->model_ptr
;
154 /* program counter manipulation */
158 cpu_set_program_counter(cpu
*processor
,
159 unsigned_word new_program_counter
)
161 processor
->program_counter
= new_program_counter
;
166 cpu_get_program_counter(cpu
*processor
)
168 return processor
->program_counter
;
174 cpu_restart(cpu
*processor
,
177 ASSERT(processor
!= NULL
);
178 cpu_set_program_counter(processor
, nia
);
179 psim_restart(processor
->system
, processor
->cpu_nr
);
184 cpu_halt(cpu
*processor
,
189 ASSERT(processor
!= NULL
);
190 if (CURRENT_MODEL_ISSUE
> 0)
191 model_halt(processor
->model_ptr
);
192 cpu_set_program_counter(processor
, nia
);
193 psim_halt(processor
->system
, processor
->cpu_nr
, reason
, signal
);
198 cpu_error(cpu
*processor
,
206 /* format the message */
208 vsprintf(message
, fmt
, ap
);
212 if (strlen(message
) >= sizeof(message
))
213 error("cpu_error: buffer overflow");
215 if (processor
!= NULL
) {
216 printf_filtered("cpu %d, cia 0x%lx: %s\n",
217 processor
->cpu_nr
+ 1, (unsigned long)cia
, message
);
218 cpu_halt(processor
, cia
, was_signalled
, -1);
221 error("cpu: %s", message
);
226 /* The processors local concept of time */
230 cpu_get_time_base(cpu
*processor
)
232 return (event_queue_time(processor
->events
)
233 - processor
->time_base_local_time
);
238 cpu_set_time_base(cpu
*processor
,
241 processor
->time_base_local_time
= (event_queue_time(processor
->events
)
247 cpu_get_decrementer(cpu
*processor
)
249 return (processor
->decrementer_local_time
250 - event_queue_time(processor
->events
));
255 cpu_decrement_event(void *data
)
257 cpu
*processor
= (cpu
*)data
;
258 processor
->decrementer_event
= NULL
;
259 decrementer_interrupt(processor
);
264 cpu_set_decrementer(cpu
*processor
,
265 signed32 decrementer
)
267 signed64 old_decrementer
= cpu_get_decrementer(processor
);
268 event_queue_deschedule(processor
->events
, processor
->decrementer_event
);
269 processor
->decrementer_event
= NULL
;
270 processor
->decrementer_local_time
= (event_queue_time(processor
->events
)
272 if (decrementer
< 0 && old_decrementer
>= 0)
273 /* A decrementer interrupt occures if the sign of the decrement
274 register is changed from positive to negative by the load
276 decrementer_interrupt(processor
);
277 else if (decrementer
>= 0)
278 processor
->decrementer_event
= event_queue_schedule(processor
->events
,
285 #if WITH_IDECODE_CACHE_SIZE
286 /* allow access to the cpu's instruction cache */
289 cpu_icache_entry(cpu
*processor
,
292 return &processor
->icache
[cia
/ 4 % WITH_IDECODE_CACHE_SIZE
];
298 cpu_flush_icache(cpu
*processor
)
301 /* force all addresses to 0xff... so that they never hit */
302 for (i
= 0; i
< WITH_IDECODE_CACHE_SIZE
; i
++)
303 processor
->icache
[i
].address
= MASK(0, 63);
308 /* address map revelation */
311 (vm_instruction_map
*)
312 cpu_instruction_map(cpu
*processor
)
314 return processor
->instruction_map
;
319 cpu_data_map(cpu
*processor
)
321 return processor
->data_map
;
326 cpu_page_tlb_invalidate_entry(cpu
*processor
,
329 vm_page_tlb_invalidate_entry(processor
->virtual, ea
);
334 cpu_page_tlb_invalidate_all(cpu
*processor
)
336 vm_page_tlb_invalidate_all(processor
->virtual);
340 /* interrupt access */
344 cpu_interrupts(cpu
*processor
)
346 return &processor
->ints
;
351 /* reservation access */
354 (memory_reservation
*)
355 cpu_reservation(cpu
*processor
)
357 return &processor
->reservation
;
361 /* register access */
365 cpu_registers(cpu
*processor
)
367 return &processor
->regs
;
372 cpu_synchronize_context(cpu
*processor
,
375 #if (WITH_IDECODE_CACHE_SIZE)
376 /* kill of the cache */
377 cpu_flush_icache(processor
);
380 /* update virtual memory */
381 vm_synchronize_context(processor
->virtual,
389 /* might again be useful one day */
393 cpu_print_info(cpu
*processor
, int verbose
)