sim/testsuite/pru/carry.s

   1 # Check that carry for addition and subtraction works.
   2 # mach: pru
   3
   4 # Copyright (C) 2023-2024 Free Software Foundation, Inc.
   5 # Contributed by Dimitar Dimitrov <dimitar@dinux.eu>
   6 #
   7 # This file is part of the GNU simulators.
   8 #
   9 # This program is free software; you can redistribute it and/or modify
  10 # it under the terms of the GNU General Public License as published by
  11 # the Free Software Foundation; either version 3 of the License, or
  12 # (at your option) any later version.
  13 #
  14 # This program is distributed in the hope that it will be useful,
  15 # but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 # GNU General Public License for more details.
  18 #
  19 # You should have received a copy of the GNU General Public License
  20 # along with this program.  If not, see <http://www.gnu.org/licenses/>.
  21
  22 .include "testutils.inc"
  23
  24         # Helper macro to exercise three consecutive
  25         # instructions using the carry bit.
  26         .macro test_seq srcmode, dstmode, init0, init1, init2, init3, alu0, alu1, alu2, expected
  27         # In case srcmode>dstmode, "garbage" in the r20 MSB
  28         # bits could falsely be interpreted as carry.
  29         # So start with initialized destination to make tests consistent.
  30         ldi     r20, 0
  31         ldi32   r15, \init0
  32         ldi32   r16, \init1
  33         ldi32   r17, \init2
  34         ldi32   r18, \init3
  35         ldi32   r0, \expected
  36         \alu0   r20\dstmode, r15\srcmode, r16\srcmode
  37         \alu1   r20\dstmode, r20\srcmode, r17\srcmode
  38         \alu2   r20\dstmode, r20\srcmode, r18\srcmode
  39         qbeq    1f, r0, r20\dstmode
  40         jmp     EXIT_FAIL
  41 1:
  42         .endm
  43
  44         # Helper macro to verify one ALU instruction
  45         # using the carry bit.
  46         .macro test1 alu, dstmode, src0mode, src0init, src1mode, src1init, expected
  47         ldi32   r15, \src0init
  48         ldi32   r16, \src1init
  49         ldi32   r0, \expected
  50         \alu    r20\dstmode, r15\src0mode, r16\src1mode
  51         qbeq    1f, r0, r20\dstmode
  52         jmp     EXIT_FAIL
  53 1:
  54         .endm
  55
  56         start
  57
  58         # ***** ADD 32-bit dst, 32-bit src *****
  59         # {add, clear carry}
  60         test1   add, "   ", "   ", 0x00000000, "   ", 0x00000000, 0x00000000
  61         # {add with carry=0, clear carry}
  62         test1   adc, "   ", "   ", 0x00000000, "   ", 0x00000000, 0x00000000
  63         # {add with carry=0, set carry}
  64         test1   adc, "   ", "   ", 0x00000001, "   ", 0xffffffff, 0x00000000
  65         # {add with carry=1, set carry}
  66         test1   adc, "   ", "   ", 0x00000010, "   ", 0xfffffffe, 0x0000000f
  67         # {add with carry=1, clear carry}
  68         test1   adc, "   ", "   ", 0x00000010, "   ", 0x0ffffffe, 0x1000000f
  69         # {add with carry=0, set carry}
  70         test1   adc, "   ", "   ", 0x00000001, "   ", 0xffffffff, 0x00000000
  71         # {add, set carry}
  72         test1   add, "   ", "   ", 0x00000001, "   ", 0xffffffff, 0x00000000
  73         # {add with carry=1, set carry}
  74         test1   adc, "   ", "   ", 0x00000010, "   ", 0xfffffffe, 0x0000000f
  75
  76         # ***** ADD 32-bit dst, 16-bit src *****
  77         test1   add, "   ", ".w0", 0x00000000, ".w0", 0x00000000, 0x00000000
  78         test1   adc, "   ", ".w0", 0x00000000, ".w0", 0x00000000, 0x00000000
  79         test1   adc, "   ", ".w0", 0x00000003, ".w0", 0xffffffff, 0x00010002
  80         test1   adc, "   ", ".w0", 0x00000010, ".w0", 0x0000fffe, 0x0001000e
  81
  82         # ***** ADD 32-bit dst, 8-bit src *****
  83         test1   add, "   ", ".b0", 0x00000000, ".b0", 0x00000000, 0x00000000
  84         test1   adc, "   ", ".b0", 0x00000000, ".b0", 0x00000000, 0x00000000
  85         test1   adc, "   ", ".b0", 0x00000003, ".b0", 0xffffffff, 0x00000102
  86         test1   adc, "   ", ".b0", 0x00000010, ".b0", 0x0000f0fe, 0x0000010e
  87
  88         # ***** ADD 16-bit dst, 32-bit src *****
  89         test1   add, ".w0", "   ", 0x00000000, "   ", 0x00000000, 0x00000000
  90         test1   adc, ".w0", "   ", 0x00000000, "   ", 0x00000000, 0x00000000
  91         test1   adc, ".w0", "   ", 0x00000001, "   ", 0xfff0ffff, 0x00000000
  92         test1   adc, ".w0", "   ", 0x00000010, "   ", 0x0000fffe, 0x0000000f
  93         test1   adc, ".w0", "   ", 0x00000010, "   ", 0x00000ffe, 0x0000100f
  94         test1   adc, ".w0", "   ", 0x00000001, "   ", 0x0000ffff, 0x00000000
  95         test1   add, ".w0", "   ", 0x00000001, "   ", 0x0000ffff, 0x00000000
  96         test1   adc, ".w0", "   ", 0x00000010, "   ", 0x0000fffe, 0x0000000f
  97         # Test when intermediate sum sets the carry.
  98         test1   add, ".w0", "   ", 0x00010000, "   ", 0x00000000, 0x00000000
  99         test1   adc, ".w0", "   ", 0x00000000, "   ", 0x00000000, 0x00000001
 100         test1   add, ".w0", "   ", 0x00020000, "   ", 0x00000000, 0x00000000
 101         test1   adc, ".w0", "   ", 0x00000000, "   ", 0x00000000, 0x00000000
 102
 103         # ***** ADD 16-bit dst, 16-bit src *****
 104         test1   add, ".w0", ".w0", 0x00000210, ".w0", 0x00000130, 0x00000340
 105         test1   adc, ".w0", ".w0", 0x00000000, ".w0", 0x00000000, 0x00000000
 106         test1   adc, ".w0", ".w0", 0x00000001, ".w0", 0xffffffff, 0x00000000
 107         test1   adc, ".w0", ".w0", 0x00000010, ".w0", 0xfffffffe, 0x0000000f
 108         test1   adc, ".w0", ".w0", 0x00000010, ".w0", 0x00000ffe, 0x0000100f
 109         test1   adc, ".w0", ".w0", 0x00000001, ".w0", 0xfff0ffff, 0x00000000
 110         test1   add, ".w0", ".w0", 0x00000001, ".w0", 0xfff0ffff, 0x00000000
 111         test1   adc, ".w0", ".w0", 0x00000010, ".w0", 0xfff1fffe, 0x0000000f
 112
 113         # ***** ADD 16-bit dst, 8-bit src *****
 114         test1   add, ".w0", ".b0", 0x00000000, ".b0", 0x00000000, 0x00000000
 115         test1   adc, ".w0", ".b0", 0x00000000, ".b0", 0x00000000, 0x00000000
 116         test1   adc, ".w0", ".b0", 0x00000003, ".b0", 0xffffffff, 0x00000102
 117         test1   adc, ".w0", ".b0", 0x00000010, ".b0", 0x0000f0fe, 0x0000010e
 118
 119         # ***** ADD 8-bit dst, 32-bit src *****
 120         test1   add, ".b0", "   ", 0x00000000, "   ", 0x00000000, 0x00000000
 121         test1   adc, ".b0", "   ", 0x00000000, "   ", 0x00000000, 0x00000000
 122         test1   adc, ".b0", "   ", 0x00000001, "   ", 0x000000ff, 0x00000000
 123         test1   adc, ".b0", "   ", 0x00000010, "   ", 0x000000fe, 0x0000000f
 124         test1   adc, ".b0", "   ", 0x00000021, "   ", 0x0000001e, 0x00000040
 125         test1   adc, ".b0", "   ", 0x00000001, "   ", 0x000000ff, 0x00000000
 126         test1   add, ".b0", "   ", 0x00000001, "   ", 0x000000ff, 0x00000000
 127         test1   adc, ".b0", "   ", 0x00000010, "   ", 0x000000fe, 0x0000000f
 128         # Test when intermediate sum sets the carry.
 129         test1   add, ".b0", "   ", 0x10000100, "   ", 0x00000000, 0x00000000
 130         test1   adc, ".b0", "   ", 0x00000000, "   ", 0x00000000, 0x00000001
 131
 132         # ***** ADD 8-bit dst, 16-bit src *****
 133         test1   add, ".b0", ".w0", 0x10000000, ".w0", 0x00000000, 0x00000000
 134         test1   adc, ".b0", ".w0", 0x02000000, ".w0", 0x00000000, 0x00000000
 135         test1   adc, ".b0", ".w0", 0x00030001, ".w0", 0x000000ff, 0x00000000
 136         test1   adc, ".b0", ".w0", 0x00004010, ".w0", 0x000000fe, 0x0000000f
 137         test1   adc, ".b0", ".w0", 0x00000021, ".w0", 0x0000001e, 0x00000040
 138         test1   adc, ".b0", ".w0", 0x00000001, ".w0", 0x000000ff, 0x00000000
 139         test1   add, ".b0", ".w0", 0x00000001, ".w0", 0x000000ff, 0x00000000
 140         test1   adc, ".b0", ".w0", 0x00000010, ".w0", 0x000000fe, 0x0000000f
 141         # Test when intermediate sum sets the carry.
 142         test1   add, ".b0", ".w0", 0x10003100, ".w0", 0x00000000, 0x00000000
 143         test1   adc, ".b0", ".w0", 0x00000000, ".w0", 0x00000000, 0x00000001
 144
 145         # ***** ADD 8-bit dst, 8-bit src  *****
 146         test1   add, ".b0", ".b0", 0x00000210, ".b0", 0x00000130, 0x00000040
 147         test1   adc, ".b0", ".b0", 0x00000000, ".b0", 0x00000000, 0x00000000
 148         test1   adc, ".b0", ".b0", 0x00000001, ".b0", 0xffffffff, 0x00000000
 149         test1   adc, ".b0", ".b0", 0x00000010, ".b0", 0xfffffffe, 0x0000000f
 150         test1   adc, ".b0", ".b0", 0x00000010, ".b0", 0x0000000e, 0x0000001f
 151         test1   adc, ".b0", ".b0", 0x00000001, ".b0", 0xfff0ffff, 0x00000000
 152         test1   add, ".b0", ".b0", 0x00000001, ".b0", 0xfff0ffff, 0x00000000
 153         test1   adc, ".b0", ".b0", 0x00000010, ".b0", 0xfff1fffe, 0x0000000f
 154
 155         # ***** SUB 32-bit dst, 32-bit src *****
 156         # {sub, clear borrow}
 157         test1   sub, "   ", "   ", 0x00000000, "   ", 0x00000000, 0x00000000
 158         # {sub with borrow=0, clear borrow}
 159         test1   suc, "   ", "   ", 0x00000010, "   ", 0x00000001, 0x0000000f
 160         # {sub with borrow=0, set borrow}
 161         test1   suc, "   ", "   ", 0x00000008, "   ", 0x00000009, 0xffffffff
 162         # {sub with borrow=1, set borrow}
 163         test1   suc, "   ", "   ", 0x00000008, "   ", 0x00000009, 0xfffffffe
 164         # {sub with borrow=1, clear borrow}
 165         test1   suc, "   ", "   ", 0x00000008, "   ", 0x00000001, 0x00000006
 166         # {sub with borrow=0, set borrow}
 167         test1   suc, "   ", "   ", 0x80000000, "   ", 0x90000000, 0xf0000000
 168         # {sub, set borrow}
 169         test1   sub, "   ", "   ", 0x00000000, "   ", 0x00000001, 0xffffffff
 170         # {sub with borrow=1, set borrow}
 171         test1   suc, "   ", "   ", 0x80000000, "   ", 0x90000000, 0xefffffff
 172
 173         # ***** SUB 32-bit dst, 16-bit src *****
 174         test1   sub, "   ", ".w0", 0x00000000, ".w0", 0x00000000, 0x00000000
 175         test1   suc, "   ", ".w0", 0x00000010, ".w0", 0x00000001, 0x0000000f
 176         test1   suc, "   ", ".w0", 0x00000008, ".w0", 0x00000009, 0xffffffff
 177         test1   suc, "   ", ".w0", 0x00000008, ".w0", 0x00000009, 0xfffffffe
 178         test1   suc, "   ", ".w0", 0x00000008, ".w0", 0x00000001, 0x00000006
 179         test1   suc, "   ", ".w0", 0x00108000, ".w0", 0x00009000, 0xfffff000
 180         test1   sub, "   ", ".w0", 0x00000000, ".w0", 0x00000001, 0xffffffff
 181         test1   suc, "   ", ".w0", 0x00008000, ".w0", 0x00009000, 0xffffefff
 182
 183         # ***** SUB 32-bit dst, 8-bit src *****
 184         test1   sub, "   ", ".b0", 0x00000000, ".b0", 0x00000000, 0x00000000
 185         test1   suc, "   ", ".b0", 0x00000010, ".b0", 0x00000001, 0x0000000f
 186         test1   suc, "   ", ".b0", 0x00000008, ".b0", 0x00000009, 0xffffffff
 187         test1   suc, "   ", ".b0", 0x00000008, ".b0", 0x00000009, 0xfffffffe
 188         test1   suc, "   ", ".b0", 0x00000008, ".b0", 0x00000001, 0x00000006
 189         test1   suc, "   ", ".b0", 0x00108080, ".b0", 0x00009090, 0xfffffff0
 190         test1   sub, "   ", ".b0", 0x00000000, ".b0", 0x00000001, 0xffffffff
 191         test1   suc, "   ", ".b0", 0x00008080, ".b0", 0x00009090, 0xffffffef
 192
 193         # ***** SUB 16-bit dst, 32-bit src *****
 194         test1   sub, ".w0", "   ", 0x00000000, "   ", 0x00000000, 0x00000000
 195         test1   suc, ".w0", "   ", 0x00000010, "   ", 0x00000001, 0x0000000f
 196         test1   suc, ".w0", "   ", 0x00000008, "   ", 0x00000009, 0x0000ffff
 197         test1   suc, ".w0", "   ", 0x00000008, "   ", 0x00000009, 0x0000fffe
 198         test1   suc, ".w0", "   ", 0x00000008, "   ", 0x00000001, 0x00000006
 199         test1   suc, ".w0", "   ", 0x00108000, "   ", 0x00009000, 0x0000f000
 200         test1   sub, ".w0", "   ", 0x00000000, "   ", 0x00000001, 0x0000ffff
 201         test1   suc, ".w0", "   ", 0x00008000, "   ", 0x00009000, 0x0000efff
 202         # Test when intermediate value sets the borrow.
 203         test1   sub, ".w0", "   ", 0x00010000, "   ", 0x00000000, 0x00000000
 204         test1   suc, ".w0", "   ", 0x00000002, "   ", 0x00000000, 0x00000001
 205
 206         # ***** SUB 16-bit dst, 16-bit src *****
 207         test1   sub, ".w0", ".w0", 0x00000000, ".w0", 0x00000000, 0x00000000
 208         test1   suc, ".w0", ".w0", 0x00000010, ".w0", 0x00000001, 0x0000000f
 209         test1   suc, ".w0", ".w0", 0x00000008, ".w0", 0x00000009, 0x0000ffff
 210         test1   suc, ".w0", ".w0", 0x00000008, ".w0", 0x00000009, 0x0000fffe
 211         test1   suc, ".w0", ".w0", 0x00000008, ".w0", 0x00000001, 0x00000006
 212         test1   suc, ".w0", ".w0", 0x00108000, ".w0", 0x00009000, 0x0000f000
 213         test1   sub, ".w0", ".w0", 0x00000000, ".w0", 0x00000001, 0x0000ffff
 214         test1   suc, ".w0", ".w0", 0x00008000, ".w0", 0x00009000, 0x0000efff
 215
 216         # ***** SUB 16-bit dst, 8-bit src *****
 217         test1   sub, ".w0", ".b0", 0x00000000, ".b0", 0x00000000, 0x00000000
 218         test1   suc, ".w0", ".b0", 0x00000010, ".b0", 0x00000001, 0x0000000f
 219         test1   suc, ".w0", ".b0", 0x00000008, ".b0", 0x00000009, 0x0000ffff
 220         test1   suc, ".w0", ".b0", 0x00000008, ".b0", 0x00000009, 0x0000fffe
 221         test1   suc, ".w0", ".b0", 0x00000008, ".b0", 0x00000001, 0x00000006
 222         test1   suc, ".w0", ".b0", 0x00108080, ".b0", 0x00009090, 0x0000fff0
 223         test1   sub, ".w0", ".b0", 0x00000000, ".b0", 0x00000001, 0x0000ffff
 224         test1   suc, ".w0", ".b0", 0x0000a080, ".b0", 0x0000c090, 0x0000ffef
 225
 226         # ***** SUB 8-bit dst, 32-bit src *****
 227         test1   sub, ".b0", "   ", 0x00000000, "   ", 0x00000000, 0x00000000
 228         test1   suc, ".b0", "   ", 0x00000010, "   ", 0x00000001, 0x0000000f
 229         test1   suc, ".b0", "   ", 0x00000008, "   ", 0x00000009, 0x000000ff
 230         test1   suc, ".b0", "   ", 0x00000008, "   ", 0x00000009, 0x000000fe
 231         test1   suc, ".b0", "   ", 0x00000008, "   ", 0x00000001, 0x00000006
 232         test1   suc, ".b0", "   ", 0x00000080, "   ", 0x00000090, 0x000000f0
 233         test1   sub, ".b0", "   ", 0x00000000, "   ", 0x00000001, 0x000000ff
 234         test1   suc, ".b0", "   ", 0x00000080, "   ", 0x00000090, 0x000000ef
 235         # Test when intermediate value sets the borrow.
 236         test1   sub, ".b0", "   ", 0x00000100, "   ", 0x00000000, 0x00000000
 237         test1   suc, ".b0", "   ", 0x00000002, "   ", 0x00000000, 0x00000001
 238         test1   sub, ".b0", "   ", 0x00000100, "   ", 0x00000000, 0x00000000
 239         test1   rsc, ".b0", "   ", 0x00000000, "   ", 0x00000002, 0x00000001
 240
 241         # ***** SUB 8-bit dst, 16-bit src *****
 242         test1   sub, ".b0", ".w0", 0x00000000, ".w0", 0x00000000, 0x00000000
 243         test1   suc, ".b0", ".w0", 0x00000010, ".w0", 0x00000001, 0x0000000f
 244         test1   suc, ".b0", ".w0", 0x00000008, ".w0", 0x00000009, 0x000000ff
 245         test1   suc, ".b0", ".w0", 0x00000008, ".w0", 0x00000009, 0x000000fe
 246         test1   suc, ".b0", ".w0", 0x00000008, ".w0", 0x00000001, 0x00000006
 247         test1   suc, ".b0", ".w0", 0x00000080, ".w0", 0x00000090, 0x000000f0
 248         test1   sub, ".b0", ".w0", 0x00000000, ".w0", 0x00000001, 0x000000ff
 249         test1   suc, ".b0", ".w0", 0x00000080, ".w0", 0x00000090, 0x000000ef
 250         # Test when intermediate value sets the borrow.
 251         test1   sub, ".b0", ".w0", 0x00000100, ".w0", 0x00000000, 0x00000000
 252         test1   suc, ".b0", ".w0", 0x00000002, ".w0", 0x00000000, 0x00000001
 253         test1   sub, ".b0", ".w0", 0x00000100, ".w0", 0x00000000, 0x00000000
 254         test1   rsc, ".b0", ".w0", 0x00000000, ".w0", 0x00000002, 0x00000001
 255
 256         # ***** SUB 8-bit dst, 8-bit src *****
 257         test1   sub, ".b0", ".w0", 0x00000000, ".w0", 0x00000000, 0x00000000
 258         test1   suc, ".b0", ".w0", 0x00000010, ".w0", 0x00000001, 0x0000000f
 259         test1   suc, ".b0", ".w0", 0x00000008, ".w0", 0x00000009, 0x000000ff
 260         test1   suc, ".b0", ".w0", 0x00000008, ".w0", 0x00000009, 0x000000fe
 261         test1   suc, ".b0", ".w0", 0x00000008, ".w0", 0x00000001, 0x00000006
 262         test1   suc, ".b0", ".w0", 0x00000080, ".w0", 0x00000090, 0x000000f0
 263         test1   sub, ".b0", ".w0", 0x00000000, ".w0", 0x00000001, 0x000000ff
 264         test1   suc, ".b0", ".w0", 0x00000080, ".w0", 0x00000090, 0x000000ef
 265
 266         # ***** Reverse SUB 32-bit dst, 32-bit src *****
 267         # {rsb, clear borrow}
 268         test1   rsb, "   ", "   ", 0x00000000, "   ", 0x00000000, 0x00000000
 269         # {rsb with borrow=0, clear borrow}
 270         test1   rsc, "   ", "   ", 0x00000001, "   ", 0x00000010, 0x0000000f
 271         # {rsb with borrow=0, set borrow}
 272         test1   rsc, "   ", "   ", 0x00000009, "   ", 0x00000008, 0xffffffff
 273         # {rsb with borrow=1, set borrow}
 274         test1   rsc, "   ", "   ", 0x00000009, "   ", 0x00000008, 0xfffffffe
 275         # {rsb with borrow=1, clear borrow}
 276         test1   rsc, "   ", "   ", 0x00000001, "   ", 0x00000008, 0x00000006
 277         # {rsb with borrow=0, set borrow}
 278         test1   rsc, "   ", "   ", 0x90000000, "   ", 0x80000000, 0xf0000000
 279         # {rsb, set borrow}
 280         test1   rsb, "   ", "   ", 0x00000001, "   ", 0x00000000, 0xffffffff
 281         # {rsb with borrow=1, set borrow}
 282         test1   rsc, "   ", "   ", 0x90000000, "   ", 0x80000000, 0xefffffff
 283
 284         # ***** Reverse SUB 32-bit dst, 16-bit src *****
 285         test1   rsb, "   ", ".w0", 0x00000000, ".w0", 0x00000000, 0x00000000
 286         test1   rsc, "   ", ".w0", 0x00000001, ".w0", 0x00000010, 0x0000000f
 287         test1   rsc, "   ", ".w0", 0x00000009, ".w0", 0x00000008, 0xffffffff
 288         test1   rsc, "   ", ".w0", 0x00000009, ".w0", 0x00000008, 0xfffffffe
 289         test1   rsc, "   ", ".w0", 0x00000001, ".w0", 0x00000008, 0x00000006
 290         test1   rsc, "   ", ".w0", 0x00109000, ".w0", 0x00008000, 0xfffff000
 291         test1   rsb, "   ", ".w0", 0x00000001, ".w0", 0x00000000, 0xffffffff
 292         test1   rsc, "   ", ".w0", 0x00009000, ".w0", 0x00008000, 0xffffefff
 293
 294         # ***** Reverse SUB 32-bit dst, 8-bit src *****
 295         test1   rsb, "   ", ".b0", 0x00000000, ".b0", 0x00000000, 0x00000000
 296         test1   rsc, "   ", ".b0", 0x00000001, ".b0", 0x00000010, 0x0000000f
 297         test1   rsc, "   ", ".b0", 0x00000009, ".b0", 0x00000008, 0xffffffff
 298         test1   rsc, "   ", ".b0", 0x00000009, ".b0", 0x00000008, 0xfffffffe
 299         test1   rsc, "   ", ".b0", 0x00000001, ".b0", 0x00000008, 0x00000006
 300         test1   rsc, "   ", ".b0", 0x00108090, ".b0", 0x00009080, 0xfffffff0
 301         test1   rsb, "   ", ".b0", 0x00000001, ".b0", 0x00000000, 0xffffffff
 302         test1   rsc, "   ", ".b0", 0x00008090, ".b0", 0x00009080, 0xffffffef
 303
 304         # ***** Reverse SUB 16-bit dst, 32-bit src *****
 305         test1   rsb, ".w0", "   ", 0x00000000, "   ", 0x00000000, 0x00000000
 306         test1   rsc, ".w0", "   ", 0x00000001, "   ", 0x00000010, 0x0000000f
 307         test1   rsc, ".w0", "   ", 0x00000009, "   ", 0x00000008, 0x0000ffff
 308         test1   rsc, ".w0", "   ", 0x00000009, "   ", 0x00000008, 0x0000fffe
 309         test1   rsc, ".w0", "   ", 0x00000001, "   ", 0x00000008, 0x00000006
 310         test1   rsc, ".w0", "   ", 0x00109000, "   ", 0x00008000, 0x0000f000
 311         test1   rsb, ".w0", "   ", 0x00000001, "   ", 0x00000000, 0x0000ffff
 312         test1   rsc, ".w0", "   ", 0x00009000, "   ", 0x00008000, 0x0000efff
 313         # Test when intermediate value sets the borrow.
 314         test1   rsb, ".w0", "   ", 0x00000000, "   ", 0x00010000, 0x00000000
 315         test1   rsc, ".w0", "   ", 0x00000000, "   ", 0x00000002, 0x00000001
 316
 317         # ***** Reverse SUB 16-bit dst, 16-bit src *****
 318         test1   rsb, ".w0", ".w0", 0x00000000, ".w0", 0x00000000, 0x00000000
 319         test1   rsc, ".w0", ".w0", 0x00000001, ".w0", 0x00000010, 0x0000000f
 320         test1   rsc, ".w0", ".w0", 0x00000009, ".w0", 0x00000008, 0x0000ffff
 321         test1   rsc, ".w0", ".w0", 0x00000009, ".w0", 0x00000008, 0x0000fffe
 322         test1   rsc, ".w0", ".w0", 0x00000001, ".w0", 0x00000008, 0x00000006
 323         test1   rsc, ".w0", ".w0", 0x00109000, ".w0", 0x00008000, 0x0000f000
 324         test1   rsb, ".w0", ".w0", 0x00000001, ".w0", 0x00000000, 0x0000ffff
 325         test1   rsc, ".w0", ".w0", 0x00009000, ".w0", 0x00008000, 0x0000efff
 326
 327         # ***** Reverse SUB 16-bit dst, 8-bit src *****
 328         test1   rsb, ".w0", ".b0", 0x00000000, ".b0", 0x00000000, 0x00000000
 329         test1   rsc, ".w0", ".b0", 0x00000001, ".b0", 0x00000010, 0x0000000f
 330         test1   rsc, ".w0", ".b0", 0x00000009, ".b0", 0x00000008, 0x0000ffff
 331         test1   rsc, ".w0", ".b0", 0x00000009, ".b0", 0x00000008, 0x0000fffe
 332         test1   rsc, ".w0", ".b0", 0x00000001, ".b0", 0x00000008, 0x00000006
 333         test1   rsc, ".w0", ".b0", 0x00108090, ".b0", 0x00009080, 0x0000fff0
 334         test1   rsb, ".w0", ".b0", 0x00000001, ".b0", 0x00000000, 0x0000ffff
 335         test1   rsc, ".w0", ".b0", 0x0000a090, ".b0", 0x0000c080, 0x0000ffef
 336
 337         # ***** Reverse SUB 8-bit dst, 32-bit src *****
 338         test1   rsb, ".b0", "   ", 0x00000000, "   ", 0x00000000, 0x00000000
 339         test1   rsc, ".b0", "   ", 0x00000001, "   ", 0x00000010, 0x0000000f
 340         test1   rsc, ".b0", "   ", 0x00000009, "   ", 0x00000008, 0x000000ff
 341         test1   rsc, ".b0", "   ", 0x00000009, "   ", 0x00000008, 0x000000fe
 342         test1   rsc, ".b0", "   ", 0x00000001, "   ", 0x00000008, 0x00000006
 343         test1   rsc, ".b0", "   ", 0x00000090, "   ", 0x00000080, 0x000000f0
 344         test1   rsb, ".b0", "   ", 0x00000001, "   ", 0x00000000, 0x000000ff
 345         test1   rsc, ".b0", "   ", 0x00000090, "   ", 0x00000080, 0x000000ef
 346         # Test when intermediate value sets the borrow.
 347         test1   rsb, ".b0", "   ", 0x00000000, "   ", 0x00000100, 0x00000000
 348         test1   rsc, ".b0", "   ", 0x00000000, "   ", 0x00000002, 0x00000001
 349         test1   rsb, ".b0", "   ", 0x00000000, "   ", 0x00000100, 0x00000000
 350         test1   suc, ".b0", "   ", 0x00000002, "   ", 0x00000000, 0x00000001
 351
 352         # ***** Reverse SUB 8-bit dst, 16-bit src *****
 353         test1   rsb, ".b0", ".w0", 0x00000000, ".w0", 0x00000000, 0x00000000
 354         test1   rsc, ".b0", ".w0", 0x00000001, ".w0", 0x00000010, 0x0000000f
 355         test1   rsc, ".b0", ".w0", 0x00000009, ".w0", 0x00000008, 0x000000ff
 356         test1   rsc, ".b0", ".w0", 0x00000009, ".w0", 0x00000008, 0x000000fe
 357         test1   rsc, ".b0", ".w0", 0x00000001, ".w0", 0x00000008, 0x00000006
 358         test1   rsc, ".b0", ".w0", 0x00000090, ".w0", 0x00000080, 0x000000f0
 359         test1   rsb, ".b0", ".w0", 0x00000001, ".w0", 0x00000000, 0x000000ff
 360         test1   rsc, ".b0", ".w0", 0x00000090, ".w0", 0x00000080, 0x000000ef
 361         # Test when intermediate value sets the borrow.
 362         test1   rsb, ".b0", ".w0", 0x00000000, ".w0", 0x00000100, 0x00000000
 363         test1   rsc, ".b0", ".w0", 0x00000000, ".w0", 0x00000002, 0x00000001
 364         test1   rsb, ".b0", ".w0", 0x00000000, ".w0", 0x00000100, 0x00000000
 365         test1   suc, ".b0", ".w0", 0x00000002, ".w0", 0x00000000, 0x00000001
 366
 367         # ***** Reverse SUB 8-bit dst, 8-bit src *****
 368         test1   rsb, ".b0", ".w0", 0x00000000, ".w0", 0x00000000, 0x00000000
 369         test1   rsc, ".b0", ".w0", 0x00000001, ".w0", 0x00000010, 0x0000000f
 370         test1   rsc, ".b0", ".w0", 0x00000009, ".w0", 0x00000008, 0x000000ff
 371         test1   rsc, ".b0", ".w0", 0x00000009, ".w0", 0x00000008, 0x000000fe
 372         test1   rsc, ".b0", ".w0", 0x00000001, ".w0", 0x00000008, 0x00000006
 373         test1   rsc, ".b0", ".w0", 0x00000090, ".w0", 0x00000080, 0x000000f0
 374         test1   rsb, ".b0", ".w0", 0x00000001, ".w0", 0x00000000, 0x000000ff
 375         test1   rsc, ".b0", ".w0", 0x00000090, ".w0", 0x00000080, 0x000000ef
 376
 377         # ***** Mixed 32-bit *****
 378         test1   sub, "   ", " ", 0x00000000, " ", 0x00000000, 0x00000000
 379         test1   adc, "   ", " ", 0x00000000, " ", 0x00000000, 0x00000001
 380         test1   suc, "   ", " ", 0x00000001, " ", 0x00000001, 0xffffffff
 381         test1   adc, "   ", " ", 0x00000001, " ", 0x00000000, 0x00000001
 382
 383         test_seq "", "", 0xffffffff, 0x00000001, 0x00000000, 0x00000000 add, suc, add, 0x00000000
 384         test_seq "", "", 0xffffffff, 0x00000001, 0x00000000, 0x00000000 add, rsc, add, 0x00000000
 385         test_seq "", "", 0xfffffffe, 0x00000001, 0x00000000, 0x00000000 add, suc, add, 0xfffffffe
 386         test_seq "", "", 0xffffffff, 0x00000001, 0x00000000, 0x00000000 add, suc, adc, 0x00000001
 387         test_seq "", "", 0xfffffffe, 0x00000001, 0x00000000, 0x00000000 add, suc, adc, 0xffffffff
 388
 389         test_seq "", "", 0xffffffff, 0x00000010, 0x00000000, 0x00000000 sub, adc, add, 0xfffffff0
 390         test_seq "", "", 0x0fffffff, 0x00000010, 0x00000000, 0x00000000 sub, adc, add, 0x0ffffff0
 391         test_seq "", "", 0x00000000, 0x00000010, 0x00000000, 0x00000000 sub, adc, add, 0xfffffff0
 392         test_seq "", "", 0x00000000, 0x00000010, 0x00000000, 0x00000000 sub, adc, adc, 0xfffffff0
 393         test_seq "", "", 0x00000000, 0x00000010, 0x00000000, 0x00000000 sub, adc, suc, 0xffffffef
 394
 395
 396         # For coverage, also test sequences of ALU instructions
 397         # (i.e. no other instructions in between).
 398         test_seq "", "", 0x00000000, 0x00000000, 0x00000000, 0x00000000 add, adc, adc, 0x00000000
 399         test_seq "", "", 0x80000000, 0xfffffff0, 0xc0000000, 0x0000001a add, adc, adc, 0x4000000c
 400         test_seq "", ".b0", 0x00000000, 0x00000001, 0x000000ff, 0x00000000 add, adc, adc, 0x00000001
 401         test_seq "", ".b0", 0x00000000, 0x00000001, 0x000000ff, 0x00000000 add, adc, adc, 0x00000001
 402         test_seq ".b0", ".b0", 0x00000000, 0x00000001, 0x00000000, 0x0000ffff add, adc, adc, 0x00000000
 403         test_seq ".b0", ".w0", 0x00000001, 0x00000020, 0x00000400, 0x00008000 add, adc, adc, 0x00000021
 404         test_seq "", "", 0x00000010, 0x0000000f, 0x00000002, 0x00000020 sub, suc, suc, 0xffffffde
 405         test_seq "", ".b0", 0x00000202, 0x00000000, 0x00000000, 0x00000000 sub, suc, suc, 0x00000002
 406         test_seq ".w0", ".b0", 0x00000008, 0x00000000, 0x00000000, 0x00000000, sub, suc, suc, 0x00000008
 407         test_seq ".w0", ".b0", 0x00000008, 0x000000ff, 0x000000ff, 0x000000ff, sub, suc, suc, 0x00000009
 408         test_seq ".w0", ".b0", 0x00000008, 0x00000fff, 0x00000fff, 0x00000fff, sub, suc, suc, 0x0000000b
 409         test_seq "", "", 0x0000000f, 0x00000010, 0x00000002, 0x00000020 rsb, suc, suc, 0xffffffde
 410         test_seq "", "", 0xffffffff, 0x00000001, 0x00000000, 0x00000000 add, suc, adc, 0x00000001
 411         test_seq "", "", 0x00000000, 0x00000010, 0x00000000, 0x00000000 sub, adc, adc, 0xfffffff0
 412         test_seq "", "", 0x00000000, 0x00000010, 0x00000000, 0x00000000 sub, adc, suc, 0xffffffef
 413
 414         pass
 415 EXIT_FAIL:
 416         fail