sim/testsuite/sim/cris/asm/tmvrmv10.ms

   1 #mach: crisv10
   2 #output: Basic clock cycles, total @: 31\n
   3 #output: Memory source stall cycles: 0\n
   4 #output: Memory read-after-write stall cycles: 0\n
   5 #output: Movem source stall cycles: 0\n
   6 #output: Movem destination stall cycles: 0\n
   7 #output: Movem address stall cycles: 0\n
   8 #output: Multiplication source stall cycles: 0\n
   9 #output: Jump source stall cycles: 0\n
  10 #output: Branch misprediction stall cycles: 0\n
  11 #output: Jump target stall cycles: 0\n
  12 #sim: --cris-cycles=basic
  13
  14 ; Check that movem to memory basically looks ok cycle-wise.
  15 ; Nothing deep.
  16
  17  .include "testutils.inc"
  18  startnostack
  19  move.d 0f,r4
  20  moveq 0,r0
  21  moveq 1,r3
  22  moveq 2,r1
  23  moveq 1,r2
  24  movem r3,[r4] ; 2 cycles penalty for v32
  25  movem r3,[r4] ; 0 cycles penalty for v32
  26  moveq 1,r3
  27  nop
  28  movem r3,[r4] ; 1 cycle penalty for v32
  29  moveq 1,r3
  30  nop
  31  nop
  32  movem r3,[r4] ; 0 cycles penalty for v32
  33  break 15
  34
  35  .data
  36 0:
  37  .dword 0
  38  .dword 0
  39  .dword 0
  40  .dword 0