sim/testsuite/sim/frv/fr400/csdiv.cgs

   1 # frv testcase for csdiv $GRi,$GRj,$GRk,$CCi,$cond
   2 # mach: all
   3
   4         .include "../testutils.inc"
   5
   6         start
   7
   8         .global csdiv
   9 csdiv:
  10         set_spr_immed   0x1b1b,cccr
  11
  12         ; simple division 12 / 3
  13         set_gr_immed    3,gr3
  14         set_gr_immed    12,gr1
  15         csdiv           gr1,gr3,gr2,cc4,1
  16         test_gr_immed   4,gr2
  17
  18         ; Random example
  19         set_gr_limmed   0x0123,0x4567,gr3
  20         set_gr_limmed   0xfedc,0xba98,gr1
  21         csdiv           gr1,gr3,gr2,cc4,1
  22         test_gr_immed   -1,gr2
  23
  24         ; Special case from the Arch Spec Vol 2
  25         and_spr_immed   -33,isr         ; turn off isr.edem
  26         ; set up exception handler
  27         set_psr_et      1
  28         and_spr_immed   -4081,tbr       ; clear tbr.tt
  29         set_gr_spr      tbr,gr17
  30         inc_gr_immed    0x170,gr17      ; address of exception handler
  31         set_bctrlr_0_0  gr17
  32         set_spr_immed   128,lcr
  33         set_gr_immed    0,gr15
  34
  35         ; divide will cause overflow
  36         set_spr_addr    ok1,lr
  37         set_gr_immed    -1,gr3
  38         set_gr_limmed   0x8000,0x0000,gr1
  39 e1:     csdiv           gr1,gr3,gr2,cc4,1
  40         test_gr_immed   1,gr15
  41         test_gr_limmed  0x8000,0x0000,gr2
  42
  43         ; Special case from the Arch Spec Vol 2
  44         or_spr_immed    0x20,isr        ; turn on isr.edem
  45         set_gr_immed    -1,gr3
  46         set_gr_limmed   0x8000,0x0000,gr1
  47         csdiv           gr1,gr3,gr2,cc4,1
  48         test_gr_limmed  0x7fff,0xffff,gr2
  49
  50         ; simple division 12 / 3
  51         set_gr_immed    3,gr3
  52         set_gr_immed    12,gr1
  53         csdiv           gr1,gr3,gr2,cc4,0
  54         test_gr_limmed  0x7fff,0xffff,gr2
  55
  56         ; Random example
  57         set_gr_limmed   0x0123,0x4567,gr3
  58         set_gr_limmed   0xfedc,0xba98,gr1
  59         csdiv           gr1,gr3,gr2,cc4,0
  60         test_gr_limmed  0x7fff,0xffff,gr2
  61
  62         ; Special case from the Arch Spec Vol 2
  63         and_spr_immed   -33,isr         ; turn off isr.edem
  64         set_gr_immed    -1,gr3
  65         set_gr_limmed   0x8000,0x0000,gr1
  66         csdiv           gr1,gr3,gr2,cc4,0
  67         test_gr_limmed  0x7fff,0xffff,gr2
  68
  69         or_spr_immed    0x20,isr        ; turn on isr.edem
  70         set_gr_immed    -1,gr3
  71         set_gr_limmed   0x8000,0x0000,gr1
  72         csdiv           gr1,gr3,gr2,cc4,0
  73         test_gr_limmed  0x7fff,0xffff,gr2
  74
  75         ; simple division 12 / 3
  76         set_gr_immed    3,gr3
  77         set_gr_immed    12,gr1
  78         csdiv           gr1,gr3,gr2,cc5,0
  79         test_gr_immed   4,gr2
  80
  81         ; Random example
  82         set_gr_limmed   0x0123,0x4567,gr3
  83         set_gr_limmed   0xfedc,0xba98,gr1
  84         csdiv           gr1,gr3,gr2,cc5,0
  85         test_gr_immed   -1,gr2
  86
  87         ; Special case from the Arch Spec Vol 2
  88         and_spr_immed   -33,isr         ; turn off isr.edem
  89         ; divide will cause overflow
  90         set_spr_addr    ok1,lr
  91         set_gr_immed    -1,gr3
  92         set_gr_limmed   0x8000,0x0000,gr1
  93 e2:     csdiv           gr1,gr3,gr2,cc5,0
  94         test_gr_immed   2,gr15
  95         test_gr_limmed  0x8000,0x0000,gr2
  96
  97         ; Special case from the Arch Spec Vol 2
  98         or_spr_immed    0x20,isr        ; turn on isr.edem
  99         set_gr_immed    -1,gr3
 100         set_gr_limmed   0x8000,0x0000,gr1
 101         csdiv           gr1,gr3,gr2,cc5,0
 102         test_gr_limmed  0x7fff,0xffff,gr2
 103
 104         ; simple division 12 / 3
 105         set_gr_immed    3,gr3
 106         set_gr_immed    12,gr1
 107         csdiv           gr1,gr3,gr2,cc5,1
 108         test_gr_limmed  0x7fff,0xffff,gr2
 109
 110         ; Random example
 111         set_gr_limmed   0x0123,0x4567,gr3
 112         set_gr_limmed   0xfedc,0xba98,gr1
 113         csdiv           gr1,gr3,gr2,cc5,1
 114         test_gr_limmed  0x7fff,0xffff,gr2
 115
 116         ; Special case from the Arch Spec Vol 2
 117         and_spr_immed   -33,isr         ; turn off isr.edem
 118         set_gr_immed    -1,gr3
 119         set_gr_limmed   0x8000,0x0000,gr1
 120         csdiv           gr1,gr3,gr2,cc5,1
 121         test_gr_limmed  0x7fff,0xffff,gr2
 122
 123         or_spr_immed    0x20,isr        ; turn on isr.edem
 124         set_gr_immed    -1,gr3
 125         set_gr_limmed   0x8000,0x0000,gr1
 126         csdiv           gr1,gr3,gr2,cc5,1
 127         test_gr_limmed  0x7fff,0xffff,gr2
 128
 129         ; simple division 12 / 3
 130         set_gr_immed    3,gr3
 131         set_gr_immed    12,gr1
 132         csdiv           gr1,gr3,gr2,cc6,0
 133         test_gr_limmed  0x7fff,0xffff,gr2
 134
 135         ; Random example
 136         set_gr_limmed   0x0123,0x4567,gr3
 137         set_gr_limmed   0xfedc,0xba98,gr1
 138         csdiv           gr1,gr3,gr2,cc6,0
 139         test_gr_limmed  0x7fff,0xffff,gr2
 140
 141         ; Special case from the Arch Spec Vol 2
 142         and_spr_immed   -33,isr         ; turn off isr.edem
 143         set_gr_immed    -1,gr3
 144         set_gr_limmed   0x8000,0x0000,gr1
 145         csdiv           gr1,gr3,gr2,cc6,0
 146         test_gr_limmed  0x7fff,0xffff,gr2
 147
 148         or_spr_immed    0x20,isr        ; turn on isr.edem
 149         set_gr_immed    -1,gr3
 150         set_gr_limmed   0x8000,0x0000,gr1
 151         csdiv           gr1,gr3,gr2,cc6,0
 152         test_gr_limmed  0x7fff,0xffff,gr2
 153
 154         ; simple division 12 / 3
 155         set_gr_immed    3,gr3
 156         set_gr_immed    12,gr1
 157         csdiv           gr1,gr3,gr2,cc7,1
 158         test_gr_limmed  0x7fff,0xffff,gr2
 159
 160         ; Random example
 161         set_gr_limmed   0x0123,0x4567,gr3
 162         set_gr_limmed   0xfedc,0xba98,gr1
 163         csdiv           gr1,gr3,gr2,cc7,1
 164         test_gr_limmed  0x7fff,0xffff,gr2
 165
 166         ; Special case from the Arch Spec Vol 2
 167         and_spr_immed   -33,isr         ; turn off isr.edem
 168         set_gr_immed    -1,gr3
 169         set_gr_limmed   0x8000,0x0000,gr1
 170         csdiv           gr1,gr3,gr2,cc7,1
 171         test_gr_limmed  0x7fff,0xffff,gr2
 172
 173         or_spr_immed    0x20,isr        ; turn on isr.edem
 174         set_gr_immed    -1,gr3
 175         set_gr_limmed   0x8000,0x0000,gr1
 176         csdiv           gr1,gr3,gr2,cc7,1
 177         test_gr_limmed  0x7fff,0xffff,gr2
 178
 179         pass
 180
 181 ok1:    ; exception handler for overflow
 182         test_spr_bits   0x18,3,0x2,isr          ; isr.dtt is set
 183         test_spr_bits   0x0001,0,0x1,esr0       ; esr0 is valid
 184         test_spr_bits   0x003e,1,0x13,esr0      ; esr0.ec is set
 185         inc_gr_immed    1,gr15
 186         rett            0
 187         fail