sim/testsuite/sim/frv/stdc.pcgs

   1 # frv parallel testcase for stdc $CPk,@($GRi,$GRj)
   2 # mach: frv
   3
   4         .include "testutils.inc"
   5
   6         start
   7
   8         .global stdc
   9 stdc:
  10         set_mem_limmed  0xbeef,0xdead,sp
  11         inc_gr_immed    -4,sp
  12         set_mem_limmed  0xdead,0xbeef,sp
  13         set_gr_immed    0,gr7
  14         set_cpr_limmed  0xbeef,0xdead,cpr8
  15         set_cpr_limmed  0xdead,0xbeef,cpr9
  16         stdc            cpr8,@(sp,gr7)          ; non parallel
  17         test_mem_limmed 0xbeef,0xdead,sp
  18         inc_gr_immed    4,sp
  19         test_mem_limmed 0xdead,0xbeef,sp
  20
  21         set_mem_limmed  0xbeef,0xdead,sp
  22         inc_gr_immed    -4,sp
  23         set_mem_limmed  0xdead,0xbeef,sp
  24         set_gr_immed    4,gr7
  25         set_cpr_limmed  0xbeef,0xdead,cpr8
  26         set_cpr_limmed  0xdead,0xbeef,cpr9
  27         stdc.p          cpr8,@(sp,gr0)          ; parallel
  28         addi            sp,4,sp
  29         subi            sp,4,sp
  30         ldc             @(sp,gr0),cpr10
  31         ldc             @(sp,gr7),cpr11
  32         test_mem_limmed 0xbeef,0xdead,sp        ; memory is set
  33         inc_gr_immed    4,sp
  34         test_mem_limmed 0xdead,0xbeef,sp
  35         test_cpr_limmed 0xbeef,0xdead,cpr10
  36         test_cpr_limmed 0xdead,0xbeef,cpr11
  37
  38         pass