2 * i386 CMOS starts out with 14 bytes clock data alpha has something
3 * similar, but with details depending on the machine type.
7 * byte 4: hours 0-23 in 24hr mode,
8 * 1-12 in 12hr mode, with high bit unset/set
10 * byte 6: weekday 1-7, Sunday=1
11 * byte 7: day of the month 1-31
15 * Numbers are stored in BCD/binary if bit 2 of byte 11 is unset/set The
16 * clock is in 12hr/24hr mode if bit 1 of byte 11 is unset/set The clock is
17 * undefined (being updated) if bit 7 of byte 10 is set. The clock is frozen
18 * (to be updated) by setting bit 7 of byte 11 Bit 7 of byte 14 indicates
19 * whether the CMOS clock is reliable: it is 1 if RTC power has been good
20 * since this bit was last read; it is 0 when the battery is dead and system
23 * Avoid setting the RTC clock within 2 seconds of the day rollover that
24 * starts a new month or enters daylight saving time.
26 * The century situation is messy:
28 * Usually byte 50 (0x32) gives the century (in BCD, so 19 or 20 hex), but
29 * IBM PS/2 has (part of) a checksum there and uses byte 55 (0x37).
30 * Sometimes byte 127 (0x7f) or Bank 1, byte 0x48 gives the century. The
31 * original RTC will not access any century byte; some modern versions will.
32 * If a modern RTC or BIOS increments the century byte it may go from 0x19
33 * to 0x20, but in some buggy cases 0x1a is produced.
36 * A struct tm has int fields
37 * tm_sec 0-59, 60 or 61 only for leap seconds
42 * tm_year number of years since 1900
43 * tm_wday 0-6, 0=Sunday
45 * tm_isdst >0: yes, 0: no, <0: unknown
56 #include "pathnames.h"
59 #if defined(__i386__) || defined(__x86_64__)
62 # elif defined(HAVE_ASM_IO_H)
67 # warning "disable cmos access - no sys/io.h or asm/io.h"
68 static void outb(int a
__attribute__((__unused__
)),
69 int b
__attribute__((__unused__
)))
73 static int inb(int c
__attribute__((__unused__
)))
77 # endif /* __i386__ __x86_64__ */
79 # warning "disable cmos access - not i386 or x86_64"
80 static void outb(int a
__attribute__((__unused__
)),
81 int b
__attribute__((__unused__
)))
85 static int inb(int c
__attribute__((__unused__
)))
89 #endif /* for inb, outb */
93 #define BCD_TO_BIN(val) ((val)=((val)&15) + ((val)>>4)*10)
94 #define BIN_TO_BCD(val) ((val)=(((val)/10)<<4) + (val)%10)
96 #define IOPL_NOT_IMPLEMENTED -2
99 * POSIX uses 1900 as epoch for a struct tm, and 1970 for a time_t.
101 #define TM_EPOCH 1900
103 static unsigned short clock_ctl_addr
= 0x70;
104 static unsigned short clock_data_addr
= 0x71;
107 * Hmmh, this isn't very atomic. Maybe we should force an error instead?
109 * TODO: optimize the access to CMOS by mlockall(MCL_CURRENT) and SCHED_FIFO
111 static unsigned long atomic(unsigned long (*op
) (unsigned long),
118 * We only want to read CMOS data, but unfortunately writing to bit 7
119 * disables (1) or enables (0) NMI; since this bit is read-only we have
120 * to guess the old status. Various docs suggest that one should disable
121 * NMI while reading/writing CMOS data, and enable it again afterwards.
122 * This would yield the sequence
124 * outb (reg | 0x80, 0x70);
126 * outb (0x0d, 0x70); // 0x0d: random read-only location
128 * Other docs state that "any write to 0x70 should be followed by an
129 * action to 0x71 or the RTC will be left in an unknown state". Most
130 * docs say that it doesn't matter at all what one does.
132 * bit 0x80: disable NMI while reading - should we? Let us follow the
133 * kernel and not disable. Called only with 0 <= reg < 128
136 static inline unsigned long cmos_read(unsigned long reg
)
138 outb(reg
, clock_ctl_addr
);
139 return inb(clock_data_addr
);
142 static inline unsigned long cmos_write(unsigned long reg
, unsigned long val
)
144 outb(reg
, clock_ctl_addr
);
145 outb(val
, clock_data_addr
);
149 static unsigned long cmos_set_time(unsigned long arg
)
151 unsigned char save_control
, save_freq_select
, pmbit
= 0;
152 struct tm tm
= *(struct tm
*)arg
;
155 * CMOS byte 10 (clock status register A) has 3 bitfields:
156 * bit 7: 1 if data invalid, update in progress (read-only bit)
157 * (this is raised 224 us before the actual update starts)
158 * 6-4 select base frequency
159 * 010: 32768 Hz time base (default)
161 * all other combinations are manufacturer-dependent
162 * (e.g.: DS1287: 010 = start oscillator, anything else = stop)
163 * 3-0 rate selection bits for interrupt
164 * 0000 none (may stop RTC)
165 * 0001, 0010 give same frequency as 1000, 1001
166 * 0011 122 microseconds (minimum, 8192 Hz)
167 * .... each increase by 1 halves the frequency, doubles the period
168 * 1111 500 milliseconds (maximum, 2 Hz)
169 * 0110 976.562 microseconds (default 1024 Hz)
171 save_control
= cmos_read(11); /* tell the clock it's being set */
172 cmos_write(11, (save_control
| 0x80));
173 save_freq_select
= cmos_read(10); /* stop and reset prescaler */
174 cmos_write(10, (save_freq_select
| 0x70));
180 if (!(save_control
& 0x02)) { /* 12hr mode; the default is 24hr mode */
183 if (tm
.tm_hour
> 12) {
189 if (!(save_control
& 0x04)) { /* BCD mode - the default */
190 BIN_TO_BCD(tm
.tm_sec
);
191 BIN_TO_BCD(tm
.tm_min
);
192 BIN_TO_BCD(tm
.tm_hour
);
193 BIN_TO_BCD(tm
.tm_wday
);
194 BIN_TO_BCD(tm
.tm_mday
);
195 BIN_TO_BCD(tm
.tm_mon
);
196 BIN_TO_BCD(tm
.tm_year
);
199 cmos_write(0, tm
.tm_sec
);
200 cmos_write(2, tm
.tm_min
);
201 cmos_write(4, tm
.tm_hour
| pmbit
);
202 cmos_write(6, tm
.tm_wday
);
203 cmos_write(7, tm
.tm_mday
);
204 cmos_write(8, tm
.tm_mon
);
205 cmos_write(9, tm
.tm_year
);
208 * The kernel sources, linux/arch/i386/kernel/time.c, have the
211 * The following flags have to be released exactly in this order,
212 * otherwise the DS12887 (popular MC146818A clone with integrated
213 * battery and quartz) will not reset the oscillator and will not
214 * update precisely 500 ms later. You won't find this mentioned in
215 * the Dallas Semiconductor data sheets, but who believes data
216 * sheets anyway ... -- Markus Kuhn
218 cmos_write(11, save_control
);
219 cmos_write(10, save_freq_select
);
223 static int hclock_read(unsigned long reg
)
225 return atomic(cmos_read
, reg
);
228 static void hclock_set_time(const struct tm
*tm
)
230 atomic(cmos_set_time
, (unsigned long)(tm
));
233 static inline int cmos_clock_busy(void)
236 /* poll bit 7 (UIP) of Control Register A */
237 (hclock_read(10) & 0x80);
240 static int synchronize_to_clock_tick_cmos(const struct hwclock_control
*ctl
241 __attribute__((__unused__
)))
246 * Wait for rise. Should be within a second, but in case something
247 * weird happens, we have a limit on this loop to reduce the impact
250 for (i
= 0; !cmos_clock_busy(); i
++)
254 /* Wait for fall. Should be within 2.228 ms. */
255 for (i
= 0; cmos_clock_busy(); i
++)
262 * Read the hardware clock and return the current time via <tm> argument.
263 * Assume we have an ISA machine and read the clock directly with CPU I/O
266 * This function is not totally reliable. It takes a finite and
267 * unpredictable amount of time to execute the code below. During that time,
268 * the clock may change and we may even read an invalid value in the middle
269 * of an update. We do a few checks to minimize this possibility, but only
270 * the kernel can actually read the clock properly, since it can execute
271 * code in a short and predictable amount of time (by turning of
274 * In practice, the chance of this function returning the wrong time is
277 static int read_hardware_clock_cmos(const struct hwclock_control
*ctl
278 __attribute__((__unused__
)), struct tm
*tm
)
280 unsigned char status
= 0, pmbit
= 0;
284 * Bit 7 of Byte 10 of the Hardware Clock value is the
285 * Update In Progress (UIP) bit, which is on while and 244
286 * uS before the Hardware Clock updates itself. It updates
287 * the counters individually, so reading them during an
288 * update would produce garbage. The update takes 2mS, so we
289 * could be spinning here that long waiting for this bit to
292 * Furthermore, it is pathologically possible for us to be
293 * in this code so long that even if the UIP bit is not on
294 * at first, the clock has changed while we were running. We
295 * check for that too, and if it happens, we start over.
297 if (!cmos_clock_busy()) {
298 /* No clock update in progress, go ahead and read */
299 tm
->tm_sec
= hclock_read(0);
300 tm
->tm_min
= hclock_read(2);
301 tm
->tm_hour
= hclock_read(4);
302 tm
->tm_wday
= hclock_read(6);
303 tm
->tm_mday
= hclock_read(7);
304 tm
->tm_mon
= hclock_read(8);
305 tm
->tm_year
= hclock_read(9);
306 status
= hclock_read(11);
308 * Unless the clock changed while we were reading,
309 * consider this a good clock read .
311 if (tm
->tm_sec
== hclock_read(0))
315 * Yes, in theory we could have been running for 60 seconds
316 * and the above test wouldn't work!
320 if (!(status
& 0x04)) { /* BCD mode - the default */
321 BCD_TO_BIN(tm
->tm_sec
);
322 BCD_TO_BIN(tm
->tm_min
);
323 pmbit
= (tm
->tm_hour
& 0x80);
325 BCD_TO_BIN(tm
->tm_hour
);
326 BCD_TO_BIN(tm
->tm_wday
);
327 BCD_TO_BIN(tm
->tm_mday
);
328 BCD_TO_BIN(tm
->tm_mon
);
329 BCD_TO_BIN(tm
->tm_year
);
333 * We don't use the century byte of the Hardware Clock since we
334 * don't know its address (usually 50 or 55). Here, we follow the
335 * advice of the X/Open Base Working Group: "if century is not
336 * specified, then values in the range [69-99] refer to years in the
337 * twentieth century (1969 to 1999 inclusive), and values in the
338 * range [00-68] refer to years in the twenty-first century (2000 to
343 if (tm
->tm_year
< 69)
347 if (tm
->tm_hour
== 24)
351 tm
->tm_isdst
= -1; /* don't know whether it's daylight */
355 static int set_hardware_clock_cmos(const struct hwclock_control
*ctl
356 __attribute__((__unused__
)),
357 const struct tm
*new_broken_time
)
359 hclock_set_time(new_broken_time
);
363 #if defined(__i386__) || defined(__x86_64__)
364 # if defined(HAVE_IOPL)
365 static int i386_iopl(const int level
)
370 static int i386_iopl(const int level
__attribute__ ((__unused__
)))
372 extern int ioperm(unsigned long from
, unsigned long num
, int turn_on
);
373 return ioperm(clock_ctl_addr
, 2, 1);
377 static int i386_iopl(const int level
__attribute__ ((__unused__
)))
379 return IOPL_NOT_IMPLEMENTED
;
383 static int get_permissions_cmos(void)
388 if (rc
== IOPL_NOT_IMPLEMENTED
) {
389 warnx(_("ISA port access is not implemented"));
390 } else if (rc
!= 0) {
391 warn(_("iopl() port access failed"));
396 static struct clock_ops cmos_interface
= {
397 N_("Using direct ISA access to the clock"),
398 get_permissions_cmos
,
399 read_hardware_clock_cmos
,
400 set_hardware_clock_cmos
,
401 synchronize_to_clock_tick_cmos
,
405 * return &cmos if cmos clock present, NULL otherwise.
407 struct clock_ops
*probe_for_cmos_clock(void)
409 #if defined(__i386__) || defined(__x86_64__)
410 return &cmos_interface
;