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1 /*
2 * lscpu-arm.c - ARM CPU identification tables
3 *
4 * Copyright (C) 2018 Riku Voipio <riku.voipio@iki.fi>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it would be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * The information here is gathered from
21 * - ARM manuals
22 * - Linux kernel: arch/armX/include/asm/cputype.h
23 * - GCC sources: config/arch/arch-cores.def
24 * - Ancient wisdom
25 */
26 #include "lscpu.h"
27
28 struct id_part {
29 const int id;
30 const char* name;
31 };
32
33 static const struct id_part arm_part[] = {
34 { 0x810, "ARM810" },
35 { 0x920, "ARM920" },
36 { 0x922, "ARM922" },
37 { 0x926, "ARM926" },
38 { 0x940, "ARM940" },
39 { 0x946, "ARM946" },
40 { 0x966, "ARM966" },
41 { 0xa20, "ARM1020" },
42 { 0xa22, "ARM1022" },
43 { 0xa26, "ARM1026" },
44 { 0xb02, "ARM11 MPCore" },
45 { 0xb36, "ARM1136" },
46 { 0xb56, "ARM1156" },
47 { 0xb76, "ARM1176" },
48 { 0xc05, "Cortex-A5" },
49 { 0xc07, "Cortex-A7" },
50 { 0xc08, "Cortex-A8" },
51 { 0xc09, "Cortex-A9" },
52 { 0xc0d, "Cortex-A12" },
53 { 0xc0f, "Cortex-A15" },
54 { 0xc0e, "Cortex-A17" },
55 { 0xc14, "Cortex-R4" },
56 { 0xc15, "Cortex-R5" },
57 { 0xc17, "Cortex-R7" },
58 { 0xc18, "Cortex-R8" },
59 { 0xc20, "Cortex-M0" },
60 { 0xc21, "Cortex-M1" },
61 { 0xc23, "Cortex-M3" },
62 { 0xc24, "Cortex-M4" },
63 { 0xc20, "Cortex-M7" },
64 { 0xc60, "Cortex-M0+" },
65 { 0xd01, "Cortex-A32" },
66 { 0xd03, "Cortex-A53" },
67 { 0xd04, "Cortex-A35" },
68 { 0xd05, "Cortex-A55" },
69 { 0xd07, "Cortex-A57" },
70 { 0xd08, "Cortex-A72" },
71 { 0xd09, "Cortex-A73" },
72 { 0xd0a, "Cortex-A75" },
73 { 0xd13, "Cortex-R52" },
74 { 0xd20, "Cortex-M23" },
75 { 0xd21, "Cortex-M33" },
76 { -1, "unknown" },
77 };
78
79 static const struct id_part brcm_part[] = {
80 { 0x0f, "Brahma B15" },
81 { 0x100, "Brahma B53" },
82 { 0x516, "ThunderX2" },
83 { -1, "unknown" },
84 };
85
86 static const struct id_part dec_part[] = {
87 { 0xa10, "SA110" },
88 { 0xa11, "SA1100" },
89 { -1, "unknown" },
90 };
91
92 static const struct id_part cavium_part[] = {
93 { 0x0a0, "ThunderX" },
94 { 0x0a1, "ThunderX 88XX" },
95 { 0x0a2, "ThunderX 81XX" },
96 { 0x0a3, "ThunderX 83XX" },
97 { 0x0af, "ThunderX2 99xx" },
98 { -1, "unknown" },
99 };
100
101 static const struct id_part apm_part[] = {
102 { 0x000, "X-Gene" },
103 { -1, "unknown" },
104 };
105
106 static const struct id_part qcom_part[] = {
107 { 0x00f, "Scorpion" },
108 { 0x02d, "Scorpion" },
109 { 0x04d, "Krait" },
110 { 0x06f, "Krait" },
111 { 0x201, "Kryo" },
112 { 0x205, "Kryo" },
113 { 0x211, "Kryo" },
114 { 0x800, "Falkor V1/Kryo" },
115 { 0x801, "Kryo V2" },
116 { 0xc00, "Falkor" },
117 { 0xc01, "Saphira" },
118 { -1, "unknown" },
119 };
120
121 static const struct id_part samsung_part[] = {
122 { 0x001, "exynos-m1" },
123 { -1, "unknown" },
124 };
125
126 static const struct id_part nvidia_part[] = {
127 { 0x000, "Denver" },
128 { 0x003, "Denver 2" },
129 { -1, "unknown" },
130 };
131
132 static const struct id_part marvell_part[] = {
133 { 0x131, "Feroceon 88FR131" },
134 { 0x581, "PJ4/PJ4b" },
135 { 0x584, "PJ4B-MP" },
136 { -1, "unknown" },
137 };
138
139 static const struct id_part faraday_part[] = {
140 { 0x526, "FA526" },
141 { 0x626, "FA626" },
142 { -1, "unknown" },
143 };
144
145 static const struct id_part intel_part[] = {
146 { 0x200, "i80200" },
147 { 0x210, "PXA250A" },
148 { 0x212, "PXA210A" },
149 { 0x242, "i80321-400" },
150 { 0x243, "i80321-600" },
151 { 0x290, "PXA250B/PXA26x" },
152 { 0x292, "PXA210B" },
153 { 0x2c2, "i80321-400-B0" },
154 { 0x2c3, "i80321-600-B0" },
155 { 0x2d0, "PXA250C/PXA255/PXA26x" },
156 { 0x2d2, "PXA210C" },
157 { 0x411, "PXA27x" },
158 { 0x41c, "IPX425-533" },
159 { 0x41d, "IPX425-400" },
160 { 0x41f, "IPX425-266" },
161 { 0x682, "PXA32x" },
162 { 0x683, "PXA930/PXA935" },
163 { 0x688, "PXA30x" },
164 { 0x689, "PXA31x" },
165 { 0xb11, "SA1110" },
166 { 0xc12, "IPX1200" },
167 { -1, "unknown" },
168 };
169
170 static const struct id_part unknown_part[] = {
171 { -1, "unknown" },
172 };
173
174 struct hw_impl {
175 const int id;
176 const struct id_part *parts;
177 const char *name;
178 };
179
180 static const struct hw_impl hw_implementer[] = {
181 { 0x41, arm_part, "ARM" },
182 { 0x42, brcm_part, "Broadcom" },
183 { 0x43, cavium_part, "Cavium" },
184 { 0x44, dec_part, "DEC" },
185 { 0x4e, nvidia_part, "Nvidia" },
186 { 0x50, apm_part, "APM" },
187 { 0x51, qcom_part, "Qualcomm" },
188 { 0x53, samsung_part, "Samsung" },
189 { 0x56, marvell_part, "Marvell" },
190 { 0x66, faraday_part, "Faraday" },
191 { 0x69, intel_part, "Intel" },
192 { -1, unknown_part, "unknown" },
193 };
194
195 void arm_cpu_decode(struct lscpu_desc *desc)
196 {
197 int j, impl, part;
198 const struct id_part *parts = NULL;
199 char *end;
200
201 if (desc->vendor == NULL || desc->model == NULL)
202 return;
203 if ((strncmp(desc->vendor,"0x",2) || strncmp(desc->model,"0x",2) ))
204 return;
205
206 errno = 0;
207 impl = (int) strtol(desc->vendor, &end, 0);
208 if (errno || desc->vendor == end)
209 return;
210
211 errno = 0;
212 part = (int) strtol(desc->model, &end, 0);
213 if (errno || desc->model == end)
214 return;
215
216 for (j = 0; hw_implementer[j].id != -1; j++) {
217 if (hw_implementer[j].id == impl) {
218 parts = hw_implementer[j].parts;
219 desc->vendor = (char *) hw_implementer[j].name;
220 break;
221 }
222 }
223
224 if (parts == NULL)
225 return;
226
227 for (j = 0; parts[j].id != -1; j++) {
228 if (parts[j].id == part) {
229 desc->modelname = (char *) parts[j].name;
230 break;
231 }
232 }
233
234 /* Print out the rXpY string for ARM cores */
235 if (impl == 0x41 && desc->revision && desc->stepping) {
236 int revision, variant;
237 char buf[8];
238
239 errno = 0;
240 revision = (int) strtol(desc->revision, &end, 10);
241 if (errno || desc->revision == end)
242 return;
243
244 errno = 0;
245 variant = (int) strtol(desc->stepping, &end, 0);
246 if (errno || desc->stepping == end)
247 return;
248
249 snprintf(buf, sizeof(buf), "r%dp%d", variant, revision);
250 desc->stepping = xstrdup(buf);
251 }
252 }