sys-utils/lscpu-arm.c

   1 /*
   2  * lscpu-arm.c - ARM CPU identification tables
   3  *
   4  * Copyright (C) 2018 Riku Voipio <riku.voipio@iki.fi>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it would be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License along
  17  * with this program; if not, write to the Free Software Foundation, Inc.,
  18  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * The information here is gathered from
  21  *  - ARM manuals
  22  *  - Linux kernel: arch/armX/include/asm/cputype.h
  23  *  - GCC sources: config/arch/arch-cores.def
  24  *  - Ancient wisdom
  25  *  - SMBIOS tables (if applicable)
  26  */
  27 #include "lscpu.h"
  28
  29 struct id_part {
  30     const int id;
  31     const char* name;
  32 };
  33
  34 static const struct id_part arm_part[] = {
  35     { 0x810, "ARM810" },
  36     { 0x920, "ARM920" },
  37     { 0x922, "ARM922" },
  38     { 0x926, "ARM926" },
  39     { 0x940, "ARM940" },
  40     { 0x946, "ARM946" },
  41     { 0x966, "ARM966" },
  42     { 0xa20, "ARM1020" },
  43     { 0xa22, "ARM1022" },
  44     { 0xa26, "ARM1026" },
  45     { 0xb02, "ARM11 MPCore" },
  46     { 0xb36, "ARM1136" },
  47     { 0xb56, "ARM1156" },
  48     { 0xb76, "ARM1176" },
  49     { 0xc05, "Cortex-A5" },
  50     { 0xc07, "Cortex-A7" },
  51     { 0xc08, "Cortex-A8" },
  52     { 0xc09, "Cortex-A9" },
  53     { 0xc0d, "Cortex-A17" },    /* Originally A12 */
  54     { 0xc0f, "Cortex-A15" },
  55     { 0xc0e, "Cortex-A17" },
  56     { 0xc14, "Cortex-R4" },
  57     { 0xc15, "Cortex-R5" },
  58     { 0xc17, "Cortex-R7" },
  59     { 0xc18, "Cortex-R8" },
  60     { 0xc20, "Cortex-M0" },
  61     { 0xc21, "Cortex-M1" },
  62     { 0xc23, "Cortex-M3" },
  63     { 0xc24, "Cortex-M4" },
  64     { 0xc27, "Cortex-M7" },
  65     { 0xc60, "Cortex-M0+" },
  66     { 0xd01, "Cortex-A32" },
  67     { 0xd03, "Cortex-A53" },
  68     { 0xd04, "Cortex-A35" },
  69     { 0xd05, "Cortex-A55" },
  70     { 0xd06, "Cortex-A65" },
  71     { 0xd07, "Cortex-A57" },
  72     { 0xd08, "Cortex-A72" },
  73     { 0xd09, "Cortex-A73" },
  74     { 0xd0a, "Cortex-A75" },
  75     { 0xd0b, "Cortex-A76" },
  76     { 0xd0c, "Neoverse-N1" },
  77     { 0xd0d, "Cortex-A77" },
  78     { 0xd0e, "Cortex-A76AE" },
  79     { 0xd13, "Cortex-R52" },
  80     { 0xd20, "Cortex-M23" },
  81     { 0xd21, "Cortex-M33" },
  82     { 0xd40, "Neoverse-V1" },
  83     { 0xd41, "Cortex-A78" },
  84     { 0xd42, "Cortex-A78AE" },
  85     { 0xd44, "Cortex-X1" },
  86     { 0xd46, "Cortex-A510" },
  87     { 0xd47, "Cortex-A710" },
  88     { 0xd48, "Cortex-X2" },
  89     { 0xd49, "Neoverse-N2" },
  90     { 0xd4a, "Neoverse-E1" },
  91     { 0xd4b, "Cortex-A78C" },
  92     { 0xd4d, "Cortex-A715" },
  93     { 0xd4e, "Cortex-X3" },
  94     { -1, "unknown" },
  95 };
  96
  97 static const struct id_part brcm_part[] = {
  98     { 0x0f, "Brahma-B15" },
  99     { 0x100, "Brahma-B53" },
 100     { 0x516, "ThunderX2" },
 101     { -1, "unknown" },
 102 };
 103
 104 static const struct id_part dec_part[] = {
 105     { 0xa10, "SA110" },
 106     { 0xa11, "SA1100" },
 107     { -1, "unknown" },
 108 };
 109
 110 static const struct id_part cavium_part[] = {
 111     { 0x0a0, "ThunderX" },
 112     { 0x0a1, "ThunderX-88XX" },
 113     { 0x0a2, "ThunderX-81XX" },
 114     { 0x0a3, "ThunderX-83XX" },
 115     { 0x0af, "ThunderX2-99xx" },
 116     { -1, "unknown" },
 117 };
 118
 119 static const struct id_part apm_part[] = {
 120     { 0x000, "X-Gene" },
 121     { -1, "unknown" },
 122 };
 123
 124 static const struct id_part qcom_part[] = {
 125     { 0x00f, "Scorpion" },
 126     { 0x02d, "Scorpion" },
 127     { 0x04d, "Krait" },
 128     { 0x06f, "Krait" },
 129     { 0x201, "Kryo" },
 130     { 0x205, "Kryo" },
 131     { 0x211, "Kryo" },
 132     { 0x800, "Falkor-V1/Kryo" },
 133     { 0x801, "Kryo-V2" },
 134     { 0x803, "Kryo-3XX-Silver" },
 135     { 0x804, "Kryo-4XX-Gold" },
 136     { 0x805, "Kryo-4XX-Silver" },
 137     { 0xc00, "Falkor" },
 138     { 0xc01, "Saphira" },
 139     { -1, "unknown" },
 140 };
 141
 142 static const struct id_part samsung_part[] = {
 143     { 0x001, "exynos-m1" },
 144     { -1, "unknown" },
 145 };
 146
 147 static const struct id_part nvidia_part[] = {
 148     { 0x000, "Denver" },
 149     { 0x003, "Denver 2" },
 150     { 0x004, "Carmel" },
 151     { -1, "unknown" },
 152 };
 153
 154 static const struct id_part marvell_part[] = {
 155     { 0x131, "Feroceon-88FR131" },
 156     { 0x581, "PJ4/PJ4b" },
 157     { 0x584, "PJ4B-MP" },
 158     { -1, "unknown" },
 159 };
 160
 161 static const struct id_part apple_part[] = {
 162     { 0x020, "Icestorm-A14" },
 163     { 0x021, "Firestorm-A14" },
 164     { 0x022, "Icestorm-M1" },
 165     { 0x023, "Firestorm-M1" },
 166     { 0x024, "Icestorm-M1-Pro" },
 167     { 0x025, "Firestorm-M1-Pro" },
 168     { 0x028, "Icestorm-M1-Max" },
 169     { 0x029, "Firestorm-M1-Max" },
 170     { 0x030, "Blizzard-A15" },
 171     { 0x031, "Avalanche-A15" },
 172     { 0x032, "Blizzard-M2" },
 173     { 0x033, "Avalanche-M2" },
 174     { -1, "unknown" },
 175 };
 176
 177 static const struct id_part faraday_part[] = {
 178     { 0x526, "FA526" },
 179     { 0x626, "FA626" },
 180     { -1, "unknown" },
 181 };
 182
 183 static const struct id_part intel_part[] = {
 184     { 0x200, "i80200" },
 185     { 0x210, "PXA250A" },
 186     { 0x212, "PXA210A" },
 187     { 0x242, "i80321-400" },
 188     { 0x243, "i80321-600" },
 189     { 0x290, "PXA250B/PXA26x" },
 190     { 0x292, "PXA210B" },
 191     { 0x2c2, "i80321-400-B0" },
 192     { 0x2c3, "i80321-600-B0" },
 193     { 0x2d0, "PXA250C/PXA255/PXA26x" },
 194     { 0x2d2, "PXA210C" },
 195     { 0x411, "PXA27x" },
 196     { 0x41c, "IPX425-533" },
 197     { 0x41d, "IPX425-400" },
 198     { 0x41f, "IPX425-266" },
 199     { 0x682, "PXA32x" },
 200     { 0x683, "PXA930/PXA935" },
 201     { 0x688, "PXA30x" },
 202     { 0x689, "PXA31x" },
 203     { 0xb11, "SA1110" },
 204     { 0xc12, "IPX1200" },
 205     { -1, "unknown" },
 206 };
 207
 208 static const struct id_part fujitsu_part[] = {
 209     { 0x001, "A64FX" },
 210     { -1, "unknown" },
 211 };
 212
 213 static const struct id_part hisi_part[] = {
 214     { 0xd01, "Kunpeng-920" },   /* aka tsv110 */
 215     { -1, "unknown" },
 216 };
 217
 218 static const struct id_part ft_part[] = {
 219     { 0x660, "FTC660" },
 220     { 0x661, "FTC661" },
 221     { 0x662, "FTC662" },
 222     { 0x663, "FTC663" },
 223     { -1, "unknown" },
 224 };
 225
 226 static const struct id_part unknown_part[] = {
 227     { -1, "unknown" },
 228 };
 229
 230 struct hw_impl {
 231    const int    id;
 232    const struct id_part     *parts;
 233    const char   *name;
 234 };
 235
 236 static const struct hw_impl hw_implementer[] = {
 237     { 0x41, arm_part,     "ARM" },
 238     { 0x42, brcm_part,    "Broadcom" },
 239     { 0x43, cavium_part,  "Cavium" },
 240     { 0x44, dec_part,     "DEC" },
 241     { 0x46, fujitsu_part, "FUJITSU" },
 242     { 0x48, hisi_part,    "HiSilicon" },
 243     { 0x49, unknown_part, "Infineon" },
 244     { 0x4d, unknown_part, "Motorola/Freescale" },
 245     { 0x4e, nvidia_part,  "NVIDIA" },
 246     { 0x50, apm_part,     "APM" },
 247     { 0x51, qcom_part,    "Qualcomm" },
 248     { 0x53, samsung_part, "Samsung" },
 249     { 0x56, marvell_part, "Marvell" },
 250     { 0x61, apple_part,   "Apple" },
 251     { 0x66, faraday_part, "Faraday" },
 252     { 0x69, intel_part,   "Intel" },
 253     { 0x70, ft_part,      "Phytium" },
 254     { 0xc0, unknown_part, "Ampere" },
 255     { -1,   unknown_part, "unknown" },
 256 };
 257
 258 static int parse_id(const char *str)
 259 {
 260         int id;
 261         char *end = NULL;
 262
 263         if (!str || strncmp(str, "0x",2) != 0)
 264                 return -EINVAL;
 265
 266         errno = 0;
 267         id = (int) strtol(str, &end, 0);
 268         if (errno || str == end)
 269                 return -EINVAL;
 270
 271         return id;
 272 }
 273
 274 #define parse_model_id(_cxt)            (parse_id((_cxt)->model))
 275
 276 static inline int parse_implementer_id(struct lscpu_cputype *ct)
 277 {
 278         if (ct->vendor_id)
 279                 return ct->vendor_id;
 280         ct->vendor_id = parse_id(ct->vendor);
 281         return ct->vendor_id;
 282 }
 283
 284 /*
 285  * Use model and vendor IDs to decode to human readable names.
 286  */
 287 static int arm_ids_decode(struct lscpu_cputype *ct)
 288 {
 289         int impl, part, j;
 290         const struct id_part *parts = NULL;
 291
 292         impl = parse_implementer_id(ct);
 293         if (impl <= 0)
 294                 return -EINVAL; /* no ARM or missing ID */
 295
 296         /* decode vendor */
 297         for (j = 0; hw_implementer[j].id != -1; j++) {
 298                 if (hw_implementer[j].id == impl) {
 299                         parts = hw_implementer[j].parts;
 300                         free(ct->vendor);
 301                         ct->vendor = xstrdup(hw_implementer[j].name);
 302                         break;
 303                 }
 304         }
 305
 306         /* decode model */
 307         if (!parts)
 308                 goto done;
 309
 310         part = parse_model_id(ct);
 311         if (part <= 0)
 312                 goto done;
 313
 314         for (j = 0; parts[j].id != -1; j++) {
 315                 if (parts[j].id == part) {
 316                         free(ct->modelname);
 317                         ct->modelname = xstrdup(parts[j].name);
 318                         break;
 319                 }
 320         }
 321 done:
 322         return 0;
 323 }
 324
 325 /* use "rXpY" string as stepping */
 326 static int arm_rXpY_decode(struct lscpu_cputype *ct)
 327 {
 328         int impl, revision, variant;
 329         char *end = NULL;
 330         char buf[8];
 331
 332         impl = parse_implementer_id(ct);
 333
 334         if (impl != 0x41 || !ct->revision || !ct->stepping)
 335                 return -EINVAL;
 336
 337         errno = 0;
 338         revision = (int) strtol(ct->revision, &end, 10);
 339         if (errno || ct->revision == end)
 340                 return -EINVAL;
 341
 342         errno = 0;
 343         variant = (int) strtol(ct->stepping, &end, 0);
 344         if (errno || ct->stepping == end)
 345                 return -EINVAL;
 346
 347         snprintf(buf, sizeof(buf), "r%dp%d", variant, revision);
 348         free(ct->stepping);
 349         ct->stepping = xstrdup(buf);
 350
 351         return 0;
 352 }
 353
 354 static void arm_decode(struct lscpu_cxt *cxt, struct lscpu_cputype *ct)
 355 {
 356         if (!cxt->noalive && access(_PATH_SYS_DMI, R_OK) == 0)
 357                 dmi_decode_cputype(ct);
 358
 359         arm_ids_decode(ct);
 360         arm_rXpY_decode(ct);
 361
 362         if (!cxt->noalive && cxt->is_cluster)
 363                 ct->nr_socket_on_cluster = get_number_of_physical_sockets_from_dmi();
 364 }
 365
 366 static int is_cluster_arm(struct lscpu_cxt *cxt)
 367 {
 368         struct stat st;
 369
 370         if (!cxt->noalive
 371             && strcmp(cxt->arch->name, "aarch64") == 0
 372             && stat(_PATH_ACPI_PPTT, &st) < 0 && cxt->ncputypes == 1)
 373                 return 1;
 374         else
 375                 return 0;
 376 }
 377
 378 void lscpu_decode_arm(struct lscpu_cxt *cxt)
 379 {
 380         size_t i;
 381
 382         cxt->is_cluster = is_cluster_arm(cxt);
 383
 384         for (i = 0; i < cxt->ncputypes; i++)
 385                 arm_decode(cxt, cxt->cputypes[i]);
 386 }