+extern unsigned long ins_type_counters[ (int)INS_MAX ];
+
+enum {
+ SP_IDX = 15,
+};
+
+/* Write-back slots */
+union slot_data {
+ unsigned_1 _1;
+ unsigned_2 _2;
+ unsigned_4 _4;
+ unsigned_8 _8;
+};
+struct slot {
+ void *dest;
+ int size;
+ union slot_data data;
+ union slot_data mask;
+};
+enum {
+ NR_SLOTS = 16,
+};
+#define SLOT (State.slot)
+#define SLOT_NR (State.slot_nr)
+#define SLOT_PEND_MASK(DEST, MSK, VAL) \
+ do \
+ { \
+ SLOT[SLOT_NR].dest = &(DEST); \
+ SLOT[SLOT_NR].size = sizeof (DEST); \
+ switch (sizeof (DEST)) \
+ { \
+ case 1: \
+ SLOT[SLOT_NR].data._1 = (unsigned_1) (VAL); \
+ SLOT[SLOT_NR].mask._1 = (unsigned_1) (MSK); \
+ break; \
+ case 2: \
+ SLOT[SLOT_NR].data._2 = (unsigned_2) (VAL); \
+ SLOT[SLOT_NR].mask._2 = (unsigned_2) (MSK); \
+ break; \
+ case 4: \
+ SLOT[SLOT_NR].data._4 = (unsigned_4) (VAL); \
+ SLOT[SLOT_NR].mask._4 = (unsigned_4) (MSK); \
+ break; \
+ case 8: \
+ SLOT[SLOT_NR].data._8 = (unsigned_8) (VAL); \
+ SLOT[SLOT_NR].mask._8 = (unsigned_8) (MSK); \
+ break; \
+ } \
+ SLOT_NR = (SLOT_NR + 1); \
+ } \
+ while (0)
+#define SLOT_PEND(DEST, VAL) SLOT_PEND_MASK(DEST, 0, VAL)
+#define SLOT_DISCARD() (SLOT_NR = 0)
+#define SLOT_FLUSH() \
+ do \
+ { \
+ int i; \
+ for (i = 0; i < SLOT_NR; i++) \
+ { \
+ switch (SLOT[i].size) \
+ { \
+ case 1: \
+ *(unsigned_1*) SLOT[i].dest &= SLOT[i].mask._1; \
+ *(unsigned_1*) SLOT[i].dest |= SLOT[i].data._1; \
+ break; \
+ case 2: \
+ *(unsigned_2*) SLOT[i].dest &= SLOT[i].mask._2; \
+ *(unsigned_2*) SLOT[i].dest |= SLOT[i].data._2; \
+ break; \
+ case 4: \
+ *(unsigned_4*) SLOT[i].dest &= SLOT[i].mask._4; \
+ *(unsigned_4*) SLOT[i].dest |= SLOT[i].data._4; \
+ break; \
+ case 8: \
+ *(unsigned_8*) SLOT[i].dest &= SLOT[i].mask._8; \
+ *(unsigned_8*) SLOT[i].dest |= SLOT[i].data._8; \
+ break; \
+ } \
+ } \
+ SLOT_NR = 0; \
+ } \
+ while (0)
+#define SLOT_DUMP() \
+ do \
+ { \
+ int i; \
+ for (i = 0; i < SLOT_NR; i++) \
+ { \
+ switch (SLOT[i].size) \
+ { \
+ case 1: \
+ printf ("SLOT %d *0x%08lx & 0x%02x | 0x%02x\n", i, \
+ (long) SLOT[i].dest, \
+ (unsigned) SLOT[i].mask._1, \
+ (unsigned) SLOT[i].data._1); \
+ break; \
+ case 2: \
+ printf ("SLOT %d *0x%08lx & 0x%04x | 0x%04x\n", i, \
+ (long) SLOT[i].dest, \
+ (unsigned) SLOT[i].mask._2, \
+ (unsigned) SLOT[i].data._2); \
+ break; \
+ case 4: \
+ printf ("SLOT %d *0x%08lx & 0x%08x | 0x%08x\n", i, \
+ (long) SLOT[i].dest, \
+ (unsigned) SLOT[i].mask._4, \
+ (unsigned) SLOT[i].data._4); \
+ break; \
+ case 8: \
+ printf ("SLOT %d *0x%08lx & 0x%08x%08x | 0x%08x%08x\n", i, \
+ (long) SLOT[i].dest, \
+ (unsigned) (SLOT[i].mask._8 >> 32), \
+ (unsigned) SLOT[i].mask._8, \
+ (unsigned) (SLOT[i].data._8 >> 32), \
+ (unsigned) SLOT[i].data._8); \
+ break; \
+ } \
+ } \
+ } \
+ while (0)
+
+/* d10v memory: There are three separate d10v memory regions IMEM,
+ UMEM and DMEM. The IMEM and DMEM are further broken down into
+ blocks (very like VM pages). */
+
+enum
+{
+ IMAP_BLOCK_SIZE = 0x20000,
+ DMAP_BLOCK_SIZE = 0x4000,
+};
+
+/* Implement the three memory regions using sparse arrays. Allocate
+ memory using ``segments''. A segment must be at least as large as
+ a BLOCK - ensures that an access that doesn't cross a block
+ boundary can't cross a segment boundary */
+
+enum
+{
+ SEGMENT_SIZE = 0x20000, /* 128KB - MAX(IMAP_BLOCK_SIZE,DMAP_BLOCK_SIZE) */
+ IMEM_SEGMENTS = 8, /* 1MB */
+ DMEM_SEGMENTS = 8, /* 1MB */
+ UMEM_SEGMENTS = 128 /* 16MB */
+};
+
+struct d10v_memory
+{
+ uint8 *insn[IMEM_SEGMENTS];
+ uint8 *data[DMEM_SEGMENTS];
+ uint8 *unif[UMEM_SEGMENTS];
+};