Add support for the GBZ80 and Z80N variants of the Z80 architecture, and add DWARF...

[thirdparty/binutils-gdb.git] / bfd / bfd-in2.h

diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index 2d26b81db3841d0c05c1ae383fca7d91113e4534..180383be15b9c0a84a68adf95b60c3dd7d6acc03 100644 (file)
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -1897,14 +1897,15 @@ enum bfd_architecture
   bfd_arch_xtensa,    /* Tensilica's Xtensa cores.  */
 #define bfd_mach_xtensa        1
   bfd_arch_z80,
-#define bfd_mach_gbz80         0 /* GameBoy Z80 (reduced instruction set) */
-#define bfd_mach_z80strict     1 /* Z80 without undocumented opcodes.  */
-#define bfd_mach_z180          2 /* Z180: successor with additional instructions, but without halves of ix and iy */
-#define bfd_mach_z80           3 /* Z80 with ixl, ixh, iyl, and iyh.  */
-#define bfd_mach_ez80_z80      4 /* eZ80 (successor of Z80 & Z180) in Z80 (16-bit address) mode */
-#define bfd_mach_ez80_adl      5 /* eZ80 (successor of Z80 & Z180) in ADL (24-bit address) mode */
-#define bfd_mach_z80full       7 /* Z80 with all undocumented instructions.  */
-#define bfd_mach_r800          11 /* R800: successor with multiplication.  */
+#define bfd_mach_z80strict     1 /* Zilog Z80 without undocumented opcodes.  */
+#define bfd_mach_z180          2 /* Zilog Z180: successor with additional instructions, but without halves of ix and iy */
+#define bfd_mach_z80           3 /* Zilog Z80 with ixl, ixh, iyl, and iyh.  */
+#define bfd_mach_ez80_z80      4 /* Zilog eZ80 (successor of Z80 & Z180) in Z80 (16-bit address) mode */
+#define bfd_mach_ez80_adl      5 /* Zilog eZ80 (successor of Z80 & Z180) in ADL (24-bit address) mode */
+#define bfd_mach_z80n          6 /* Z80N */
+#define bfd_mach_z80full       7 /* Zilog Z80 with all undocumented instructions.  */
+#define bfd_mach_gbz80         8 /* GameBoy Z80 (reduced instruction set) */
+#define bfd_mach_r800          11 /*Ascii R800: Z80 successor with multiplication.  */
   bfd_arch_lm32,      /* Lattice Mico32.  */
 #define bfd_mach_lm32          1
   bfd_arch_microblaze,/* Xilinx MicroBlaze.  */
@@ -5301,6 +5302,9 @@ BFD_RELOC_XTENSA_ASM_EXPAND.  */
 /* Highest 16 bits of multibyte (32 or 24 bit) value.  */
   BFD_RELOC_Z80_WORD1,
 
+/* 16 bit word big endian */
+  BFD_RELOC_Z80_16_BE,
+
 /* DJNZ offset.  */
   BFD_RELOC_Z8K_DISP7,