+2018-08-03 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (Operand_Mem): Define.
+ (operand_size_match): Use it.
+ (check_VecOperands): Likewise.
+ (i386_att_operand): Likewise.
+ (swap_2_operands): Also swap flags fields.
+ * config/tc-i386-intel.c (i386_intel_operand): Likewise.
+
+2018-08-01 James Patrick Conlon <cptjustice@gmail.com>
+ Nick Clifton <nickc@redhat.com>
+
+ PR 14480
+ * config/tc-pdp11.c (parse_op_noreg): Check for and handle auto
+ increment deferred.
+ * testsuite/gas/pdp11/pr14480.d: New test driver file.
+ * testsuite/gas/pdp11/pr14480.s: New test source file file.
+ * testsuite/gas/pdp11/pdp11.exp: Run the new test.
+
+2018-08-01 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-ns32k.c (addr_mode): Replace "Drop through" comment
+ with "Fall through" so that it will be recognised by gcc's switch
+ statment error checker.
+
+2018-08-01 Alan Modra <amodra@gmail.com>
+
+ * po/POTFILES.in: Regenerate.
+
+2018-07-31 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (optimize_encoding): Also handle kandnd,
+ kandnq, kxord, and kxorq.
+ * testsuite/gas/i386/optimize-1.s: Add kandn and kxor tests.
+ * testsuite/gas/i386/optimize-1.d,
+ testsuite/gas/i386/optimize-4.d,
+ testsuite/gas/i386/optimize-5.d: Adjust expectations.
+
+2018-07-31 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (check_VecOperands): Convert masking handling
+ to switch(), to deal with DYNAMIC_MASKING.
+
+2018-07-31 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/inval-avx512f.s: Add invalid zeroing-
+ masking tests.
+ * testsuite/gas/i386/inval-avx512f.l: Adjust expectations.
+
+2018-07-31 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/sg.s, testsuite/gas/i386/sg.l: New.
+ * testsuite/gas/i386/i386.exp: Run new test.
+ * testsuite/gas/i386/avx512f.s, testsuite/gas/i386/avx512f_vl.s,
+ testsuite/gas/i386/avx512pf.s,
+ testsuite/gas/i386/x86-64-avx512f.s,
+ testsuite/gas/i386/x86-64-avx512f_vl.s,
+ testsuite/gas/i386/x86-64-avx512pf.s: Drop unnessecary operand
+ size specifiers from scatter/gather insns in Intel mode.
+
+2018-07-31 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (is_any_vex_encoding): New.
+ (process_immext, process_suffix): Use it.
+ (md_assemble): Likewise. Reject DATA_PREFIX with VEX/XOP/EVEX
+ insn.
+ * testsuite/gas/i386/prefix32.s, testsuite/gas/i386/prefix32.l,
+ testsuite/gas/i386/prefix64.s, testsuite/gas/i386/prefix64.l
+ New.
+ * testsuite/gas/i386/i386.exp: Run new tests.
+
+2018-07-31 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (parse_real_register): Use cpuavx512f instead
+ of cpuvrex.
+
+2018-07-30 Jan Beulich <jbeulich@suse.com>
+
+ PR gas/23465
+ * config/tc-i386.c (output_disp): Restrict scaling.
+ * testsuite/gas/i386/evex-no-scale.s,
+ testsuite/gas/i386/evex-no-scale-32.d
+ testsuite/gas/i386/evex-no-scale-64.d: New.
+ * testsuite/gas/i386/i386.exp: Run new tests.
+
+2018-07-30 Andrew Jenner <andrew@codesourcery.com>
+
+ * Makefile.am (TARGET_CPU_CFILES): Add entry for C-SKY.
+ (TARGET_CPU_HFILES, TARGET_ENV_HFILES): Likewise.
+ * Makefile.in: Regenerated.
+ * config/tc-csky.c: New file.
+ * config/tc-csky.h: New file.
+ * config/te-csky_abiv1.h: New file.
+ * config/te-csky_abiv1_linux.h: New file.
+ * config/te-csky_abiv2.h: New file.
+ * config/te-csky_abiv2_linux.h: New file.
+ * configure.tgt: Add C-SKY.
+ * doc/Makefile.am (CPU_DOCS): Add entry for C-SKY.
+ * doc/Makefile.in: Regenerated.
+ * doc/all.texi: Set CSKY feature.
+ * doc/as.texi (Overview): Add C-SKY options.
+ (Machine Dependencies): Likewise.
+ * doc/c-csky.texi: New file.
+ * testsuite/gas/csky/*: New test cases.
+ * NEWS: Mention the support.
+
+2018-07-29 John David Anglin <danglin@gcc.gnu.org>
+
+ * config/tc-hppa.c: Include "struc-symbol.h".
+ (pa_build_unwind_subspace): Use call_info->start_symbol->sy_frag
+ instead of frag_now for local symbol replacement.
+
+2018-07-27 Jim Wilson <jimw@sifive.com>
+
+ * configure.tgt (riscv*): Accept as alias for riscv32*.
+
+2018-07-26 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/23453
+ * config/tc-i386.c (parse_operands): Check for more than 2
+ memory references.
+ * testsuite/gas/i386/inval.s: Add a movsd test with 3 memory
+ references.
+ * testsuite/gas/i386/x86-64-inval.s: Likewise.
+ * testsuite/gas/i386/inval.l: Updated.
+ * testsuite/gas/i386/x86-64-inval.l: Likewise.
+
+2018-07-26 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (check_VecOperations): Initialize
+ broadcast_op.bytes to 0.
+
+2018-07-26 Alex Chadwick <Alex.Chadwick@cl.cam.ac.uk>
+
+ * config/tc-ppc.c (md_show_usage): Add -mgekko and -mbroadway.
+ * doc/as.texi (Target PowerPC options): Add -mgekko and -mbroadway.
+ * doc/c-ppc.texi (PowerPC-Opts): Likewise.
+ * testsuite/gas/ppc/broadway.d,
+ * testsuite/gas/ppc/broadway.s: New test for broadway.
+ * testsuite/gas/ppc/ppc.exp: Run new test.
+
+2018-07-26 Alan Modra <amodra@gmail.com>
+
+ * config/tc-ppc.c (ppc_elf_localentry): Allow .localentry values
+ of 1 and 7 to directly set value into STO_PPC64_LOCAL_MASK bits.
+
+2018-07-25 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (Broadcast_Operation): Add bytes.
+ (build_evex_prefix): Use i.broadcast->bytes.
+ (match_broadcast_size): New function.
+ (check_VecOperands): Use the broadcast field to compute the
+ number of bytes to broadcast directly. Set i.broadcast->bytes.
+ Use match_broadcast_size.
+
+2018-07-25 Thomas Preud'homme <thomas.preudhomme@linaro.org>
+
+ * doc/c-arm.texi (.arch directive): Clarify that name must not include
+ an extension.
+ (.cpu directive): Likewise.
+
+2018-07-24 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (build_vex_prefix): Use unsigned int to
+ iterate through multi-length vector operands.
+ (build_evex_prefix): Likewise.
+
+2018-07-24 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (check_VecOperands): Handle EVEXLIG when
+ deriving i.memshift.
+ * testsuite/gas/i386/cvtsi2sX.s, testsuite/gas/i386/cvtsi2sX.l:
+ New.
+ * testsuite/gas/i386/i386.exp: Run new test.
+ * testsuite/gas/i386/avx512f.d,
+ testsuite/gas/i386/evex-lig256.d,
+ testsuite/gas/i386/evex-lig512.d,,
+ testsuite/gas/i386/x86-64-avx512f.d,
+ testsuite/gas/i386/x86-64-evex-lig256.d,
+ testsuite/gas/i386/x86-64-evex-lig512.d: Adjust expectations.
+
+2018-07-23 H.J. Lu <hongjiu.lu@intel.com>
+
+ * testsuite/gas/i386/inval-avx512f.s: Add a test for missing
+ broadcast.
+ * testsuite/gas/i386/x86-64-inval-avx512f.s: Likewise.
+ * testsuite/gas/i386/inval-avx512f.l: Updated.
+ * testsuite/gas/i386/x86-64-inval-avx512f.l: Likewise.
+
+2018-07-23 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (i386_error): Remove
+ broadcast_not_on_src_operand.
+ (match_template): Likewse.
+
+2018-07-23 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * testsuite/gas/arc/st.d: Fix test.
+
+2018-07-23 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * config/tc-arc.c (tokenize_extinsn): Convert to lower case the
+ name of extension instructions.
+ * testsuite/gas/arc/textinsn_case.d: New file.
+ * testsuite/gas/arc/textinsn_case.s: Likewise.
+
+2018-07-22 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (build_vex_prefix): Determine vector
+ length from the last multi-length vector operand.
+ (build_evex_prefix): Likewise.
+
+2018-07-20 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (match_simd_size): Break long line.
+ (match_mem_size): Likewise.
+
+2018-07-20 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (match_reg_size): Renamed to ...
+ (match_operand_size): This. Update comments.
+ (match_simd_size): Update comments. Replace match_reg_size
+ with match_operand_size.
+ (match_mem_size): Likewise.
+ (operand_size_match): Replace match_reg_size with
+ match_operand_size.
+
+2018-07-20 Chenghua Xu <paul.hua.gm@gmail.com>
+ Maciej W. Rozycki <macro@mips.com>
+
+ * NEWS: Mention MultiMedia extensions Instructions (MMI)
+ support.
+ * config/tc-mips.c (options): Add OPTION_LOONGSON_MMI and
+ OPTION_NO_LOONGSON_MMI.
+ (md_longopts): Likewise.
+ (mips_ases): Define availability for MMI.
+ (mips_convert_ase_flags): Map ASE_LOONGSON_MMI to
+ AFL_ASE_LOONGSON_MMI.
+ (mips_cpu_info_table): Add ASE_LOONGSON_MMI for loongson2f/3a.
+ (md_show_usage): Add help for -mloongson-mmi and
+ -mno-loongson-mmi.
+ * doc/as.texi: Document -mloongson-mmi, -mno-loongson-mmi.
+ * doc/c-mips.texi: Document -mloongson-mmi, -mno-loongson-mmi,
+ .set loongson-mmi and .set noloongson-mmi.
+ * testsuite/gas/mips/loongson-2f.d: Move mmi test to ...
+ * testsuite/gas/mips/loongson-2f-mmi.d: Here. Add ISA/ASE
+ flag verification.
+ * testsuite/gas/mips/loongson-2f.s: Move mmi test to ...
+ * testsuite/gas/mips/loongson-2f-mmi.s: Here.
+ * testsuite/gas/mips/loongson-3a.d: Move mmi test to ...
+ * testsuite/gas/mips/loongson-3a-mmi.d: Here. Add ISA/ASE
+ flag verification.
+ * testsuite/gas/mips/loongson-3a.s: Move mmi test to ...
+ * testsuite/gas/mips/loongson-3a-mmi.s: Here.
+ * testsuite/gas/mips/mips.exp: Run loongson-2f-mmi and
+ loongson-3a-mmi tests.
+
+2018-07-20 Jose E. Marchesi <jose.marchesi@oracle.com>
+ Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
+
+ * testsuite/gas/sparc/sparc.exp (set_tests_arch): New proc.
+ Prefix v9c, v9d, v9v, v9m, v9m8 tests with corresponding
+ set_tests_arch.
+
+2018-07-19 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (build_evex_prefix): Derive vector length
+ from broadcast specification if necessary.
+ (match_template): Also exclude broadcast when checking whether
+ to reject 32-bit operands on pre-386.
+
+2018-07-19 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/noavx512-2.l: Adjust expectations.
+
+2018-07-19 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (is_evex_encoding): Also check disp8memshift.
+ (optimize_encoding): Also cover templates without cpuavx512vl
+ allowing for zmmword and having a ymmword actual.
+ (check_VecOperands): Handle DISP8_SHIFT_VL.
+ * testsuite/gas/i386/noavx512-2.l: Adjust expectations.
+
+2018-07-18 Maciej W. Rozycki <macro@mips.com>
+
+ * testsuite/gas/mips/loongson-2e.d: Correct whitespace issues.
+ * testsuite/gas/mips/loongson-2f.d: Likewise.
+ * testsuite/gas/mips/loongson-2f-2.d: Likewise.
+ * testsuite/gas/mips/loongson-2f-3.d: Likewise.
+ * testsuite/gas/mips/loongson-3a.d: Likewise.
+ * testsuite/gas/mips/loongson-3a-2.d: Likewise.
+ * testsuite/gas/mips/loongson-2e.s: Likewise.
+ * testsuite/gas/mips/loongson-2f.s: Likewise.
+ * testsuite/gas/mips/loongson-2f-3.s: Likewise.
+ * testsuite/gas/mips/loongson-3a.s: Likewise.
+ * testsuite/gas/mips/loongson-3a-2.s: Likewise.
+
+2018-07-18 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/23418
+ * testsuite/gas/i386/xmmword.s: Add tests for vcvtps2qq,
+ vcvtps2uqq, vcvttps2qq and vcvttps2uqq.
+ * testsuite/gas/i386/xmmword.l: Updated.
+
+2018-07-16 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (match_reg_size): Split second parameter
+ into two.
+ (match_simd_size): Likewise.
+ (match_mem_size): Likewise.
+ (MATCH_STRAIGHT, MATCH_REVERSE): Define.
+ (operand_size_match): Change return type. New local variable
+ "match". Always check for reverse match when opcode_modifier.d
+ is set.
+ (match_template) New local variable "size_match". Skip further
+ matching if operand_size_match() did not report a respective
+ match.
+ * testsuite/gas/i386/inval.s: Add control register reads/writes.
+ * testsuite/gas/i386/inval.l: Adjust expectations.
+
+2018-07-13 Nick Clifton <nickc@redhat.com>
+
+ * testsuite/gas/elf/missing-build-notes.s: New test. Checks that
+ relocs are correctly generated for missing build notes.
+ * testsuite/gas/elf/missing-build-notes.d: New file. Expected
+ output from objdump.
+ * testsuite/gas/elf/elf.exp: Run the new test.
+
+2018-07-13 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-arm.c (do_neon_mov): When converting an integer
+ immediate into a floating point value, check that the conversion
+ is valid. Also warn if the immediate is valid as both a floating
+ point value and a bit pattern.
+ * testsuite/gas/arm/vfp-mov-enc.s: Add instructions that use
+ floating point bit patterns.
+ * testsuite/gas/arm/vfp-mov-enc.d: Add regexps for the disassembly
+ of the new insns.
+
+2018-07-12 Sudakshina Das <sudi.das@arm.com>
+
+ * testsuite/gas/aarch64/system.s: Add test for ssbb
+ and pssbb.
+ * testsuite/gas/aarch64/system.d: Update accordingly
+ and remove explicit addresses.
+
+2018-07-11 Tamar Christina <tamar.christina@arm.com>
+
+ PR binutils/23192
+ * testsuite/gas/aarch64/illegal-by-element.s: New.
+ * testsuite/gas/aarch64/illegal-by-element.d: New.
+ * testsuite/gas/aarch64/illegal-by-element.l: New.
+
+2018-07-11 Sudakshina Das <sudi.das@arm.com>
+
+ * config/tc-arm.c (insns): Add new ssbb and pssbb instructions.
+ * testsuite/gas/arm/csdb.s: Add new tests for ssbb and pssbb.
+ * testsuite/gas/arm/csdb.d: Likewise
+ * testsuite/gas/arm/thumb2_it_bad.s: Likewise.
+ * testsuite/gas/arm/thumb2_it_bad.l: Likewise.
+ * testsuite/gas/arm/barrier.d: Update with ssbb.
+ * testsuite/gas/arm/barrier-thumb.d: Likewise.
+
+2018-07-11 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (inoutportreg, reg16_inoutportreg): Delete.
+ (i386_att_operand): Replace uses of reg16_inoutportreg and
+ inoutportreg.
+
+2018-07-11 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (output_insn): Remove check_prefix label and
+ fold remaining expression.
+
+2018-07-11 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/cet.s, testsuite/gas/i386/x86-64-cet.s:
+ Add Intel cases with operand size specifiers.
+ * testsuite/gas/i386/cet-intel.d, testsuite/gas/i386/cet.d,
+ testsuite/gas/i386/x86-64-cet-intel.d,
+ testsuite/gas/i386/x86-64-cet.d: Adjust expectations.
+
+2018-07-11 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (md_assemble): Also replace an already
+ present REP prefix.
+ * testsuite/gas/i386/mpx-add-bnd-prefix.s,
+ testsuite/gas/i386/x86-64-mpx-add-bnd-prefix.s: Test RET with
+ all REP flavors.
+ * testsuite/gas/i386/mpx-add-bnd-prefix.d,
+ testsuite/gas/i386/x86-64-mpx-add-bnd-prefix.d: Adjust
+ expectations.
+ * testsuite/gas/i386/mpx-add-bnd-prefix.e,
+ testsuite/gas/i386/x86-64-mpx-add-bnd-prefix.e: New.
+
+2018-07-09 Jeff Law <law@redhat.com>
+
+ * testsuite/nds32/ji-jr.d: Fix name tag.
+
+2018-07-06 Tamar Christina <tamar.christina@arm.com>
+
+ PR binutils/23369
+ * testsuite/gas/aarch64/msr.d (csselr_el1,
+ vsesr_el2, osdtrrx_el1, osdtrtx_el1, pmsidr_el1): New.
+ * testsuite/gas/aarch64/msr.s: Likewise.
+
+2018-07-06 Nick Clifton <nickc@redhat.com>
+
+ * write.c (maybe_generate_build_notes): Bias reloc offsets by the
+ number of notes already generated.
+
+2018-07-05 Nick Clifton <nickc@redhat.com>
+
+ * po/ru.po: Updated Russian translation.
+
+2018-07-02 Maciej W. Rozycki <macro@mips.com>
+
+ * config/tc-mips.c (macro_build) <'i', 'j'>: Also accept
+ BFD_RELOC_16, BFD_RELOC_MIPS_GOT16, BFD_RELOC_MIPS_CALL16,
+ BFD_RELOC_MIPS_GOT_HI16, BFD_RELOC_MIPS_GOT_LO16,
+ BFD_RELOC_MIPS_CALL_HI16, BFD_RELOC_MIPS_CALL_LO16,
+ BFD_RELOC_MIPS_SUB, BFD_RELOC_MIPS_GOT_PAGE,
+ BFD_RELOC_MIPS_HIGHEST, BFD_RELOC_MIPS_GOT_DISP,
+ BFD_RELOC_MIPS_TLS_GD, BFD_RELOC_MIPS_TLS_LDM,
+ BFD_RELOC_MIPS_TLS_DTPREL_HI16, BFD_RELOC_MIPS_TLS_DTPREL_LO16,
+ BFD_RELOC_MIPS_TLS_GOTTPREL, BFD_RELOC_MIPS_TLS_TPREL_HI16 and
+ BFD_RELOC_MIPS_TLS_TPREL_LO16 relocations if in the microMIPS
+ mode.
+ * testsuite/gas/mips/elf-rel28-lldscd-n32.d: New test.
+ * testsuite/gas/mips/elf-rel28-lldscd-micromips-n32.d: New test.
+ * testsuite/gas/mips/elf-rel28-lldscd-n64.d: New test.
+ * testsuite/gas/mips/elf-rel28-lldscd-micromips-n64.d: New test.
+ * testsuite/gas/mips/elf-rel28.s: Add instruction selection.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2018-07-02 Maciej W. Rozycki <macro@mips.com>
+
+ * testsuite/gas/mips/elf-rel28-micromips-n32.d: New test.
+ * testsuite/gas/mips/elf-rel28-micromips-n64.d: New test.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2018-07-02 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * config/tc-arm.c (cpu_arch_ver): Use symbolic TAG_CPU_ARCH macros
+ rather than hardcode their values.
+
+2018-07-02 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * NEWS: Use command-line consistently when used in a compount word.
+ * doc/as.texi: Likewise.
+ * doc/c-aarch64.texi: Likewise.
+ * doc/c-alpha.texi: Likewise.
+ * doc/c-arc.texi: Likewise.
+ * doc/c-arm.texi: Likewise.
+ * doc/c-avr.texi: Likewise.
+ * doc/c-bfin.texi: Likewise.
+ * doc/c-cris.texi: Likewise.
+ * doc/c-epiphany.texi: Likewise.
+ * doc/c-i386.texi: Likewise.
+ * doc/c-ia64.texi: Likewise.
+ * doc/c-lm32.texi: Likewise.
+ * doc/c-m32r.texi: Likewise.
+ * doc/c-m68k.texi: Likewise.
+ * doc/c-mips.texi: Likewise.
+ * doc/c-mmix.texi: Likewise.
+ * doc/c-msp430.texi: Likewise.
+ * doc/c-mt.texi: Likewise.
+ * doc/c-nios2.texi: Likewise.
+ * doc/c-ppc.texi: Likewise.
+ * doc/c-pru.texi: Likewise.
+ * doc/c-rl78.texi: Likewise.
+ * doc/c-rx.texi: Likewise.
+ * doc/c-tic6x.texi: Likewise.
+ * doc/c-v850.texi: Likewise.
+ * doc/c-vax.texi: Likewise.
+ * doc/c-visium.texi: Likewise.
+ * doc/c-xstormy16.texi: Likewise.
+ * doc/c-xtensa.texi: Likewise.
+ * doc/c-z80.texi: Likewise.
+ * doc/c-z8k.texi: Likewise.
+ * doc/internals.texi: Likewise.
+
+2018-06-29 Jim Wilson <jimw@sifive.com>
+
+ * config/tc-riscv.c (md_begin): Call hash_reg_name for "fp".
+
+2018-06-29 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
+
+ * config/tc-aarch64.c (warn_unpredictable_ldst): Add unpredictable
+ cases for ldxp, stlxrb, stlxrh, stlxr.
+ * testsuite/gas/aarch64/diagnostic.s: New tests.
+ * testsuite/gas/aarch64/diagnostic.l: Adjust.
+
+2018-06-29 Tamar Christina <tamar.christina@arm.com>
+
+ PR binutils/23192
+ * config/tc-aarch64.c (process_omitted_operand, parse_operands): Add
+ AARCH64_OPND_Em16
+ * testsuite/gas/aarch64/advsimd-armv8_3.s: Expand tests to cover upper
+ 16 registers.
+ * testsuite/gas/aarch64/advsimd-armv8_3.d: Likewise.
+ * testsuite/gas/aarch64/advsimd-compnum.s: Likewise.
+ * testsuite/gas/aarch64/advsimd-compnum.d: Likewise.
+ * testsuite/gas/aarch64/sve.d: Likewise.
+
+2018-06-27 Alan Modra <amodra@gmail.com>
+
+ * configure.ac: Specify extra_objects with leading "config/"
+ for xtensa-relax.o and te-vms.o. Use case statements to unique
+ extra_objects. Formatting.
+ * configure: Regenerate.
+
+2018-06-26 Nick Clifton <nickc@redhat.com>
+
+ * po/uk.po: Updated Ukranian translation.
+
+2018-06-26 Nick Clifton <nickc@redhat.com>
+
+ PR 23335
+ * config/tc-msp430.c (check_reg): Only accept register name
+ strings that do not end in an alphanumeric character.
+ * testsuite/gas/msp430/msp430x.d: Update expected disassembly.
+
+2018-06-24 Nick Clifton <nickc@redhat.com>
+
+ * configure: Regenerate.
+ * po/gas.pot: Regenerate.
+
+2018-06-24 Nick Clifton <nickc@redhat.com>
+
+ 2.31 branch created.
+ * NEWS: Add marker for 2.31.
+
+2018-06-22 Tamar Christina <tamar.christina@arm.com>
+
+ * testsuite/gas/aarch64/addsub.s: Add negs to zero reg test.
+ * testsuite/gas/aarch64/addsub.d: Likewise.
+
+2018-06-21 Alan Modra <amodra@gmail.com>
+
+ * doc/Makefile.am (AUTOMAKE_OPTIONS): Add "foreign".
+ * doc/Makefile.in: Regenerate.
+
+2018-06-20 Nick Clifton <nickc@redhat.com>
+
+ PR 21458
+ * tc-arm.c (do_adr): Only set the bottom bit of an imported thumb
+ function symbol address if -mthumb-interwork is active.
+ (do_adrl): Likewise.
+ * doc/c-arm.texi: Update descriptions of the -mthumb-interwork
+ option and the ADR and ADRL pseudo-ops.
+ * NEWS: Mention the new behaviour of the ADR and ADRL pseudo-ops.
+ * testsuite/gas/arm/pr21458.d: Add -mthumb-interwork option to
+ assembler command line.
+ * testsuite/gas/arm/adr.d: Likewise.
+ * testsuite/gas/arm/adrl.d: Likewise.
+
+2018-06-20 Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+ PR gas/23305
+ * config/tc-riscv.c (riscv_ip): Add format specifier 'B' for
+ constants and symbols.
+ * testsuite/gas/riscv/lla32.d: New file.
+ * testsuite/gas/riscv/lla32.s: Likewise.
+ * testsuite/gas/riscv/lla64-fail.d: Likewise.
+ * testsuite/gas/riscv/lla64-fail.l: Likewise.
+ * testsuite/gas/riscv/lla64-fail.s: Likewise.
+ * testsuite/gas/riscv/lla64.d: Likewise.
+ * testsuite/gas/riscv/lla64.s: Likewise.
+
+2018-06-19 Simon Marchi <simon.marchi@ericsson.com>
+
+ * Makefile.am (AUTOMAKE_OPTIONS): Remove 1.11, add subdir-objects.
+ (TARG_CPU_O, OBJ_FORMAT_O, ATOF_TARG_O): Add config/ prefix.
+ * configure.ac (TARG_CPU_O, OBJ_FORMAT_O, ATOF_TARG_O, emfiles,
+ extra_objects): Add config/ prefix.
+ * doc/as.texinfo: Rename to...
+ * doc/as.texi: ... this.
+ * doc/Makefile.am: Rename as.texinfo to as.texi throughout.
+ Remove DISTCLEANFILES hack.
+ (AUTOMAKE_OPTIONS): Remove 1.8, cygnus, add no-texinfo.tex and
+ info-in-builddir.
+ * Makefile.in: Re-generate.
+ * aclocal.m4: Re-generate.
+ * config.in: Re-generate.
+ * configure: Re-generate.
+ * doc/Makefile.in: Re-generate.
+
+2018-06-14 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
+
+ * NEWS: Mention MIPS Global INValidate ASE support.
+ * config/tc-mips.c (options): Add OPTION_GINV and OPTION_NO_GINV.
+ (md_longopts): Likewise.
+ (mips_ases): Define availability for GINV.
+ (mips_convert_ase_flags): Map ASE_GINV to AFL_ASE_GINV.
+ (md_show_usage): Add help for -mginv and -mno-ginv.
+ * doc/as.texinfo: Document -mginv, -mno-ginv.
+ * doc/c-mips.texi: Document -mginv, -mno-ginv, .set ginv and
+ .set noginv.
+ * testsuite/gas/mips/ase-errors-1.s: Add error checks for GINV
+ ASE.
+ * testsuite/gas/mips/ase-errors-2.s: Likewise.
+ * testsuite/gas/mips/ase-errors-1.l: Likewise.
+ * testsuite/gas/mips/ase-errors-2.l: Likewise.
+ * testsuite/gas/mips/ginv.d: New test.
+ * testsuite/gas/mips/ginv-err.d: New test.
+ * testsuite/gas/mips/ginv-err.l: New test stderr output.
+ * testsuite/gas/mips/ginv.s: New test source.
+ * testsuite/gas/mips/ginv-err.s: New test source.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2018-06-13 Scott Egerton <scott.egerton@imgtec.com>
+ Faraz Shahbazker <Faraz.Shahbazker@mips.com>
+ Maciej W. Rozycki <macro@mips.com>
+
+ * NEWS: Mention CRC ASE support.
+ * config/tc-mips.c (options): Add OPTION_CRC and OPTION_NO_CRC.
+ (md_longopts): Likewise.
+ (md_show_usage): Add help for -mcrc and -mno-crc.
+ (mips_ases): Define availability for CRC and CRC64.
+ (mips_convert_ase_flags): Map ASE_CRC to AFL_ASE_CRC.
+ * doc/as.texinfo: Document -mcrc, -mno-crc.
+ * doc/c-mips.texi: Document -mcrc, -mno-crc, .set crc and
+ .set no-crc.
+ * testsuite/gas/mips/ase-errors-1.l: Add error checks for CRC
+ ASE.
+ * testsuite/gas/mips/ase-errors-2.l: Likewise.
+ * testsuite/gas/mips/ase-errors-1.s: Likewise.
+ * testsuite/gas/mips/ase-errors-2.s: Likewise.
+ * testsuite/gas/mips/crc.d: New test.
+ * testsuite/gas/mips/crc64.d: New test.
+ * testsuite/gas/mips/crc-err.d: New test.
+ * testsuite/gas/mips/crc64-err.d: New test.
+ * testsuite/gas/mips/crc-err.l: New test stderr output.
+ * testsuite/gas/mips/crc64-err.l: New test stderr output.
+ * testsuite/gas/mips/crc.s: New test source.
+ * testsuite/gas/mips/crc64.s: New test source.
+ * testsuite/gas/mips/crc-err.s: New test source.
+ * testsuite/gas/mips/crc64-err.s: New test source.
+ * testsuite/gas/mips/mips.exp: Run the new tests.
+
+2018-06-11 Maciej W. Rozycki <macro@mips.com>
+
+ * config/tc-mips.c (md_show_usage): Correct help text for `-O0'
+ and `-O'. Mention `-O1'. Add `-O2' and its description.
+
+2018-06-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/tc-arm.c (arm_cpus): Add Cortex-A76 entry.
+ * doc/c-arm.texi (-mcpu): Document cortex-a76.
+
+2018-06-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/tc-aarch64.c (aarch64_cpus): Add Cortex-A76 entry.
+ * doc/c-aarch64.texi (-mcpu): Document cortex-a76.
+
+2018-06-08 Egeyar Bagcioglu <egeyar.bagcioglu@oracle.com>
+
+ PR 20319
+ * testsuite/gas/aarch64/illegal-3.s: Test if unallocated FMOV encodings
+ are detected as undefined.
+ * testsuite/gas/aarch64/illegal-3.d: Likewise.
+ * testsuite/gas/aarch64/illegal.s: Test if FMOV instructions that are
+ changing the size from 32 bits to 64 bits and vice versa trigger an
+ error.
+ * testsuite/gas/aarch64/illegal.l: Likewise.
+
+2018-06-08 Tamar Christina <tamar.christina@arm.com>
+
+ PR binutils/21446
+ * tc-aarch64.c (record_operand_error, record_operand_error_with_data):
+ Initialize non_fatal.
+
+2018-06-06 Sameera Deshpande <sameera.deshpande@linaro.org>
+
+ * config/tc-aarch64.c (aarch64_cpus): Add support of ARMv8.4 in
+ saphira.
+
+2018-06-05 Alan Modra <amodra@gmail.com>
+
+ * Makefile.in: Regenerate.
+
+2018-06-04 Volodymyr Arbatov <arbatov@cadence.com>
+
+ * config/tc-xtensa.c (elf32xtensa_separate_props): New
+ declaration.
+ (option_separate_props, option_no_separate_props): New
+ enumeration constants.
+ (md_longopts): Add separate-prop-tables option.
+ (md_parse_option): Add cases for option_separate_props and
+ option_no_separate_props.
+ (md_show_usage): Add help for [no-]separate-prop-tables options.
+
+2018-06-01 H.J. Lu <hongjiu.lu@intel.com>
+
+ * configure: Regenerated.
+
+2018-06-01 Alexandre Oliva <aoliva@redhat.com>
+
+ * dwarf2dbg.c (dwarf2_consume_line_info): Drop view.
+
+2018-06-01 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/ilp32/x86-64-opcode.d,
+ testsuite/gas/i386/x86-64-opcode.d: Adjust expectations.
+
+2018-06-01 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (add_prefix): Check REX bits individually.
+ * testsuite/gas/i386/rex.s: Add tests for overriding individual
+ REX bits, including when others are already set.
+ * testsuite/gas/i386/ilp32/rex.d, testsuite/gas/i386/rex.d:
+ Adjust expectations.
+
+2018-06-01 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (control): Delete.
+ (parse_real_register): Simply check "control" bit. Re-wrap.
+
+2018-06-01 Jan Beulich <jbeulich@suse.com>
+
+ * config/tc-i386.c (build_modrm_byte): Drop REX_B from condition
+ checking for the need of emitting LOCK. Check "control" bit just
+ once.
+
+2018-06-01 Jan Beulich <jbeulich@suse.com>
+
+ * testsuite/gas/i386/invpcid.s,
+ testsuite/gas/i386/x86-64-invpcid.s: Add test with explicit
+ "oword ptr".
+ * testsuite/gas/i386/invpcid.d,
+ testsuite/gas/i386/invpcid-intel.d,
+ testsuite/gas/i386/x86-64-invpcid.d,
+ testsuite/gas/i386/x86-64-invpcid-intel.d: Adjust expectations.
+
+2018-05-30 Amit Pawar <amit.pawar@amd.com>
+
+ * config/tc-i386.c (cpu_flag_init): Add CPU_ZNVER2_FLAGS.
+ * doc/c-i386.texi : Document znver2.
+ * gas/testsuite/gas/i386/arch-13.s: Updated for znver2.
+ * gas/testsuite/gas/i386/arch-13.d: Updated.
+ * gas/testsuite/gas/i386/arch-13-znver1.d: Updated.
+ * gas/testsuite/gas/i386/arch-13-znver2.d: New file.
+ * gas/testsuite/gas/i386/x86-64-arch-3.s: Updated for znver2.
+ * gas/testsuite/gas/i386/x86-64-arch-3.d: Updated.
+ * gas/testsuite/gas/i386/x86-64-arch-3-znver1.d: Updated.
+ * gas/testsuite/gas/i386/x86-64-arch-3-znver2.d: New file.
+ * gas/testsuite/gas/i386/i386.exp: Updated for new test.
+
+2018-05-25 Alan Modra <amodra@gmail.com>
+
+ * po/POTFILES.in: Regenerate.
+
+2018-05-24 Jim Wilson <jimw@sifive.com>
+
+ PR gas/23219
+ * config/tc-riscv.c (riscv_frag_align_code): Move frag_more call after
+ !riscv_opts.relax check.
+ (riscv_handle_align): Rewrite !riscv_opts.relax support.
+ * config/tc-riscv (MAX_MEM_FOR_RS_ALIGN_CODE): Update.
+ * testsuite/gas/riscv/no-relax-align.d: New
+ * testsuite/gas/riscv/no-relax-align.s: New
+ * testsuite/gas/riscv/no-relax-align-2.d: New
+ * testsuite/gas/riscv/no-relax-align-2.s: New
+
+2018-05-21 Peter Bergner <bergner@vnet.ibm.com.com>
+
+ * config/tc-ppc.c (md_assemble): Delete handling of fake operands.
+ * testsuite/gas/ppc/common.s (crmove, cror, or., or, nor., nor): Add
+ test of extended mnemonics.
+ * testsuite/gas/ppc/common.d: Likewise. Don't match instruction offset.
+ * testsuite/gas/ppc/spe.s (evor, evnor): Add test of extended mnemonics.
+ * testsuite/gas/ppc/spe.d: Likewise. Don't match instruction offset.
+
+2018-05-18 Kito Cheng <kito.cheng@gmail.com>
+ Monk Chiang <sh.chiang04@gmail.com>
+ Jim Wilson <jimw@sifive.com>
+
+ * config/tc-riscv.c (rve_abi): New.
+ (riscv_set_options): Add rve field. Initialize it.
+ (riscv_set_rve) New function.
+ (riscv_set_arch): Support 'e' ISA subset.
+ (reg_lookup_internal): If rve, check register is available.
+ (riscv_set_abi): New parameter rve.
+ (md_parse_option): Pass new argument to riscv_set_abi.
+ (riscv_after_parse_args): Call riscv_set_rve. If rve_abi, set
+ EF_RISCV_RVE.
+ * doc/c-riscv.texi (-mabi): Document new ilp32e argument.
+
+2018-05-18 John Darrington <john@darrington.wattle.id.au>
+
+ * Makefile.am: Add support for s12z target.
+ * Makefile.in: Regenerate.
+ * NEWS: Mention the new support.
+ * config/tc-s12z.c: New file.
+ * config/tc-s12z.h: New file.
+ * configure.tgt: Add s12z support.
+ * doc/Makefile.am: Likewise.
+ * doc/Makefile.in: Regenerate.
+ * doc/all.texi: Add s12z documentation.
+ * doc/as.textinfo: Likewise.
+ * doc/c-s12z.texi: New file.
+ * testsuite/gas/s12z: New directory.
+ * testsuite/gas/s12z/abs.d: New file.
+ * testsuite/gas/s12z/abs.s: New file.
+ * testsuite/gas/s12z/adc-imm.d: New file.
+ * testsuite/gas/s12z/adc-imm.s: New file.
+ * testsuite/gas/s12z/adc-opr.d: New file.
+ * testsuite/gas/s12z/adc-opr.s: New file.
+ * testsuite/gas/s12z/add-imm.d: New file.
+ * testsuite/gas/s12z/add-imm.s: New file.
+ * testsuite/gas/s12z/add-opr.d: New file.
+ * testsuite/gas/s12z/add-opr.s: New file.
+ * testsuite/gas/s12z/and-imm.d: New file.
+ * testsuite/gas/s12z/and-imm.s: New file.
+ * testsuite/gas/s12z/and-opr.d: New file.
+ * testsuite/gas/s12z/and-opr.s: New file.
+ * testsuite/gas/s12z/and-or-cc.d: New file.
+ * testsuite/gas/s12z/and-or-cc.s: New file.
+ * testsuite/gas/s12z/bfext-special.d: New file.
+ * testsuite/gas/s12z/bfext-special.s: New file.
+ * testsuite/gas/s12z/bfext.d: New file.
+ * testsuite/gas/s12z/bfext.s: New file.
+ * testsuite/gas/s12z/bit-manip.d: New file.
+ * testsuite/gas/s12z/bit-manip.s: New file.
+ * testsuite/gas/s12z/bit.d: New file.
+ * testsuite/gas/s12z/bit.s: New file.
+ * testsuite/gas/s12z/bra-expression-defined.d: New file.
+ * testsuite/gas/s12z/bra-expression-defined.s: New file.
+ * testsuite/gas/s12z/bra-expression-undef.d: New file.
+ * testsuite/gas/s12z/bra-expression-undef.s: New file.
+ * testsuite/gas/s12z/bra.d: New file.
+ * testsuite/gas/s12z/bra.s: New file.
+ * testsuite/gas/s12z/brclr-symbols.d: New file.
+ * testsuite/gas/s12z/brclr-symbols.s: New file.
+ * testsuite/gas/s12z/brset-clr-opr-imm-rel.d: New file.
+ * testsuite/gas/s12z/brset-clr-opr-imm-rel.s: New file.
+ * testsuite/gas/s12z/brset-clr-opr-reg-rel.d: New file.
+ * testsuite/gas/s12z/brset-clr-opr-reg-rel.s: New file.
+ * testsuite/gas/s12z/brset-clr-reg-imm-rel.d: New file.
+ * testsuite/gas/s12z/brset-clr-reg-imm-rel.s: New file.
+ * testsuite/gas/s12z/brset-clr-reg-reg-rel.d: New file.
+ * testsuite/gas/s12z/brset-clr-reg-reg-rel.s: New file.
+ * testsuite/gas/s12z/clb.d: New file.
+ * testsuite/gas/s12z/clb.s: New file.
+ * testsuite/gas/s12z/clr-opr.d: New file.
+ * testsuite/gas/s12z/clr-opr.s: New file.
+ * testsuite/gas/s12z/clr.d: New file.
+ * testsuite/gas/s12z/clr.s: New file.
+ * testsuite/gas/s12z/cmp-imm.d: New file.
+ * testsuite/gas/s12z/cmp-imm.s: New file.
+ * testsuite/gas/s12z/cmp-opr-inc.d: New file.
+ * testsuite/gas/s12z/cmp-opr-inc.s: New file.
+ * testsuite/gas/s12z/cmp-opr-rdirect.d: New file.
+ * testsuite/gas/s12z/cmp-opr-rdirect.s: New file.
+ * testsuite/gas/s12z/cmp-opr-reg.d: New file.
+ * testsuite/gas/s12z/cmp-opr-reg.s: New file.
+ * testsuite/gas/s12z/cmp-opr-rindirect.d: New file.
+ * testsuite/gas/s12z/cmp-opr-rindirect.s: New file.
+ * testsuite/gas/s12z/cmp-opr-sxe4.d: New file.
+ * testsuite/gas/s12z/cmp-opr-sxe4.s: New file.
+ * testsuite/gas/s12z/cmp-opr-xys.d: New file.
+ * testsuite/gas/s12z/cmp-opr-xys.s: New file.
+ * testsuite/gas/s12z/cmp-s-imm.d: New file.
+ * testsuite/gas/s12z/cmp-s-imm.s: New file.
+ * testsuite/gas/s12z/cmp-s-opr.d: New file.
+ * testsuite/gas/s12z/cmp-s-opr.s: New file.
+ * testsuite/gas/s12z/cmp-xy.d: New file.
+ * testsuite/gas/s12z/cmp-xy.s: New file.
+ * testsuite/gas/s12z/com-opr.d: New file.
+ * testsuite/gas/s12z/com-opr.s: New file.
+ * testsuite/gas/s12z/complex-shifts.d: New file.
+ * testsuite/gas/s12z/complex-shifts.s: New file.
+ * testsuite/gas/s12z/db-tb-cc-opr.d: New file.
+ * testsuite/gas/s12z/db-tb-cc-opr.s: New file.
+ * testsuite/gas/s12z/db-tb-cc-reg.d: New file.
+ * testsuite/gas/s12z/db-tb-cc-reg.s: New file.
+ * testsuite/gas/s12z/dbCC.d: New file.
+ * testsuite/gas/s12z/dbCC.s: New file.
+ * testsuite/gas/s12z/dec-opr.d: New file.
+ * testsuite/gas/s12z/dec-opr.s: New file.
+ * testsuite/gas/s12z/dec.d: New file.
+ * testsuite/gas/s12z/dec.s: New file.
+ * testsuite/gas/s12z/div.d: New file.
+ * testsuite/gas/s12z/div.s: New file.
+ * testsuite/gas/s12z/eor.d: New file.
+ * testsuite/gas/s12z/eor.s: New file.
+ * testsuite/gas/s12z/exg.d: New file.
+ * testsuite/gas/s12z/exg.s: New file.
+ * testsuite/gas/s12z/ext24-ld-xy.d: New file.
+ * testsuite/gas/s12z/ext24-ld-xy.s: New file.
+ * testsuite/gas/s12z/inc-opr.d: New file.
+ * testsuite/gas/s12z/inc-opr.s: New file.
+ * testsuite/gas/s12z/inc.d: New file.
+ * testsuite/gas/s12z/inc.s: New file.
+ * testsuite/gas/s12z/inh.d: New file.
+ * testsuite/gas/s12z/inh.s: New file.
+ * testsuite/gas/s12z/jmp.d: New file.
+ * testsuite/gas/s12z/jmp.s: New file.
+ * testsuite/gas/s12z/jsr.d: New file.
+ * testsuite/gas/s12z/jsr.s: New file.
+ * testsuite/gas/s12z/ld-imm-page2.d: New file.
+ * testsuite/gas/s12z/ld-imm-page2.s: New file.
+ * testsuite/gas/s12z/ld-imm.d: New file.
+ * testsuite/gas/s12z/ld-imm.s: New file.
+ * testsuite/gas/s12z/ld-immu18.d: New file.
+ * testsuite/gas/s12z/ld-immu18.s: New file.
+ * testsuite/gas/s12z/ld-large-direct.d: New file.
+ * testsuite/gas/s12z/ld-large-direct.s: New file.
+ * testsuite/gas/s12z/ld-opr.d: New file.
+ * testsuite/gas/s12z/ld-opr.s: New file.
+ * testsuite/gas/s12z/ld-s-opr.d: New file.
+ * testsuite/gas/s12z/ld-s-opr.s: New file.
+ * testsuite/gas/s12z/ld-small-direct.d: New file.
+ * testsuite/gas/s12z/ld-small-direct.s: New file.
+ * testsuite/gas/s12z/lea-immu18.d: New file.
+ * testsuite/gas/s12z/lea-immu18.s: New file.
+ * testsuite/gas/s12z/lea.d: New file.
+ * testsuite/gas/s12z/lea.s: New file.
+ * testsuite/gas/s12z/mac.d: New file.
+ * testsuite/gas/s12z/mac.s: New file.
+ * testsuite/gas/s12z/min-max.d: New file.
+ * testsuite/gas/s12z/min-max.s: New file.
+ * testsuite/gas/s12z/mod.d: New file.
+ * testsuite/gas/s12z/mod.s: New file.
+ * testsuite/gas/s12z/mov.d: New file.
+ * testsuite/gas/s12z/mov.s: New file.
+ * testsuite/gas/s12z/mul-imm.d: New file.
+ * testsuite/gas/s12z/mul-imm.s: New file.
+ * testsuite/gas/s12z/mul-opr-opr.d: New file.
+ * testsuite/gas/s12z/mul-opr-opr.s: New file.
+ * testsuite/gas/s12z/mul-opr.d: New file.
+ * testsuite/gas/s12z/mul-opr.s: New file.
+ * testsuite/gas/s12z/mul-reg.d: New file.
+ * testsuite/gas/s12z/mul-reg.s: New file.
+ * testsuite/gas/s12z/mul.d: New file.
+ * testsuite/gas/s12z/mul.s: New file.
+ * testsuite/gas/s12z/neg-opr.d: New file.
+ * testsuite/gas/s12z/neg-opr.s: New file.
+ * testsuite/gas/s12z/not-so-simple-shifts.d: New file.
+ * testsuite/gas/s12z/not-so-simple-shifts.s: New file.
+ * testsuite/gas/s12z/opr-18u.d: New file.
+ * testsuite/gas/s12z/opr-18u.s: New file.
+ * testsuite/gas/s12z/opr-expr.d: New file.
+ * testsuite/gas/s12z/opr-expr.s: New file.
+ * testsuite/gas/s12z/opr-ext-18.d: New file.
+ * testsuite/gas/s12z/opr-ext-18.s: New file.
+ * testsuite/gas/s12z/opr-idx-24-reg.d: New file.
+ * testsuite/gas/s12z/opr-idx-24-reg.s: New file.
+ * testsuite/gas/s12z/opr-idx3-reg.d: New file.
+ * testsuite/gas/s12z/opr-idx3-reg.s: New file.
+ * testsuite/gas/s12z/opr-idx3-xysp-24.d: New file.
+ * testsuite/gas/s12z/opr-idx3-xysp-24.s: New file.
+ * testsuite/gas/s12z/opr-indirect-expr.d: New file.
+ * testsuite/gas/s12z/opr-indirect-expr.s: New file.
+ * testsuite/gas/s12z/opr-symbol.d: New file.
+ * testsuite/gas/s12z/opr-symbol.s: New file.
+ * testsuite/gas/s12z/or-imm.d: New file.
+ * testsuite/gas/s12z/or-imm.s: New file.
+ * testsuite/gas/s12z/or-opr.d: New file.
+ * testsuite/gas/s12z/or-opr.s: New file.
+ * testsuite/gas/s12z/p2-mul.d: New file.
+ * testsuite/gas/s12z/p2-mul.s: New file.
+ * testsuite/gas/s12z/page2-inh.d: New file.
+ * testsuite/gas/s12z/page2-inh.s: New file.
+ * testsuite/gas/s12z/psh-pul.d: New file.
+ * testsuite/gas/s12z/psh-pul.s: New file.
+ * testsuite/gas/s12z/qmul.d: New file.
+ * testsuite/gas/s12z/qmul.s: New file.
+ * testsuite/gas/s12z/rotate.d: New file.
+ * testsuite/gas/s12z/rotate.s: New file.
+ * testsuite/gas/s12z/s12z.exp: New file.
+ * testsuite/gas/s12z/sat.d: New file.
+ * testsuite/gas/s12z/sat.s: New file.
+ * testsuite/gas/s12z/sbc-imm.d: New file.
+ * testsuite/gas/s12z/sbc-imm.s: New file.
+ * testsuite/gas/s12z/sbc-opr.d: New file.
+ * testsuite/gas/s12z/sbc-opr.s: New file.
+ * testsuite/gas/s12z/shift.d: New file.
+ * testsuite/gas/s12z/shift.s: New file.
+ * testsuite/gas/s12z/simple-shift.d: New file.
+ * testsuite/gas/s12z/simple-shift.s: New file.
+ * testsuite/gas/s12z/single-ops.d: New file.
+ * testsuite/gas/s12z/single-ops.s: New file.
+ * testsuite/gas/s12z/specd6.d: New file.
+ * testsuite/gas/s12z/specd6.s: New file.
+ * testsuite/gas/s12z/st-large-direct.d: New file.
+ * testsuite/gas/s12z/st-large-direct.s: New file.
+ * testsuite/gas/s12z/st-opr.d: New file.
+ * testsuite/gas/s12z/st-opr.s: New file.
+ * testsuite/gas/s12z/st-s-opr.d: New file.
+ * testsuite/gas/s12z/st-s-opr.s: New file.
+ * testsuite/gas/s12z/st-small-direct.d: New file.
+ * testsuite/gas/s12z/st-small-direct.s: New file.
+ * testsuite/gas/s12z/st-xy.d: New file.
+ * testsuite/gas/s12z/st-xy.s: New file.
+ * testsuite/gas/s12z/sub-imm.d: New file.
+ * testsuite/gas/s12z/sub-imm.s: New file.
+ * testsuite/gas/s12z/sub-opr.d: New file.
+ * testsuite/gas/s12z/sub-opr.s: New file.
+ * testsuite/gas/s12z/tfr.d: New file.
+ * testsuite/gas/s12z/tfr.s: New file.
+ * testsuite/gas/s12z/trap.d: New file.
+ * testsuite/gas/s12z/trap.s: New file.
+
+2018-05-16 Maciej W. Rozycki <macro@mips.com>
+
+ * tc-nds32.c (md_assemble): Rename `expr' local variable to
+ `insn_expr'.
+
+2018-05-15 Tamar Christina <tamar.christina@arm.com>
+
+ PR binutils/21446
+ * testsuite/gas/aarch64/illegal-sysreg-2.s: Fix pmbidr_el1 test.
+ * testsuite/gas/aarch64/illegal-sysreg-2.l: Likewise.
+ * testsuite/gas/aarch64/illegal-sysreg-2.d: Likewise.
+ * testsuite/gas/aarch64/sysreg-diagnostic.s: New.
+ * testsuite/gas/aarch64/sysreg-diagnostic.l: New.
+ * testsuite/gas/aarch64/sysreg-diagnostic.d: New.
+
+2018-05-15 Tamar Christina <tamar.christina@arm.com>
+
+ PR binutils/21446
+ * config/tc-aarch64.c (print_operands): Indicate no notes.
+ (output_operand_error_record): Support non-fatal errors.
+ (output_operand_error_report, warn_unpredictable_ldst, md_assemble):
+ Likewise.
+
+2018-05-15 Tamar Christina <tamar.christina@arm.com>
+
+ PR binutils/21446
+ * config/tc-aarch64.c (parse_sys_reg): Return register flags.
+ (parse_operands): Fill in register flags.
+
2018-05-14 Nick Clifton <nickc@redhat.com>
* write.c (maybe_generate_build_notes): Generate notes on a
projects / thirdparty / binutils-gdb.git / blobdiff