]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blobdiff - gas/ChangeLog
Add support for msp430x21xx variants
[thirdparty/binutils-gdb.git] / gas / ChangeLog
index 8a6d0c00cd9d16e61eb9fbb78131184fac9be282..917565622767a1eaa1608f0cd4b9ea07bc679994 100644 (file)
@@ -1,3 +1,154 @@
+2005-08-08  Nick Clifton  <nickc@redhat.com>
+
+       * config/tc-msp430.c (MSP430_ISA_21): Define.
+       (mcu_types): Add entries for msp430x21xx variants.
+
+2005-08-08  Nick Clifton  <nickc@redhat.com>
+
+       PR 1070
+       * macro.c (getstring): Treat round parentheses in the same way as
+       angle brackets.
+       (get_any_string): Likewise.
+
+2005-08-07  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR gas/1118
+       * as.c (parse_args): Handle -al=<FILE>.
+
+2005-08-07  Nick Clifton  <nickc@redhat.com>
+
+       * read.c (s_app_line): Accept a line number of 0 for compatibility
+       with gcc's output for assembler-with-cpp files.
+
+2005-08-05  Paul Brook  <paul@codesourcery.com>
+
+       * config/tc-arm.c (current_it_mask, current_cc): New variables.
+       (do_t_add_sub): Use correct encodings inside IT block.
+       (do_t_arit3c): Ditto.
+       (do_t_it): Simplify logic.  Set current_it_mask and current_cc.
+       (md_assemble): Verify conditional suffixes agains IT blocks.
+
+2005-08-05  Paul Brook  <paul@codesourcery.com>
+
+       * config/tc-arm.c (encode_thumb32_immediate): Only accept shifted
+       constants.
+       (encode_thumb32_shifted_operand): Prohibit register shifts.
+       (encode_thumb32_addr_mode): Fix typo.
+       (insns): Correct thumb2 ldm and stm opcodes.
+
+2005-08-02  Khem Raj  <kraj@mvista.com>
+
+       * config/tc-arm.c (do_iwmmxt_wldstd): Correct the offset range for
+       WLDRD/WSTRD instruction.
+
+2005-08-02  Alan Modra  <amodra@bigpond.net.au>
+
+       * config/tc-ppc.c (md_apply_fix <ELF>): Don't warn on overflow
+       if emitting a reloc.
+
+2005-07-29  Thiemo Seufer  <ths@networkno.de>
+
+       * config/tc-mips.c (s_mips_globl): Allow multiple symbols per .globl.
+
+2005-07-29  Paul Brook  <paul@codesourcery.com>
+
+       * config/tc-arm.c (T16_32_TAB): Add "addr". Fix encoding of push and
+       pop.
+       (do_t_addr): Implement 32-bit variant.
+       (do_t_push_pop): Make some errors warnings.  Handle single register
+       32-bit case.
+       (insns): Use tCE for adr.
+       (md_pcrel_from_section): Handle BFD_RELOC_ARM_T32_ADD_PC12.
+       (md_apply_fix): Ditto.
+
+2005-07-29  Paul Brook  <paul@codesourcery.com>
+
+       * config/tc-arm.c (parse_tb): New function.
+       (enum operand_parse_code): Add OP_TB.
+       (parse_operands): Handle OP_TB.
+       (do_t_add_sub_w, do_t_tb): New functions.
+       (insns): Add entries for addw, subw, tbb and tbh.
+       (md_apply_fix): Handle BFD_RELOC_ARM_T32_IMM12.
+
+2005-07-29  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
+
+       * config/tc-m32r.c (m32r_check_fixup): Fixed X_op check.
+
+2007-07-27  H.J. Lu <hongjiu.lu@intel.com>
+
+       * config/tc-i386.c (handle_large_common): Declare only for ELF.
+
+2005-07-27  Jan Beulich  <jbeulich@novell.com>
+
+       * config/tc-ia64.h (unw_r_record): Change type of fr_mem to unsigned
+       int.
+       (unw_p_record): Remove unused/redundant fields imask and rmask.
+       Combine spoff and pspoff into a union. Combine gr and br into a
+       union. Change type of grmask and brmask to unsigned char. Change type
+       of frmask to unsigned int.
+       (unw_x_record): Combine spoff, pspoff, and treg into a union.
+       * config/tc-ia64.c (unwind): New field 'pending_saves'.
+       (check_pending_save): New.
+       (alloc_record): Clear out entire record.
+       (output_psp_gr): Use renamed structure fields.
+       (output_psp_sprel): Likewise.
+       (output_rp_gr): Likewise.
+       (output_rp_br): Likewise.
+       (output_rp_psprel): Likewise.
+       (output_rp_sprel): Likewise.
+       (output_pfs_gr): Likewise.
+       (output_pfs_psprel): Likewise.
+       (output_pfs_sprel): Likewise.
+       (output_preds_gr): Likewise.
+       (output_preds_psprel): Likewise.
+       (output_preds_sprel): Likewise.
+       (output_spill_base): Likewise.
+       (output_unat_gr): Likewise.
+       (output_unat_psprel): Likewise.
+       (output_unat_sprel): Likewise.
+       (output_lc_gr): Likewise.
+       (output_lc_psprel): Likewise.
+       (output_lc_sprel): Likewise.
+       (output_fpsr_gr): Likewise.
+       (output_fpsr_psprel): Likewise.
+       (output_fpsr_sprel): Likewise.
+       (output_priunat_gr): Likewise.
+       (output_priunat_psprel): Likewise.
+       (output_priunat_sprel): Likewise.
+       (output_bsp_gr): Likewise.
+       (output_bsp_psprel): Likewise.
+       (output_bsp_sprel): Likewise.
+       (output_bspstore_gr): Likewise.
+       (output_bspstore_psprel): Likewise.
+       (output_bspstore_sprel): Likewise.
+       (output_rnat_gr): Likewise.
+       (output_rnat_psprel): Likewise.
+       (output_rnat_sprel): Likewise.
+       (output_spill_psprel): Likewise.
+       (output_spill_sprel): Likewise.
+       (output_spill_reg): Likewise.
+       (output_fr_mem): Likewise. Allocate one unwind record per set mask
+       bit.
+       (output_frgr_mem): Likewise.
+       (output_gr_mem): Likewise.
+       (output_br_mem): Likewise.
+       (output_gr_gr): Likewise.
+       (output_br_gr): Likewise.
+       (fixup_unw_records): Likewise.
+       (process_one_record): Use renamed structure fields. For gr_gr and
+       br_gr, collect mask from chain of records before output.
+       (in_prologue): Simplify and eliminate early returns. Call
+       check_pending_save.
+       (in_body): Simplify and eliminate early returns.
+       (dot_body): Call check_pending_save.
+       (md_assemble): Update comment. Deal with pending saves.
+
+2005-07-26  Jan Beulich  <jbeulich@novell.com>
+
+       * config/tc-i386.c (optimize_imm): Calculate candidate immediates
+       mask from guessed suffix, but mask out other immediate types only
+       if at least on candidate is valid for the insn.
+
 2005-07-25  DJ Delorie  <dj@redhat.com>
 
        * config/tc-m32c.c (md_cgen_lookup_reloc): Add 8 bit operands.