/* tc-d30v.c -- Assembler code for the Mitsubishi D30V
- Copyright 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005, 2006, 2007, 2008,
- 2009 Free Software Foundation, Inc.
+ Copyright (C) 1997-2022 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
const char EXP_CHARS[] = "eE";
const char FLT_CHARS[] = "dD";
-#if HAVE_LIMITS_H
#include <limits.h>
-#endif
-
#ifndef CHAR_BIT
#define CHAR_BIT 8
#endif
size_t md_longopts_size = sizeof (md_longopts);
/* Opcode hash table. */
-static struct hash_control *d30v_hash;
+static htab_t d30v_hash;
/* Do a binary search of the pre_defined_registers array to see if
- NAME is a valid regiter name. Return the register number from the
+ NAME is a valid register name. Return the register number from the
array on success, or -1 on failure. */
static int
fprintf (stream, _("\nD30V options:\n\
-O Make adjacent short instructions parallel if possible.\n\
-n Warn about all NOPs inserted by the assembler.\n\
--N Warn about NOPs inserted after word multiplies.\n\
--c Warn about symbols whoes names match register names.\n\
+-N Warn about NOPs inserted after word multiplies.\n\
+-c Warn about symbols whose names match register names.\n\
-C Opposite of -C. -c is the default.\n"));
}
int
-md_parse_option (int c, char *arg ATTRIBUTE_UNUSED)
+md_parse_option (int c, const char *arg ATTRIBUTE_UNUSED)
{
switch (c)
{
return 0;
}
-char *
+const char *
md_atof (int type, char *litP, int *sizeP)
{
- return ieee_md_atof (type, litP, sizeP, TRUE);
+ return ieee_md_atof (type, litP, sizeP, true);
}
void
valueT
md_section_align (asection *seg, valueT addr)
{
- int align = bfd_get_section_alignment (stdoutput, seg);
- return ((addr + (1 << align) - 1) & (-1 << align));
+ int align = bfd_section_alignment (seg);
+ return ((addr + (1 << align) - 1) & -(1 << align));
}
void
md_begin (void)
{
struct d30v_opcode *opcode;
- d30v_hash = hash_new ();
+ d30v_hash = str_htab_create ();
/* Insert opcode names into a hash table. */
for (opcode = (struct d30v_opcode *) d30v_opcode_table; opcode->name; opcode++)
- hash_insert (d30v_hash, opcode->name, (char *) opcode);
+ str_hash_insert (d30v_hash, opcode->name, opcode, 0);
fixups = &FixUps[0];
FixUps[0].next = &FixUps[1];
static long long
build_insn (struct d30v_insn *opcode, expressionS *opers)
{
- int i, length, bits, shift, flags;
+ int i, bits, shift, flags;
unsigned long number, id = 0;
long long insn;
struct d30v_opcode *op = opcode->op;
if (flags & OPERAND_SHIFT)
bits += 3;
- length = d30v_operand_table[form->operands[i]].length;
shift = 12 - d30v_operand_table[form->operands[i]].position;
if (opers[i].X_op != O_symbol)
number = opers[i].X_add_number;
for (r = regno; r <= regno + z; r++)
{
if (r >= 32)
- used_reg[j][1] |= 1L << (r - 32);
+ used_reg[j][1] |= 1UL << (r - 32);
else
- used_reg[j][0] |= 1L << r;
+ used_reg[j][0] |= 1UL << r;
}
}
}
we are not optimizing, then we have been asked to produce
an error about such constructs. For the purposes of this
test, subroutine calls are considered to be branches. */
- write_1_short (opcode1, insn1, fx->next, FALSE);
+ write_1_short (opcode1, insn1, fx->next, false);
return 1;
}
/* We must treat repeat instructions likewise, since the
following instruction has to be separate from the repeat
in order to be repeated. */
- write_1_short (opcode1, insn1, fx->next, FALSE);
+ write_1_short (opcode1, insn1, fx->next, false);
return 1;
}
else if (prev_left_kills_right_p)
{
- /* The left instruction kils the right slot, so we
+ /* The left instruction kills the right slot, so we
must leave it empty. */
- write_1_short (opcode1, insn1, fx->next, FALSE);
+ write_1_short (opcode1, insn1, fx->next, false);
return 1;
}
else if (opcode1->op->unit == IU)
/* Case 103810 is a request from Mitsubishi that opcodes
with EITHER_BUT_PREFER_MU should not be executed in
reverse sequential order. */
- write_1_short (opcode1, insn1, fx->next, FALSE);
+ write_1_short (opcode1, insn1, fx->next, false);
return 1;
}
int fsize,
int cmp_hack)
{
- int numops, match, opcode_index, i = 0, j, k;
+ int match, opcode_index, i = 0, j, k;
struct d30v_format *fm;
if (opcode == NULL)
return NULL;
/* Get all the operands and save them as expressions. */
- numops = get_operands (myops, cmp_hack);
+ get_operands (myops, cmp_hack);
while ((opcode_index = opcode->format[i++]) != 0)
{
{
int flags = d30v_operand_table[fm->operands[j]].flags;
int bits = d30v_operand_table[fm->operands[j]].bits;
- int X_op = myops[j].X_op;
+ operatorT X_op = myops[j].X_op;
int num = myops[j].X_add_number;
if (flags & OPERAND_SPECIAL)
/* Calculate the current address by running through the
previous frags and adding our current offset. */
- value = 0;
+ value = frag_now_fix_octets ();
for (f = frchain_now->frch_root; f; f = f->fr_next)
value += f->fr_fix + f->fr_offset;
- value = (S_GET_VALUE (myops[j].X_add_symbol) - value
- - (obstack_next_free (&frchain_now->frch_obstack)
- - frag_now->fr_literal));
+ value = S_GET_VALUE (myops[j].X_add_symbol) - value;
if (check_range (value, bits, flags))
match = 0;
}
opcode->ecc = ECC_AL;
/* CMP and CMPU change their name based on condition codes. */
- if (!strncmp (name, "cmp", 3))
+ if (startswith (name, "cmp"))
{
int p, i;
char **d30v_str = (char **) d30v_cc_names;
}
/* Find the first opcode with the proper name. */
- opcode->op = (struct d30v_opcode *) hash_find (d30v_hash, name);
+ opcode->op = (struct d30v_opcode *) str_hash_find (d30v_hash, name);
if (opcode->op == NULL)
{
as_bad (_("unknown opcode: %s"), name);
this alignment request. The alignment of the current frag
can be changed under our feet, for example by a .ascii
directive in the source code. cf testsuite/gas/d30v/reloc.s */
- d30v_cleanup (FALSE);
+ d30v_cleanup (false);
if (pfill == NULL)
{
if (n > 2
- && (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) != 0)
+ && (bfd_section_flags (now_seg) & SEC_CODE) != 0)
{
static char const nop[4] = { 0x00, 0xf0, 0x00, 0x00 };
if (label != NULL)
{
symbolS *sym;
- int label_seen = FALSE;
+ int label_seen = false;
struct frag *old_frag;
valueT old_value;
valueT new_value;
if (symbol_get_frag (sym) == old_frag
&& S_GET_VALUE (sym) == old_value)
{
- label_seen = TRUE;
+ label_seen = true;
symbol_set_frag (sym, frag_now);
S_SET_VALUE (sym, new_value);
}
if ((prev_insn != -1) && prev_seg
&& ((prev_seg != now_seg) || (prev_subseg != now_subseg)))
- d30v_cleanup (FALSE);
+ d30v_cleanup (false);
if (d30v_current_align < 3)
d30v_align (3, NULL, d30v_last_label);
/* If two instructions are present and we already have one saved,
then first write it out. */
- d30v_cleanup (FALSE);
+ d30v_cleanup (false);
/* Assemble first instruction and save it. */
prev_insn = do_assemble (str, &prev_opcode, 1, 0);
of NOPs for us. */
if (prev_insn != -1 && (strcmp (prev_opcode.op->name, "nop") == 0))
- d30v_cleanup (FALSE);
+ d30v_cleanup (false);
else
{
char *f;
if (prev_insn != -1)
- d30v_cleanup (TRUE);
+ d30v_cleanup (true);
else
{
f = frag_more (8);
{
/* Can't parallelize, flush current instruction and add a
sequential NOP. */
- write_1_short (&opcode, (long) insn, fixups->next->next, TRUE);
+ write_1_short (&opcode, (long) insn, fixups->next->next, true);
/* Make the previous instruction the current one. */
extype = EXEC_UNKNOWN;
{
if (extype != EXEC_UNKNOWN)
as_bad (_("Instruction uses long version, so it cannot be mixed as specified"));
- d30v_cleanup (FALSE);
+ d30v_cleanup (false);
write_long (&opcode, insn, fixups);
prev_insn = -1;
}
tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
{
arelent *reloc;
- reloc = xmalloc (sizeof (arelent));
- reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
+ reloc = XNEW (arelent);
+ reloc->sym_ptr_ptr = XNEW (asymbol *);
*reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
subseg_set (seg, subseg);
prev_insn = -1;
if (use_sequential)
- prev_mul32_p = FALSE;
+ prev_mul32_p = false;
}
return 1;
c++;
if (*c == '.')
- d30v_cleanup (FALSE);
+ d30v_cleanup (false);
}
static void
-check_size (long value, int bits, char *file, int line)
+check_size (long value, int bits, const char *file, int line)
{
int tmp, max;
d30v_frob_label (symbolS *lab)
{
/* Emit any pending instructions. */
- d30v_cleanup (FALSE);
+ d30v_cleanup (false);
/* Update the label's address with the current output pointer. */
symbol_set_frag (lab, frag_now);
{
int log_size;
+ /* Don't specially align anything in debug sections. */
+ if ((now_seg->flags & SEC_ALLOC) == 0
+ || strcmp (now_seg->name, ".eh_frame") == 0)
+ return;
+
log_size = 0;
while ((size >>= 1) != 0)
++log_size;
/* We don't support subtracting a symbol. */
if (fixP->fx_subsy != (symbolS *) NULL)
- as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
+ as_bad_subtract (fixP);
/* Fetch the instruction, insert the fully resolved operand
value, and stuff the instruction back again. */
switch (fixP->fx_r_type)
{
- case BFD_RELOC_8: /* Check for a bad .byte directive. */
- if (fixP->fx_addsy != NULL)
- as_bad (_("line %d: unable to place address of symbol '%s' into a byte"),
- fixP->fx_line, S_GET_NAME (fixP->fx_addsy));
- else if (((unsigned)value) > 0xff)
- as_bad (_("line %d: unable to place value %lx into a byte"),
- fixP->fx_line, value);
- else
- *(unsigned char *) where = value;
+ case BFD_RELOC_8:
+ *(unsigned char *) where = value;
break;
- case BFD_RELOC_16: /* Check for a bad .short directive. */
- if (fixP->fx_addsy != NULL)
- as_bad (_("line %d: unable to place address of symbol '%s' into a short"),
- fixP->fx_line, S_GET_NAME (fixP->fx_addsy));
- else if (((unsigned)value) > 0xffff)
- as_bad (_("line %d: unable to place value %lx into a short"),
- fixP->fx_line, value);
- else
- bfd_putb16 ((bfd_vma) value, (unsigned char *) where);
+ case BFD_RELOC_16:
+ bfd_putb16 ((bfd_vma) value, (unsigned char *) where);
break;
- case BFD_RELOC_64: /* Check for a bad .quad directive. */
- if (fixP->fx_addsy != NULL)
- as_bad (_("line %d: unable to place address of symbol '%s' into a quad"),
- fixP->fx_line, S_GET_NAME (fixP->fx_addsy));
- else
- {
- bfd_putb32 ((bfd_vma) value, (unsigned char *) where);
- bfd_putb32 (0, ((unsigned char *) where) + 4);
- }
+ case BFD_RELOC_64:
+ bfd_putb32 ((bfd_vma) value, (unsigned char *) where);
+ bfd_putb32 (0, ((unsigned char *) where) + 4);
break;
case BFD_RELOC_D30V_6:
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