-@c Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 1998 Free Software Foundation, Inc.
+@c Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 2000
+@c Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@ifset GENERIC
@chapter M32R Dependent Features
@end ifclear
-@c start-sanitize-m32rx
-
@cindex M32R support
@menu
* M32R-Opts:: M32R Options
dependent options:
@table @code
-@item --m32rx
-@cindex @samp{--m32rx} option, M32RX
+@item -m32rx
+@cindex @samp{-m32rx} option, M32RX
@cindex architecture options, M32RX
@cindex M32R architecture options
@code{@value{AS}} can assemble code for several different members of the
basic M32R instruction set, and some additional parameters to some of
the original instructions.
-@item --warn-explicit-parallel-conflicts
-@cindex @samp{--warn-explicit-parallel-conflicts} option, M32RX
+@item -m32r
+@cindex @samp{-m32r} option, M32R
+@cindex architecture options, M32R
+@cindex M32R architecture options
+This option can be used to restore the assembler's default behaviour of
+assembling for the M32R microprocessor. This can be useful if the
+default has been changed by a previous command line option.
+
+@item -warn-explicit-parallel-conflicts
+@cindex @samp{-warn-explicit-parallel-conflicts} option, M32RX
Instructs @code{@value{AS}} to produce warning messages when
questionable parallel instructions are encountered. This option is
enabled by default, but @code{@value{GCC}} disables it when it invokes
moves r1 into r3 and then r2 into r1, whereas the later moves r2 into r1
and r3.
-@item --no-warn-explicit-parallel-conflicts
-@cindex @samp{--no-warn-explicit-parallel-conflicts} option, M32RX
+@item -Wp
+@cindex @samp{-Wp} option, M32RX
+This is a shorter synonym for the @emph{-warn-explicit-parallel-conflicts}
+option.
+
+@item -no-warn-explicit-parallel-conflicts
+@cindex @samp{-no-warn-explicit-parallel-conflicts} option, M32RX
Instructs @code{@value{AS}} not to produce warning messages when
questionable parallel instructions are encountered.
+@item -Wnp
+@cindex @samp{-Wnp} option, M32RX
+This is a shorter synonym for the @emph{-no-warn-explicit-parallel-conflicts}
+option.
+
@end table
@node M32R-Warnings
@table @code
-@item output of first instruction is the same as the input of second instruction - is this intentional ?
+@item output of 1st instruction is the same as an input to 2nd instruction - is this intentional ?
This message is only produced if warnings for explicit parallel
conflicts have been enabled. It indicates that the assembler has
encountered a parallel instruction in which the destination register of
@samp{mv r1, r2 || neg r3, r1} register r1 is the destination of the
move instruction and the input to the neg instruction.
-@item output of second instruction is the same as the input of first instruction - is this intentional ?
+@item output of 2nd instruction is the same as an input to 1st instruction - is this intentional ?
This message is only produced if warnings for explicit parallel
conflicts have been enabled. It indicates that the assembler has
encountered a parallel instruction in which the destination register of
@item instruction @samp{...} is for the M32RX only
This message is produced when the assembler encounters an instruction
-which is only supported by the M32Rx processor, and the @samp{--m32rx}
+which is only supported by the M32Rx processor, and the @samp{-m32rx}
command line flag has not been specified to allow assembly of such
instructions.
+@item unknown instruction @samp{...}
+This message is produced when the assembler encounters an instruction
+which it doe snot recognise.
+
@item only the NOP instruction can be issued in parallel on the m32r
This message is produced when the assembler encounters a parallel
instruction which does not involve a NOP instruction and the
-@samp{--m32rx} command line flag has not been specified. Only the M32Rx
+@samp{-m32rx} command line flag has not been specified. Only the M32Rx
processor is able to execute two instructions in parallel.
@item instruction @samp{...} cannot be executed in parallel.
This message is produced when the assembler encounters a parallel
instruction whoes components both use the same execution pipeline.
-@item Both instructions write to the link register
-This message is produced when the assembler encounters a parallel
-instruction whoes components both write to the link register, one of
-them as a side effect. For example this code fragment will produce this
-message: @samp{jl r0 || mv r14, r1}
-
-@item Destination of first instruction written to by side effect of second instruction.
-This message is produced when the assembler encounters a parallel
-instruction whoes right hand component has a side effect which modifes a
-register used as the destination by the left hand component. For
-example this code fragment will produce this message:
-@samp{mv r1, r2 || ld r0, @@r1+}
-
-@item Destination of second instruction written to by side effect of first instruction.
-This message is produced when the assembler encounters a parallel
-instruction whoes left hand component has a side effect which modifes a
-register used as the destination by the right hand component. For
-example this code fragment will produce this message:
-@samp{st r2, @@-r1 || mv r1, r3}
-
@item Instructions write to the same destination register.
This message is produced when the assembler encounters a parallel
instruction where both components attempt to modify the same register.
-For example this code fragment will produce this message:
+For example these code fragments will produce this message:
@samp{mv r1, r2 || neg r1, r3}
+@samp{jl r0 || mv r14, r1}
+@samp{st r2, @@-r1 || mv r1, r3}
+@samp{mv r1, r2 || ld r0, @@r1+}
+@samp{cmp r1, r2 || addx r3, r4} (Both write to the condition bit)
@end table
-@c end-sanitize-m32rx
projects / thirdparty / binutils-gdb.git / blobdiff