2002-10-04 Michael Snyder <msnyder@redhat.com>

[thirdparty/binutils-gdb.git] / gas / doc / c-m32r.texi

diff --git a/gas/doc/c-m32r.texi b/gas/doc/c-m32r.texi
index df36aaa662372977b35946a4758ea63a63967827..9ec88fc9ec58e29589e73f2d8c81c32949d4479a 100644 (file)
--- a/gas/doc/c-m32r.texi
+++ b/gas/doc/c-m32r.texi
@@ -1,4 +1,5 @@
-@c Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 1998 Free Software Foundation, Inc.
+@c Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 2000
+@c Free Software Foundation, Inc.
 @c This is part of the GAS manual.
 @c For copying conditions, see the file as.texinfo.
 @ifset GENERIC
@@ -11,8 +12,6 @@
 @chapter M32R Dependent Features
 @end ifclear
 
-@c start-sanitize-m32rx
-
 @cindex M32R support
 @menu
 * M32R-Opts::                   M32R Options
@@ -29,8 +28,8 @@ The Mitsubishi M32R version of @code{@value{AS}} has a few machine
 dependent options:
 
 @table @code
-@item --m32rx
-@cindex @samp{--m32rx} option, M32RX
+@item -m32rx
+@cindex @samp{-m32rx} option, M32RX
 @cindex architecture options, M32RX
 @cindex M32R architecture options
 @code{@value{AS}} can assemble code for several different members of the
@@ -40,8 +39,16 @@ to the M32RX microprocessor, which adds some more instructions to the
 basic M32R instruction set, and some additional parameters to some of
 the original instructions.
 
-@item --warn-explicit-parallel-conflicts
-@cindex @samp{--warn-explicit-parallel-conflicts} option, M32RX
+@item -m32r
+@cindex @samp{-m32r} option, M32R
+@cindex architecture options, M32R
+@cindex M32R architecture options
+This option can be used to restore the assembler's default behaviour of
+assembling for the M32R microprocessor.  This can be useful if the
+default has been changed by a previous command line option.
+
+@item -warn-explicit-parallel-conflicts
+@cindex @samp{-warn-explicit-parallel-conflicts} option, M32RX
 Instructs @code{@value{AS}} to produce warning messages when
 questionable parallel instructions are encountered.  This option is
 enabled by default, but @code{@value{GCC}} disables it when it invokes
@@ -52,11 +59,21 @@ different result from @samp{mv r1, r2 \n mv r3, r1} since the former
 moves r1 into r3 and then r2 into r1, whereas the later moves r2 into r1
 and r3.
 
-@item --no-warn-explicit-parallel-conflicts
-@cindex @samp{--no-warn-explicit-parallel-conflicts} option, M32RX
+@item -Wp
+@cindex @samp{-Wp} option, M32RX
+This is a shorter synonym for the @emph{-warn-explicit-parallel-conflicts}
+option.
+
+@item -no-warn-explicit-parallel-conflicts
+@cindex @samp{-no-warn-explicit-parallel-conflicts} option, M32RX
 Instructs @code{@value{AS}} not to produce warning messages when
 questionable parallel instructions are encountered.
 
+@item -Wnp
+@cindex @samp{-Wnp} option, M32RX
+This is a shorter synonym for the @emph{-no-warn-explicit-parallel-conflicts}
+option.
+
 @end table
 
 @node M32R-Warnings
@@ -90,14 +107,18 @@ neg instruction and the input to the move instruction.
 
 @item instruction @samp{...} is for the M32RX only
 This message is produced when the assembler encounters an instruction
-which is only supported by the M32Rx processor, and the @samp{--m32rx}
+which is only supported by the M32Rx processor, and the @samp{-m32rx}
 command line flag has not been specified to allow assembly of such
 instructions. 
 
+@item unknown instruction @samp{...}
+This message is produced when the assembler encounters an instruction
+which it doe snot recognise.
+
 @item only the NOP instruction can be issued in parallel on the m32r
 This message is produced when the assembler encounters a parallel
 instruction which does not involve a NOP instruction and the
-@samp{--m32rx} command line flag has not been specified.  Only the M32Rx
+@samp{-m32rx} command line flag has not been specified.  Only the M32Rx
 processor is able to execute two instructions in parallel.
 
 @item instruction @samp{...} cannot be executed in parallel.
@@ -117,6 +138,6 @@ For example these code fragments will produce this message:
 @samp{jl r0 || mv r14, r1}
 @samp{st r2, @@-r1 || mv r1, r3} 
 @samp{mv r1, r2 || ld r0, @@r1+} 
+@samp{cmp r1, r2 || addx r3, r4} (Both write to the condition bit)
 
 @end table
-@c end-sanitize-m32rx