/* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger.
- Copyright (C) 1996-2017 Free Software Foundation, Inc.
+ Copyright (C) 1996-2019 Free Software Foundation, Inc.
This file is part of GDB.
/* The am33-2 has 64 registers. */
#define MN10300_MAX_NUM_REGS 64
+/* Big enough to hold the size of the largest register in bytes. */
+#define MN10300_MAX_REGISTER_SIZE 64
+
/* This structure holds the results of a prologue analysis. */
struct mn10300_prologue
{
regsz = register_size (gdbarch, reg);
if (len <= regsz)
- regcache_raw_write_part (regcache, reg, 0, len, valbuf);
+ regcache->raw_write_part (reg, 0, len, valbuf);
else if (len <= 2 * regsz)
{
- regcache_raw_write (regcache, reg, valbuf);
+ regcache->raw_write (reg, valbuf);
gdb_assert (regsz == register_size (gdbarch, reg + 1));
- regcache_raw_write_part (regcache, reg+1, 0,
- len - regsz, valbuf + regsz);
+ regcache->raw_write_part (reg + 1, 0, len - regsz, valbuf + regsz);
}
else
internal_error (__FILE__, __LINE__,
mn10300_extract_return_value (struct gdbarch *gdbarch, struct type *type,
struct regcache *regcache, void *valbuf)
{
- gdb_byte buf[MAX_REGISTER_SIZE];
+ gdb_byte buf[MN10300_MAX_REGISTER_SIZE];
int len = TYPE_LENGTH (type);
int reg, regsz;
reg = 0;
regsz = register_size (gdbarch, reg);
+ gdb_assert (regsz <= MN10300_MAX_REGISTER_SIZE);
if (len <= regsz)
{
- regcache_raw_read (regcache, reg, buf);
+ regcache->raw_read (reg, buf);
memcpy (valbuf, buf, len);
}
else if (len <= 2 * regsz)
{
- regcache_raw_read (regcache, reg, buf);
+ regcache->raw_read (reg, buf);
memcpy (valbuf, buf, regsz);
gdb_assert (regsz == register_size (gdbarch, reg + 1));
- regcache_raw_read (regcache, reg + 1, buf);
+ regcache->raw_read (reg + 1, buf);
memcpy ((char *) valbuf + regsz, buf, len - regsz);
}
else
return RETURN_VALUE_REGISTER_CONVENTION;
}
-static char *
-register_name (int reg, char **regs, long sizeof_regs)
+static const char *
+register_name (int reg, const char **regs, long sizeof_regs)
{
if (reg < 0 || reg >= sizeof_regs / sizeof (regs[0]))
return NULL;
static const char *
mn10300_generic_register_name (struct gdbarch *gdbarch, int reg)
{
- static char *regs[] =
+ static const char *regs[] =
{ "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
"sp", "pc", "mdr", "psw", "lir", "lar", "", "",
"", "", "", "", "", "", "", "",
static const char *
am33_register_name (struct gdbarch *gdbarch, int reg)
{
- static char *regs[] =
+ static const char *regs[] =
{ "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
"sp", "pc", "mdr", "psw", "lir", "lar", "",
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
static const char *
am33_2_register_name (struct gdbarch *gdbarch, int reg)
{
- static char *regs[] =
+ static const char *regs[] =
{
"d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
"sp", "pc", "mdr", "psw", "lir", "lar", "mdrq", "r0",
return builtin_type (gdbarch)->builtin_int;
}
-static CORE_ADDR
-mn10300_read_pc (struct regcache *regcache)
-{
- ULONGEST val;
- regcache_cooked_read_unsigned (regcache, E_PC_REGNUM, &val);
- return val;
-}
-
-static void
-mn10300_write_pc (struct regcache *regcache, CORE_ADDR val)
-{
- regcache_cooked_write_unsigned (regcache, E_PC_REGNUM, val);
-}
-
/* The breakpoint instruction must be the same size as the smallest
instruction in the instruction set.
push_reg (pv_t *regs, struct pv_area *stack, int regnum)
{
regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], -4);
- pv_area_store (stack, regs[E_SP_REGNUM], 4, regs[regnum]);
+ stack->store (regs[E_SP_REGNUM], 4, regs[regnum]);
}
/* Translate an "r" register number extracted from an instruction encoding
return E_E0_REGNUM + rreg;
}
-/* Find saved registers in a 'struct pv_area'; we pass this to pv_area_scan.
+/* Find saved registers in a 'struct pv_area'; we pass this to pv_area::scan.
If VALUE is a saved register, ADDR says it was saved at a constant
offset from the frame base, and SIZE indicates that the whole
CORE_ADDR pc;
int rn;
pv_t regs[MN10300_MAX_NUM_REGS];
- struct pv_area *stack;
- struct cleanup *back_to;
CORE_ADDR after_last_frame_setup_insn = start_pc;
int am33_mode = AM33_MODE (gdbarch);
regs[rn] = pv_register (rn, 0);
result->reg_offset[rn] = 1;
}
- stack = make_pv_area (E_SP_REGNUM, gdbarch_addr_bit (gdbarch));
- back_to = make_cleanup_free_pv_area (stack);
+ pv_area stack (E_SP_REGNUM, gdbarch_addr_bit (gdbarch));
- /* The typical call instruction will have saved the return address on the
- stack. Space for the return address has already been preallocated in
- the caller's frame. It's possible, such as when using -mrelax with gcc
- that other registers were saved as well. If this happens, we really
- have no chance of deciphering the frame. DWARF info can save the day
- when this happens. */
- pv_area_store (stack, regs[E_SP_REGNUM], 4, regs[E_PC_REGNUM]);
+ /* The typical call instruction will have saved the return address on the
+ stack. Space for the return address has already been preallocated in
+ the caller's frame. It's possible, such as when using -mrelax with gcc
+ that other registers were saved as well. If this happens, we really
+ have no chance of deciphering the frame. DWARF info can save the day
+ when this happens. */
+ stack.store (regs[E_SP_REGNUM], 4, regs[E_PC_REGNUM]);
pc = start_pc;
while (pc < limit_pc)
if ((save_mask & movm_exreg0_bit) && am33_mode)
{
- push_reg (regs, stack, E_E2_REGNUM);
- push_reg (regs, stack, E_E3_REGNUM);
+ push_reg (regs, &stack, E_E2_REGNUM);
+ push_reg (regs, &stack, E_E3_REGNUM);
}
if ((save_mask & movm_exreg1_bit) && am33_mode)
{
- push_reg (regs, stack, E_E4_REGNUM);
- push_reg (regs, stack, E_E5_REGNUM);
- push_reg (regs, stack, E_E6_REGNUM);
- push_reg (regs, stack, E_E7_REGNUM);
+ push_reg (regs, &stack, E_E4_REGNUM);
+ push_reg (regs, &stack, E_E5_REGNUM);
+ push_reg (regs, &stack, E_E6_REGNUM);
+ push_reg (regs, &stack, E_E7_REGNUM);
}
if ((save_mask & movm_exother_bit) && am33_mode)
{
- push_reg (regs, stack, E_E0_REGNUM);
- push_reg (regs, stack, E_E1_REGNUM);
- push_reg (regs, stack, E_MDRQ_REGNUM);
- push_reg (regs, stack, E_MCRH_REGNUM);
- push_reg (regs, stack, E_MCRL_REGNUM);
- push_reg (regs, stack, E_MCVF_REGNUM);
+ push_reg (regs, &stack, E_E0_REGNUM);
+ push_reg (regs, &stack, E_E1_REGNUM);
+ push_reg (regs, &stack, E_MDRQ_REGNUM);
+ push_reg (regs, &stack, E_MCRH_REGNUM);
+ push_reg (regs, &stack, E_MCRL_REGNUM);
+ push_reg (regs, &stack, E_MCVF_REGNUM);
}
if (save_mask & movm_d2_bit)
- push_reg (regs, stack, E_D2_REGNUM);
+ push_reg (regs, &stack, E_D2_REGNUM);
if (save_mask & movm_d3_bit)
- push_reg (regs, stack, E_D3_REGNUM);
+ push_reg (regs, &stack, E_D3_REGNUM);
if (save_mask & movm_a2_bit)
- push_reg (regs, stack, E_A2_REGNUM);
+ push_reg (regs, &stack, E_A2_REGNUM);
if (save_mask & movm_a3_bit)
- push_reg (regs, stack, E_A3_REGNUM);
+ push_reg (regs, &stack, E_A3_REGNUM);
if (save_mask & movm_other_bit)
{
- push_reg (regs, stack, E_D0_REGNUM);
- push_reg (regs, stack, E_D1_REGNUM);
- push_reg (regs, stack, E_A0_REGNUM);
- push_reg (regs, stack, E_A1_REGNUM);
- push_reg (regs, stack, E_MDR_REGNUM);
- push_reg (regs, stack, E_LIR_REGNUM);
- push_reg (regs, stack, E_LAR_REGNUM);
+ push_reg (regs, &stack, E_D0_REGNUM);
+ push_reg (regs, &stack, E_D1_REGNUM);
+ push_reg (regs, &stack, E_A0_REGNUM);
+ push_reg (regs, &stack, E_A1_REGNUM);
+ push_reg (regs, &stack, E_MDR_REGNUM);
+ push_reg (regs, &stack, E_LIR_REGNUM);
+ push_reg (regs, &stack, E_LAR_REGNUM);
/* The `other' bit leaves a blank area of four bytes at
the beginning of its block of saved registers, making
it 32 bytes long in total. */
rN = buf[0] & 0x0f;
fsM = (Y << 4) | sM;
- pv_area_store (stack, regs[translate_rreg (rN)], 4,
- regs[E_FS0_REGNUM + fsM]);
+ stack.store (regs[translate_rreg (rN)], 4,
+ regs[E_FS0_REGNUM + fsM]);
pc += 3;
}
sM = (buf[0] & 0xf0) >> 4;
fsM = (Y << 4) | sM;
- pv_area_store (stack, regs[E_SP_REGNUM], 4,
- regs[E_FS0_REGNUM + fsM]);
+ stack.store (regs[E_SP_REGNUM], 4,
+ regs[E_FS0_REGNUM + fsM]);
pc += 3;
}
Z = (buf[1] & 0x02) >> 1;
fsM = (Z << 4) | sM;
- pv_area_store (stack,
- pv_add (regs[translate_rreg (rN)],
- regs[translate_rreg (rI)]),
- 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (pv_add (regs[translate_rreg (rN)],
+ regs[translate_rreg (rI)]),
+ 4, regs[E_FS0_REGNUM + fsM]);
pc += 4;
}
fsM = (Y << 4) | sM;
d8 = extract_signed_integer (&buf[1], 1, byte_order);
- pv_area_store (stack,
- pv_add_constant (regs[translate_rreg (rN)], d8),
- 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (pv_add_constant (regs[translate_rreg (rN)], d8),
+ 4, regs[E_FS0_REGNUM + fsM]);
pc += 4;
}
fsM = (Y << 4) | sM;
d24 = extract_signed_integer (&buf[1], 3, byte_order);
- pv_area_store (stack,
- pv_add_constant (regs[translate_rreg (rN)], d24),
- 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (pv_add_constant (regs[translate_rreg (rN)], d24),
+ 4, regs[E_FS0_REGNUM + fsM]);
pc += 6;
}
fsM = (Y << 4) | sM;
d32 = extract_signed_integer (&buf[1], 4, byte_order);
- pv_area_store (stack,
- pv_add_constant (regs[translate_rreg (rN)], d32),
- 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (pv_add_constant (regs[translate_rreg (rN)], d32),
+ 4, regs[E_FS0_REGNUM + fsM]);
pc += 7;
}
fsM = (Y << 4) | sM;
d8 = extract_signed_integer (&buf[1], 1, byte_order);
- pv_area_store (stack,
- pv_add_constant (regs[E_SP_REGNUM], d8),
- 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (pv_add_constant (regs[E_SP_REGNUM], d8),
+ 4, regs[E_FS0_REGNUM + fsM]);
pc += 4;
}
fsM = (Y << 4) | sM;
d24 = extract_signed_integer (&buf[1], 3, byte_order);
- pv_area_store (stack,
- pv_add_constant (regs[E_SP_REGNUM], d24),
- 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (pv_add_constant (regs[E_SP_REGNUM], d24),
+ 4, regs[E_FS0_REGNUM + fsM]);
pc += 6;
}
fsM = (Y << 4) | sM;
d32 = extract_signed_integer (&buf[1], 4, byte_order);
- pv_area_store (stack,
- pv_add_constant (regs[E_SP_REGNUM], d32),
- 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (pv_add_constant (regs[E_SP_REGNUM], d32),
+ 4, regs[E_FS0_REGNUM + fsM]);
pc += 7;
}
rN_regnum = translate_rreg (rN);
- pv_area_store (stack, regs[rN_regnum], 4,
- regs[E_FS0_REGNUM + fsM]);
+ stack.store (regs[rN_regnum], 4,
+ regs[E_FS0_REGNUM + fsM]);
regs[rN_regnum] = pv_add_constant (regs[rN_regnum], 4);
pc += 3;
rN_regnum = translate_rreg (rN);
- pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm8);
pc += 4;
rN_regnum = translate_rreg (rN);
- pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm24);
pc += 6;
rN_regnum = translate_rreg (rN);
- pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
+ stack.store (regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm32);
pc += 7;
}
/* Record where all the registers were saved. */
- pv_area_scan (stack, check_for_saved, (void *) result);
+ stack.scan (check_for_saved, (void *) result);
result->prologue_end = after_last_frame_setup_insn;
-
- do_cleanups (back_to);
}
/* Function: skip_prologue
CORE_ADDR bp_addr,
int nargs, struct value **args,
CORE_ADDR sp,
- int struct_return,
+ function_call_return_method return_method,
CORE_ADDR struct_addr)
{
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int stack_offset = 0;
int argnum;
const gdb_byte *val;
- gdb_byte valbuf[MAX_REGISTER_SIZE];
+ gdb_byte valbuf[MN10300_MAX_REGISTER_SIZE];
/* This should be a nop, but align the stack just in case something
went wrong. Stacks are four byte aligned on the mn10300. */
XXX This doesn't appear to handle pass-by-invisible reference
arguments. */
- regs_used = struct_return ? 1 : 0;
+ regs_used = (return_method == return_method_struct) ? 1 : 0;
for (len = 0, argnum = 0; argnum < nargs; argnum++)
{
arg_len = (TYPE_LENGTH (value_type (args[argnum])) + 3) & ~3;
/* Allocate stack space. */
sp -= len;
- if (struct_return)
+ if (return_method == return_method_struct)
{
regs_used = 1;
regcache_cooked_write_unsigned (regcache, E_D0_REGNUM, struct_addr);
{
/* Change to pointer-to-type. */
arg_len = push_size;
+ gdb_assert (push_size <= MN10300_MAX_REGISTER_SIZE);
store_unsigned_integer (valbuf, push_size, byte_order,
value_address (*args));
val = &valbuf[0];
if (arches != NULL)
return arches->gdbarch;
- tdep = XNEW (struct gdbarch_tdep);
+ tdep = XCNEW (struct gdbarch_tdep);
gdbarch = gdbarch_alloc (&info, tdep);
switch (info.bfd_arch_info->mach)
set_gdbarch_num_regs (gdbarch, num_regs);
set_gdbarch_register_type (gdbarch, mn10300_register_type);
set_gdbarch_skip_prologue (gdbarch, mn10300_skip_prologue);
- set_gdbarch_read_pc (gdbarch, mn10300_read_pc);
- set_gdbarch_write_pc (gdbarch, mn10300_write_pc);
set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
set_gdbarch_dwarf2_reg_to_regnum (gdbarch, mn10300_dwarf2_reg_to_regnum);
set_gdbarch_sw_breakpoint_from_kind (gdbarch,
mn10300_breakpoint::bp_from_kind);
/* decr_pc_after_break? */
- /* Disassembly. */
- set_gdbarch_print_insn (gdbarch, print_insn_mn10300);
/* Stage 2 */
set_gdbarch_return_value (gdbarch, mn10300_return_value);
tdep->am33_mode);
}
-/* Provide a prototype to silence -Wmissing-prototypes. */
-extern initialize_file_ftype _initialize_mn10300_tdep;
-
void
_initialize_mn10300_tdep (void)
{
projects / thirdparty / binutils-gdb.git / blobdiff