/* Target-dependent code for Renesas Super-H, for GDB.
Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
- 2003, 2004, 2005, 2007 Free Software Foundation, Inc.
+ 2003, 2004, 2005, 2007, 2008, 2009 Free Software Foundation, Inc.
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
+ the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 51 Franklin Street, Fifth Floor,
- Boston, MA 02110-1301, USA. */
+ along with this program. If not, see <http://www.gnu.org/licenses/>. */
/*
Contributed by Steve Chamberlain
/* sh flags */
#include "elf/sh.h"
+#include "elf/dwarf2.h"
/* registers numbers shared with the simulator */
#include "gdb/sim-sh.h"
+/* List of "set sh ..." and "show sh ..." commands. */
+static struct cmd_list_element *setshcmdlist = NULL;
+static struct cmd_list_element *showshcmdlist = NULL;
+
+static const char sh_cc_gcc[] = "gcc";
+static const char sh_cc_renesas[] = "renesas";
+static const char *sh_cc_enum[] = {
+ sh_cc_gcc,
+ sh_cc_renesas,
+ NULL
+};
+
+static const char *sh_active_calling_convention = sh_cc_gcc;
+
static void (*sh_show_regs) (struct frame_info *);
#define SH_NUM_REGS 67
CORE_ADDR saved_sp;
};
+static int
+sh_is_renesas_calling_convention (struct type *func_type)
+{
+ return ((func_type
+ && TYPE_CALLING_CONVENTION (func_type) == DW_CC_GNU_renesas_sh)
+ || sh_active_calling_convention == sh_cc_renesas);
+}
+
static const char *
-sh_sh_register_name (int reg_nr)
+sh_sh_register_name (struct gdbarch *gdbarch, int reg_nr)
{
static char *register_names[] = {
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
}
static const char *
-sh_sh3_register_name (int reg_nr)
+sh_sh3_register_name (struct gdbarch *gdbarch, int reg_nr)
{
static char *register_names[] = {
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
}
static const char *
-sh_sh3e_register_name (int reg_nr)
+sh_sh3e_register_name (struct gdbarch *gdbarch, int reg_nr)
{
static char *register_names[] = {
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
}
static const char *
-sh_sh2e_register_name (int reg_nr)
+sh_sh2e_register_name (struct gdbarch *gdbarch, int reg_nr)
{
static char *register_names[] = {
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
}
static const char *
-sh_sh2a_register_name (int reg_nr)
+sh_sh2a_register_name (struct gdbarch *gdbarch, int reg_nr)
{
static char *register_names[] = {
/* general registers 0-15 */
}
static const char *
-sh_sh2a_nofpu_register_name (int reg_nr)
+sh_sh2a_nofpu_register_name (struct gdbarch *gdbarch, int reg_nr)
{
static char *register_names[] = {
/* general registers 0-15 */
}
static const char *
-sh_sh_dsp_register_name (int reg_nr)
+sh_sh_dsp_register_name (struct gdbarch *gdbarch, int reg_nr)
{
static char *register_names[] = {
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
}
static const char *
-sh_sh3_dsp_register_name (int reg_nr)
+sh_sh3_dsp_register_name (struct gdbarch *gdbarch, int reg_nr)
{
static char *register_names[] = {
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
}
static const char *
-sh_sh4_register_name (int reg_nr)
+sh_sh4_register_name (struct gdbarch *gdbarch, int reg_nr)
{
static char *register_names[] = {
/* general registers 0-15 */
}
static const char *
-sh_sh4_nofpu_register_name (int reg_nr)
+sh_sh4_nofpu_register_name (struct gdbarch *gdbarch, int reg_nr)
{
static char *register_names[] = {
/* general registers 0-15 */
}
static const char *
-sh_sh4al_dsp_register_name (int reg_nr)
+sh_sh4al_dsp_register_name (struct gdbarch *gdbarch, int reg_nr)
{
static char *register_names[] = {
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
}
static const unsigned char *
-sh_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
+sh_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr, int *lenptr)
{
/* 0xc3c3 is trapa #c3, and it works in big and little endian modes */
static unsigned char breakpoint[] = { 0xc3, 0xc3 };
static unsigned char big_remote_breakpoint[] = { 0xc3, 0x20 };
static unsigned char little_remote_breakpoint[] = { 0x20, 0xc3 };
- if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
{
*lenptr = sizeof (big_remote_breakpoint);
return big_remote_breakpoint;
#define IS_ADD_REG_TO_FP(x) (((x) & 0xff0f) == 0x3e0c)
#define IS_ADD_IMM_FP(x) (((x) & 0xff00) == 0x7e00)
-/* Disassemble an instruction. */
-static int
-gdb_print_insn_sh (bfd_vma memaddr, disassemble_info * info)
-{
- info->endian = gdbarch_byte_order (current_gdbarch);
- return print_insn_sh (memaddr, info);
-}
-
static CORE_ADDR
-sh_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc,
+sh_analyze_prologue (struct gdbarch *gdbarch,
+ CORE_ADDR pc, CORE_ADDR current_pc,
struct sh_frame_cache *cache, ULONGEST fpscr)
{
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
ULONGEST inst;
CORE_ADDR opc;
int offset;
cache->uses_fp = 0;
for (opc = pc + (2 * 28); pc < opc; pc += 2)
{
- inst = read_memory_unsigned_integer (pc, 2);
+ inst = read_memory_unsigned_integer (pc, 2, byte_order);
/* See where the registers will be saved to */
if (IS_PUSH (inst))
{
sav_reg = reg;
offset = (inst & 0xff) << 1;
sav_offset =
- read_memory_integer ((pc + 4) + offset, 2);
+ read_memory_integer ((pc + 4) + offset, 2, byte_order);
}
}
}
sav_reg = reg;
offset = (inst & 0xff) << 2;
sav_offset =
- read_memory_integer (((pc & 0xfffffffc) + 4) + offset, 4);
+ read_memory_integer (((pc & 0xfffffffc) + 4) + offset,
+ 4, byte_order);
}
}
}
sav_offset = GET_SOURCE_REG (inst) << 16;
/* MOVI20 is a 32 bit instruction! */
pc += 2;
- sav_offset |= read_memory_unsigned_integer (pc, 2);
+ sav_offset
+ |= read_memory_unsigned_integer (pc, 2, byte_order);
/* Now sav_offset contains an unsigned 20 bit value.
It must still get sign extended. */
if (sav_offset & 0x00080000)
pc += 2;
for (opc = pc + 12; pc < opc; pc += 2)
{
- inst = read_memory_integer (pc, 2);
+ inst = read_memory_integer (pc, 2, byte_order);
if (IS_MOV_ARG_TO_IND_R14 (inst))
{
reg = GET_SOURCE_REG (inst);
jsr, which will be very confusing. Most likely the next
instruction is going to be IS_MOV_SP_FP in the delay slot. If
so, note that before returning the current pc. */
- inst = read_memory_integer (pc + 2, 2);
+ inst = read_memory_integer (pc + 2, 2, byte_order);
if (IS_MOV_SP_FP (inst))
cache->uses_fp = 1;
break;
}
static CORE_ADDR
-sh_skip_prologue (CORE_ADDR start_pc)
+sh_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc)
{
CORE_ADDR pc;
struct sh_frame_cache cache;
return max (pc, start_pc);
cache.sp_offset = -4;
- pc = sh_analyze_prologue (start_pc, (CORE_ADDR) -1, &cache, 0);
+ pc = sh_analyze_prologue (gdbarch, start_pc, (CORE_ADDR) -1, &cache, 0);
if (!cache.uses_fp)
return start_pc;
*/
static int
-sh_use_struct_convention (int gcc_p, struct type *type)
+sh_use_struct_convention (int renesas_abi, struct type *type)
{
int len = TYPE_LENGTH (type);
int nelem = TYPE_NFIELDS (type);
+ /* The Renesas ABI returns aggregate types always on stack. */
+ if (renesas_abi && (TYPE_CODE (type) == TYPE_CODE_STRUCT
+ || TYPE_CODE (type) == TYPE_CODE_UNION))
+ return 1;
+
/* Non-power of 2 length types and types bigger than 8 bytes (which don't
fit in two registers anyway) use struct convention. */
if (len != 1 && len != 2 && len != 4 && len != 8)
return 1;
}
-/* Extract from an array REGBUF containing the (raw) register state
- the address in which a function should return its structure value,
- as a CORE_ADDR (or an expression that can be used as one). */
-static CORE_ADDR
-sh_extract_struct_value_address (struct regcache *regcache)
+static int
+sh_use_struct_convention_nofpu (int renesas_abi, struct type *type)
{
- ULONGEST addr;
-
- regcache_cooked_read_unsigned (regcache, STRUCT_RETURN_REGNUM, &addr);
- return addr;
+ /* The Renesas ABI returns long longs/doubles etc. always on stack. */
+ if (renesas_abi && TYPE_NFIELDS (type) == 0 && TYPE_LENGTH (type) >= 8)
+ return 1;
+ return sh_use_struct_convention (renesas_abi, type);
}
static CORE_ADDR
/* Helper function to justify value in register according to endianess. */
static char *
-sh_justify_value_in_reg (struct value *val, int len)
+sh_justify_value_in_reg (struct gdbarch *gdbarch, struct value *val, int len)
{
static char valbuf[4];
if (len < 4)
{
/* value gets right-justified in the register or stack word */
- if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
memcpy (valbuf + (4 - len), (char *) value_contents (val), len);
else
memcpy (valbuf, (char *) value_contents (val), len);
29) the parity of the register number is preserved, which is important
for the double register passing test (see the "argreg & 1" test below). */
static int
-sh_next_flt_argreg (int len)
+sh_next_flt_argreg (struct gdbarch *gdbarch, int len, struct type *func_type)
{
int argreg;
/* Doubles are always starting in a even register number. */
if (argreg & 1)
{
- flt_argreg_array[argreg] = 1;
+ /* In gcc ABI, the skipped register is lost for further argument
+ passing now. Not so in Renesas ABI. */
+ if (!sh_is_renesas_calling_convention (func_type))
+ flt_argreg_array[argreg] = 1;
++argreg;
/* Also mark the next register as used. */
flt_argreg_array[argreg + 1] = 1;
}
- else if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE)
+ else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE
+ && !sh_is_renesas_calling_convention (func_type))
{
/* In little endian, gcc passes floats like this: f5, f4, f7, f6, ... */
if (!flt_argreg_array[argreg + 1])
CORE_ADDR sp, int struct_return,
CORE_ADDR struct_addr)
{
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int stack_offset = 0;
int argreg = ARG0_REGNUM;
int flt_argreg = 0;
int argnum;
+ struct type *func_type = value_type (function);
struct type *type;
CORE_ADDR regval;
char *val;
int len, reg_size = 0;
int pass_on_stack = 0;
int treat_as_flt;
+ int last_reg_arg = INT_MAX;
+
+ /* The Renesas ABI expects all varargs arguments, plus the last
+ non-vararg argument to be on the stack, no matter how many
+ registers have been used so far. */
+ if (sh_is_renesas_calling_convention (func_type)
+ && TYPE_VARARGS (func_type))
+ last_reg_arg = TYPE_NFIELDS (func_type) - 2;
/* first force sp to a 4-byte alignment */
sp = sh_frame_align (gdbarch, sp);
- if (struct_return)
- regcache_cooked_write_unsigned (regcache,
- STRUCT_RETURN_REGNUM, struct_addr);
-
/* make room on stack for args */
sp -= sh_stack_allocsize (nargs, args);
{
type = value_type (args[argnum]);
len = TYPE_LENGTH (type);
- val = sh_justify_value_in_reg (args[argnum], len);
+ val = sh_justify_value_in_reg (gdbarch, args[argnum], len);
/* Some decisions have to be made how various types are handled.
This also differs in different ABIs. */
/* Find out the next register to use for a floating point value. */
treat_as_flt = sh_treat_as_flt_p (type);
if (treat_as_flt)
- flt_argreg = sh_next_flt_argreg (len);
+ flt_argreg = sh_next_flt_argreg (gdbarch, len, func_type);
+ /* In Renesas ABI, long longs and aggregate types are always passed
+ on stack. */
+ else if (sh_is_renesas_calling_convention (func_type)
+ && ((TYPE_CODE (type) == TYPE_CODE_INT && len == 8)
+ || TYPE_CODE (type) == TYPE_CODE_STRUCT
+ || TYPE_CODE (type) == TYPE_CODE_UNION))
+ pass_on_stack = 1;
/* In contrast to non-FPU CPUs, arguments are never split between
registers and stack. If an argument doesn't fit in the remaining
registers it's always pushed entirely on the stack. */
{
if ((treat_as_flt && flt_argreg > FLOAT_ARGLAST_REGNUM)
|| (!treat_as_flt && (argreg > ARGLAST_REGNUM
- || pass_on_stack)))
+ || pass_on_stack))
+ || argnum > last_reg_arg)
{
/* The data goes entirely on the stack, 4-byte aligned. */
reg_size = (len + 3) & ~3;
{
/* Argument goes in a float argument register. */
reg_size = register_size (gdbarch, flt_argreg);
- regval = extract_unsigned_integer (val, reg_size);
+ regval = extract_unsigned_integer (val, reg_size, byte_order);
/* In little endian mode, float types taking two registers
(doubles on sh4, long doubles on sh2e, sh3e and sh4) must
be stored swapped in the argument registers. The below
register, increments the val and len values accordingly
and then proceeds as normal by writing the second 32 bits
into the next register. */
- if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE
&& TYPE_LENGTH (type) == 2 * reg_size)
{
regcache_cooked_write_unsigned (regcache, flt_argreg + 1,
regval);
val += reg_size;
len -= reg_size;
- regval = extract_unsigned_integer (val, reg_size);
+ regval = extract_unsigned_integer (val, reg_size, byte_order);
}
regcache_cooked_write_unsigned (regcache, flt_argreg++, regval);
}
{
/* there's room in a register */
reg_size = register_size (gdbarch, argreg);
- regval = extract_unsigned_integer (val, reg_size);
+ regval = extract_unsigned_integer (val, reg_size, byte_order);
regcache_cooked_write_unsigned (regcache, argreg++, regval);
}
/* Store the value one register at a time or in one step on stack. */
}
}
+ if (struct_return)
+ {
+ if (sh_is_renesas_calling_convention (func_type))
+ /* If the function uses the Renesas ABI, subtract another 4 bytes from
+ the stack and store the struct return address there. */
+ write_memory_unsigned_integer (sp -= 4, 4, byte_order, struct_addr);
+ else
+ /* Using the gcc ABI, the "struct return pointer" pseudo-argument has
+ its own dedicated register. */
+ regcache_cooked_write_unsigned (regcache,
+ STRUCT_RETURN_REGNUM, struct_addr);
+ }
+
/* Store return address. */
regcache_cooked_write_unsigned (regcache, PR_REGNUM, bp_addr);
/* Update stack pointer. */
- regcache_cooked_write_unsigned (regcache, SP_REGNUM, sp);
+ regcache_cooked_write_unsigned (regcache,
+ gdbarch_sp_regnum (gdbarch), sp);
return sp;
}
CORE_ADDR sp, int struct_return,
CORE_ADDR struct_addr)
{
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int stack_offset = 0;
int argreg = ARG0_REGNUM;
int argnum;
+ struct type *func_type = value_type (function);
struct type *type;
CORE_ADDR regval;
char *val;
- int len, reg_size;
+ int len, reg_size = 0;
+ int pass_on_stack = 0;
+ int last_reg_arg = INT_MAX;
+
+ /* The Renesas ABI expects all varargs arguments, plus the last
+ non-vararg argument to be on the stack, no matter how many
+ registers have been used so far. */
+ if (sh_is_renesas_calling_convention (func_type)
+ && TYPE_VARARGS (func_type))
+ last_reg_arg = TYPE_NFIELDS (func_type) - 2;
/* first force sp to a 4-byte alignment */
sp = sh_frame_align (gdbarch, sp);
- if (struct_return)
- regcache_cooked_write_unsigned (regcache,
- STRUCT_RETURN_REGNUM, struct_addr);
-
/* make room on stack for args */
sp -= sh_stack_allocsize (nargs, args);
{
type = value_type (args[argnum]);
len = TYPE_LENGTH (type);
- val = sh_justify_value_in_reg (args[argnum], len);
+ val = sh_justify_value_in_reg (gdbarch, args[argnum], len);
+ /* Some decisions have to be made how various types are handled.
+ This also differs in different ABIs. */
+ pass_on_stack = 0;
+ /* Renesas ABI pushes doubles and long longs entirely on stack.
+ Same goes for aggregate types. */
+ if (sh_is_renesas_calling_convention (func_type)
+ && ((TYPE_CODE (type) == TYPE_CODE_INT && len >= 8)
+ || (TYPE_CODE (type) == TYPE_CODE_FLT && len >= 8)
+ || TYPE_CODE (type) == TYPE_CODE_STRUCT
+ || TYPE_CODE (type) == TYPE_CODE_UNION))
+ pass_on_stack = 1;
while (len > 0)
{
- if (argreg > ARGLAST_REGNUM)
+ if (argreg > ARGLAST_REGNUM || pass_on_stack
+ || argnum > last_reg_arg)
{
/* The remainder of the data goes entirely on the stack,
4-byte aligned. */
{
/* there's room in a register */
reg_size = register_size (gdbarch, argreg);
- regval = extract_unsigned_integer (val, reg_size);
+ regval = extract_unsigned_integer (val, reg_size, byte_order);
regcache_cooked_write_unsigned (regcache, argreg++, regval);
}
/* Store the value reg_size bytes at a time. This means that things
}
}
+ if (struct_return)
+ {
+ if (sh_is_renesas_calling_convention (func_type))
+ /* If the function uses the Renesas ABI, subtract another 4 bytes from
+ the stack and store the struct return address there. */
+ write_memory_unsigned_integer (sp -= 4, 4, byte_order, struct_addr);
+ else
+ /* Using the gcc ABI, the "struct return pointer" pseudo-argument has
+ its own dedicated register. */
+ regcache_cooked_write_unsigned (regcache,
+ STRUCT_RETURN_REGNUM, struct_addr);
+ }
+
/* Store return address. */
regcache_cooked_write_unsigned (regcache, PR_REGNUM, bp_addr);
/* Update stack pointer. */
- regcache_cooked_write_unsigned (regcache, SP_REGNUM, sp);
+ regcache_cooked_write_unsigned (regcache,
+ gdbarch_sp_regnum (gdbarch), sp);
return sp;
}
sh_extract_return_value_nofpu (struct type *type, struct regcache *regcache,
void *valbuf)
{
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int len = TYPE_LENGTH (type);
int return_register = R0_REGNUM;
int offset;
ULONGEST c;
regcache_cooked_read_unsigned (regcache, R0_REGNUM, &c);
- store_unsigned_integer (valbuf, len, c);
+ store_unsigned_integer (valbuf, len, byte_order, c);
}
else if (len == 8)
{
sh_extract_return_value_fpu (struct type *type, struct regcache *regcache,
void *valbuf)
{
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
if (sh_treat_as_flt_p (type))
{
int len = TYPE_LENGTH (type);
- int i, regnum = FP0_REGNUM;
+ int i, regnum = gdbarch_fp0_regnum (gdbarch);
for (i = 0; i < len; i += 4)
- if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE)
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE)
regcache_raw_read (regcache, regnum++, (char *) valbuf + len - 4 - i);
else
regcache_raw_read (regcache, regnum++, (char *) valbuf + i);
sh_store_return_value_nofpu (struct type *type, struct regcache *regcache,
const void *valbuf)
{
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
ULONGEST val;
int len = TYPE_LENGTH (type);
if (len <= 4)
{
- val = extract_unsigned_integer (valbuf, len);
+ val = extract_unsigned_integer (valbuf, len, byte_order);
regcache_cooked_write_unsigned (regcache, R0_REGNUM, val);
}
else
sh_store_return_value_fpu (struct type *type, struct regcache *regcache,
const void *valbuf)
{
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
if (sh_treat_as_flt_p (type))
{
int len = TYPE_LENGTH (type);
- int i, regnum = FP0_REGNUM;
+ int i, regnum = gdbarch_fp0_regnum (gdbarch);
for (i = 0; i < len; i += 4)
- if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE)
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE)
regcache_raw_write (regcache, regnum++,
(char *) valbuf + len - 4 - i);
else
}
static enum return_value_convention
-sh_return_value_nofpu (struct gdbarch *gdbarch, struct type *type,
- struct regcache *regcache,
+sh_return_value_nofpu (struct gdbarch *gdbarch, struct type *func_type,
+ struct type *type, struct regcache *regcache,
gdb_byte *readbuf, const gdb_byte *writebuf)
{
- if (sh_use_struct_convention (0, type))
+ if (sh_use_struct_convention_nofpu (
+ sh_is_renesas_calling_convention (func_type), type))
return RETURN_VALUE_STRUCT_CONVENTION;
if (writebuf)
sh_store_return_value_nofpu (type, regcache, writebuf);
}
static enum return_value_convention
-sh_return_value_fpu (struct gdbarch *gdbarch, struct type *type,
- struct regcache *regcache,
+sh_return_value_fpu (struct gdbarch *gdbarch, struct type *func_type,
+ struct type *type, struct regcache *regcache,
gdb_byte *readbuf, const gdb_byte *writebuf)
{
- if (sh_use_struct_convention (0, type))
+ if (sh_use_struct_convention (
+ sh_is_renesas_calling_convention (func_type), type))
return RETURN_VALUE_STRUCT_CONVENTION;
if (writebuf)
sh_store_return_value_fpu (type, regcache, writebuf);
{
printf_filtered
(" PC %s SR %08lx PR %08lx MACH %08lx\n",
- paddr (get_frame_register_unsigned (frame, PC_REGNUM)),
+ phex (get_frame_register_unsigned (frame,
+ gdbarch_pc_regnum
+ (get_frame_arch (frame))), 4),
(long) get_frame_register_unsigned (frame, SR_REGNUM),
(long) get_frame_register_unsigned (frame, PR_REGNUM),
(long) get_frame_register_unsigned (frame, MACH_REGNUM));
{
printf_filtered
(" PC %s SR %08lx PR %08lx MACH %08lx\n",
- paddr (get_frame_register_unsigned (frame, PC_REGNUM)),
+ phex (get_frame_register_unsigned (frame,
+ gdbarch_pc_regnum
+ (get_frame_arch (frame))), 4),
(long) get_frame_register_unsigned (frame, SR_REGNUM),
(long) get_frame_register_unsigned (frame, PR_REGNUM),
(long) get_frame_register_unsigned (frame, MACH_REGNUM));
static void
sh2e_show_regs (struct frame_info *frame)
{
+ struct gdbarch *gdbarch = get_frame_arch (frame);
printf_filtered
(" PC %s SR %08lx PR %08lx MACH %08lx\n",
- paddr (get_frame_register_unsigned (frame, PC_REGNUM)),
+ phex (get_frame_register_unsigned (frame,
+ gdbarch_pc_regnum (gdbarch)), 4),
(long) get_frame_register_unsigned (frame, SR_REGNUM),
(long) get_frame_register_unsigned (frame, PR_REGNUM),
(long) get_frame_register_unsigned (frame, MACH_REGNUM));
printf_filtered
("FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 0),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 1),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 2),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 3),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 4),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 5),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 6),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 7));
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 0),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 1),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 2),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 3),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 4),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 5),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 6),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 7));
printf_filtered
("FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 8),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 9),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 10),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 11),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 12),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 13),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 14),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 15));
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 8),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 9),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 10),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 11),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 12),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 13),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 14),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 15));
}
static void
sh2a_show_regs (struct frame_info *frame)
{
+ struct gdbarch *gdbarch = get_frame_arch (frame);
int pr = get_frame_register_unsigned (frame, FPSCR_REGNUM) & 0x80000;
printf_filtered
(" PC %s SR %08lx PR %08lx MACH %08lx\n",
- paddr (get_frame_register_unsigned (frame, PC_REGNUM)),
+ phex (get_frame_register_unsigned (frame,
+ gdbarch_pc_regnum (gdbarch)), 4),
(long) get_frame_register_unsigned (frame, SR_REGNUM),
(long) get_frame_register_unsigned (frame, PR_REGNUM),
(long) get_frame_register_unsigned (frame, MACH_REGNUM));
printf_filtered
(pr ? "DR0-DR6 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
: "FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 0),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 1),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 2),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 3),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 4),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 5),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 6),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 7));
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 0),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 1),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 2),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 3),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 4),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 5),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 6),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 7));
printf_filtered
(pr ? "DR8-DR14 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
: "FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 8),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 9),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 10),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 11),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 12),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 13),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 14),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 15));
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 8),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 9),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 10),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 11),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 12),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 13),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 14),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 15));
printf_filtered
("BANK=%-3d\n", (int) get_frame_register_unsigned (frame, BANK_REGNUM));
printf_filtered
printf_filtered
(" PC %s SR %08lx PR %08lx MACH %08lx\n",
- paddr (get_frame_register_unsigned (frame, PC_REGNUM)),
+ phex (get_frame_register_unsigned (frame,
+ gdbarch_pc_regnum
+ (get_frame_arch (frame))), 4),
(long) get_frame_register_unsigned (frame, SR_REGNUM),
(long) get_frame_register_unsigned (frame, PR_REGNUM),
(long) get_frame_register_unsigned (frame, MACH_REGNUM));
static void
sh3e_show_regs (struct frame_info *frame)
{
+ struct gdbarch *gdbarch = get_frame_arch (frame);
printf_filtered
(" PC %s SR %08lx PR %08lx MACH %08lx\n",
- paddr (get_frame_register_unsigned (frame, PC_REGNUM)),
+ phex (get_frame_register_unsigned (frame,
+ gdbarch_pc_regnum (gdbarch)), 4),
(long) get_frame_register_unsigned (frame, SR_REGNUM),
(long) get_frame_register_unsigned (frame, PR_REGNUM),
(long) get_frame_register_unsigned (frame, MACH_REGNUM));
printf_filtered
("FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 0),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 1),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 2),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 3),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 4),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 5),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 6),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 7));
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 0),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 1),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 2),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 3),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 4),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 5),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 6),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 7));
printf_filtered
("FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 8),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 9),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 10),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 11),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 12),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 13),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 14),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 15));
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 8),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 9),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 10),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 11),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 12),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 13),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 14),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 15));
}
static void
{
printf_filtered
(" PC %s SR %08lx PR %08lx MACH %08lx\n",
- paddr (get_frame_register_unsigned (frame, PC_REGNUM)),
+ phex (get_frame_register_unsigned (frame,
+ gdbarch_pc_regnum
+ (get_frame_arch (frame))), 4),
(long) get_frame_register_unsigned (frame, SR_REGNUM),
(long) get_frame_register_unsigned (frame, PR_REGNUM),
(long) get_frame_register_unsigned (frame, MACH_REGNUM));
static void
sh4_show_regs (struct frame_info *frame)
{
+ struct gdbarch *gdbarch = get_frame_arch (frame);
int pr = get_frame_register_unsigned (frame, FPSCR_REGNUM) & 0x80000;
printf_filtered
(" PC %s SR %08lx PR %08lx MACH %08lx\n",
- paddr (get_frame_register_unsigned (frame, PC_REGNUM)),
+ phex (get_frame_register_unsigned (frame,
+ gdbarch_pc_regnum (gdbarch)), 4),
(long) get_frame_register_unsigned (frame, SR_REGNUM),
(long) get_frame_register_unsigned (frame, PR_REGNUM),
(long) get_frame_register_unsigned (frame, MACH_REGNUM));
printf_filtered
(pr ? "DR0-DR6 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
: "FP0-FP7 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 0),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 1),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 2),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 3),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 4),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 5),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 6),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 7));
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 0),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 1),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 2),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 3),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 4),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 5),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 6),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 7));
printf_filtered
(pr ? "DR8-DR14 %08lx%08lx %08lx%08lx %08lx%08lx %08lx%08lx\n"
: "FP8-FP15 %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 8),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 9),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 10),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 11),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 12),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 13),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 14),
- (long) get_frame_register_unsigned (frame, FP0_REGNUM + 15));
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 8),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 9),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 10),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 11),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 12),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 13),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 14),
+ (long) get_frame_register_unsigned
+ (frame, gdbarch_fp0_regnum (gdbarch) + 15));
}
static void
{
printf_filtered
(" PC %s SR %08lx PR %08lx MACH %08lx\n",
- paddr (get_frame_register_unsigned (frame, PC_REGNUM)),
+ phex (get_frame_register_unsigned (frame,
+ gdbarch_pc_regnum
+ (get_frame_arch (frame))), 4),
(long) get_frame_register_unsigned (frame, SR_REGNUM),
(long) get_frame_register_unsigned (frame, PR_REGNUM),
(long) get_frame_register_unsigned (frame, MACH_REGNUM));
{
printf_filtered
(" PC %s SR %08lx PR %08lx MACH %08lx\n",
- paddr (get_frame_register_unsigned (frame, PC_REGNUM)),
+ phex (get_frame_register_unsigned (frame,
+ gdbarch_pc_regnum
+ (get_frame_arch (frame))), 4),
(long) get_frame_register_unsigned (frame, SR_REGNUM),
(long) get_frame_register_unsigned (frame, PR_REGNUM),
(long) get_frame_register_unsigned (frame, MACH_REGNUM));
static struct type *
sh_sh2a_register_type (struct gdbarch *gdbarch, int reg_nr)
{
- if ((reg_nr >= FP0_REGNUM
+ if ((reg_nr >= gdbarch_fp0_regnum (gdbarch)
&& (reg_nr <= FP_LAST_REGNUM)) || (reg_nr == FPUL_REGNUM))
- return builtin_type_float;
+ return builtin_type (gdbarch)->builtin_float;
else if (reg_nr >= DR0_REGNUM && reg_nr <= DR_LAST_REGNUM)
- return builtin_type_double;
+ return builtin_type (gdbarch)->builtin_double;
else
- return builtin_type_int;
+ return builtin_type (gdbarch)->builtin_int;
}
/* Return the GDB type object for the "standard" data type
static struct type *
sh_sh3e_register_type (struct gdbarch *gdbarch, int reg_nr)
{
- if ((reg_nr >= FP0_REGNUM
+ if ((reg_nr >= gdbarch_fp0_regnum (gdbarch)
&& (reg_nr <= FP_LAST_REGNUM)) || (reg_nr == FPUL_REGNUM))
- return builtin_type_float;
+ return builtin_type (gdbarch)->builtin_float;
else
- return builtin_type_int;
+ return builtin_type (gdbarch)->builtin_int;
}
static struct type *
-sh_sh4_build_float_register_type (int high)
+sh_sh4_build_float_register_type (struct gdbarch *gdbarch, int high)
{
- struct type *temp;
-
- temp = create_range_type (NULL, builtin_type_int, 0, high);
- return create_array_type (NULL, builtin_type_float, temp);
+ return lookup_array_range_type (builtin_type (gdbarch)->builtin_float,
+ 0, high);
}
static struct type *
sh_sh4_register_type (struct gdbarch *gdbarch, int reg_nr)
{
- if ((reg_nr >= FP0_REGNUM
+ if ((reg_nr >= gdbarch_fp0_regnum (gdbarch)
&& (reg_nr <= FP_LAST_REGNUM)) || (reg_nr == FPUL_REGNUM))
- return builtin_type_float;
+ return builtin_type (gdbarch)->builtin_float;
else if (reg_nr >= DR0_REGNUM && reg_nr <= DR_LAST_REGNUM)
- return builtin_type_double;
+ return builtin_type (gdbarch)->builtin_double;
else if (reg_nr >= FV0_REGNUM && reg_nr <= FV_LAST_REGNUM)
- return sh_sh4_build_float_register_type (3);
+ return sh_sh4_build_float_register_type (gdbarch, 3);
else
- return builtin_type_int;
+ return builtin_type (gdbarch)->builtin_int;
}
static struct type *
sh_default_register_type (struct gdbarch *gdbarch, int reg_nr)
{
- return builtin_type_int;
+ return builtin_type (gdbarch)->builtin_int;
}
/* Is a register in a reggroup?
The default code in reggroup.c doesn't identify system registers, some
float registers or any of the vector registers.
TODO: sh2a and dsp registers. */
-int
+static int
sh_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
struct reggroup *reggroup)
{
- if (gdbarch_register_name (current_gdbarch, regnum) == NULL
- || *gdbarch_register_name (current_gdbarch, regnum) == '\0')
+ if (gdbarch_register_name (gdbarch, regnum) == NULL
+ || *gdbarch_register_name (gdbarch, regnum) == '\0')
return 0;
if (reggroup == float_reggroup
/* For vectors of 4 floating point registers. */
static int
-fv_reg_base_num (int fv_regnum)
+fv_reg_base_num (struct gdbarch *gdbarch, int fv_regnum)
{
int fp_regnum;
- fp_regnum = FP0_REGNUM + (fv_regnum - FV0_REGNUM) * 4;
+ fp_regnum = gdbarch_fp0_regnum (gdbarch)
+ + (fv_regnum - FV0_REGNUM) * 4;
return fp_regnum;
}
/* For double precision floating point registers, i.e 2 fp regs.*/
static int
-dr_reg_base_num (int dr_regnum)
+dr_reg_base_num (struct gdbarch *gdbarch, int dr_regnum)
{
int fp_regnum;
- fp_regnum = FP0_REGNUM + (dr_regnum - DR0_REGNUM) * 2;
+ fp_regnum = gdbarch_fp0_regnum (gdbarch)
+ + (dr_regnum - DR0_REGNUM) * 2;
return fp_regnum;
}
else
if (reg_nr >= DR0_REGNUM && reg_nr <= DR_LAST_REGNUM)
{
- base_regnum = dr_reg_base_num (reg_nr);
+ base_regnum = dr_reg_base_num (gdbarch, reg_nr);
/* Build the value in the provided buffer. */
/* Read the real regs for which this one is an alias. */
}
else if (reg_nr >= FV0_REGNUM && reg_nr <= FV_LAST_REGNUM)
{
- base_regnum = fv_reg_base_num (reg_nr);
+ base_regnum = fv_reg_base_num (gdbarch, reg_nr);
/* Read the real regs for which this one is an alias. */
for (portion = 0; portion < 4; portion++)
}
else if (reg_nr >= DR0_REGNUM && reg_nr <= DR_LAST_REGNUM)
{
- base_regnum = dr_reg_base_num (reg_nr);
+ base_regnum = dr_reg_base_num (gdbarch, reg_nr);
/* We must pay attention to the endiannes. */
sh_register_convert_to_raw (register_type (gdbarch, reg_nr),
}
else if (reg_nr >= FV0_REGNUM && reg_nr <= FV_LAST_REGNUM)
{
- base_regnum = fv_reg_base_num (reg_nr);
+ base_regnum = fv_reg_base_num (gdbarch, reg_nr);
/* Write the real regs for which this one is an alias. */
for (portion = 0; portion < 4; portion++)
}
static int
-sh_dsp_register_sim_regno (int nr)
+sh_dsp_register_sim_regno (struct gdbarch *gdbarch, int nr)
{
- if (legacy_register_sim_regno (nr) < 0)
- return legacy_register_sim_regno (nr);
+ if (legacy_register_sim_regno (gdbarch, nr) < 0)
+ return legacy_register_sim_regno (gdbarch, nr);
if (nr >= DSR_REGNUM && nr <= Y1_REGNUM)
return nr - DSR_REGNUM + SIM_SH_DSR_REGNUM;
if (nr == MOD_REGNUM)
}
static int
-sh_sh2a_register_sim_regno (int nr)
+sh_sh2a_register_sim_regno (struct gdbarch *gdbarch, int nr)
{
switch (nr)
{
default:
break;
}
- return legacy_register_sim_regno (nr);
+ return legacy_register_sim_regno (gdbarch, nr);
}
/* Set up the register unwinding such that call-clobbered registers are
static void
sh_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
struct dwarf2_frame_state_reg *reg,
- struct frame_info *next_frame)
+ struct frame_info *this_frame)
{
/* Mark the PC as the destination for the return address. */
- if (regnum == PC_REGNUM)
+ if (regnum == gdbarch_pc_regnum (gdbarch))
reg->how = DWARF2_FRAME_REG_RA;
/* Mark the stack pointer as the call frame address. */
- else if (regnum == SP_REGNUM)
+ else if (regnum == gdbarch_sp_regnum (gdbarch))
reg->how = DWARF2_FRAME_REG_CFA;
/* The above was taken from the default init_reg in dwarf2-frame.c
}
static struct sh_frame_cache *
-sh_frame_cache (struct frame_info *next_frame, void **this_cache)
+sh_frame_cache (struct frame_info *this_frame, void **this_cache)
{
+ struct gdbarch *gdbarch = get_frame_arch (this_frame);
struct sh_frame_cache *cache;
CORE_ADDR current_pc;
int i;
However, for functions that don't need it, the frame pointer is
optional. For these "frameless" functions the frame pointer is
actually the frame pointer of the calling frame. */
- cache->base = frame_unwind_register_unsigned (next_frame, FP_REGNUM);
+ cache->base = get_frame_register_unsigned (this_frame, FP_REGNUM);
if (cache->base == 0)
return cache;
- cache->pc = frame_func_unwind (next_frame, NORMAL_FRAME);
- current_pc = frame_pc_unwind (next_frame);
+ cache->pc = get_frame_func (this_frame);
+ current_pc = get_frame_pc (this_frame);
if (cache->pc != 0)
{
ULONGEST fpscr;
- fpscr = frame_unwind_register_unsigned (next_frame, FPSCR_REGNUM);
- sh_analyze_prologue (cache->pc, current_pc, cache, fpscr);
+ fpscr = get_frame_register_unsigned (this_frame, FPSCR_REGNUM);
+ sh_analyze_prologue (gdbarch, cache->pc, current_pc, cache, fpscr);
}
if (!cache->uses_fp)
setup yet. Try to reconstruct the base address for the stack
frame by looking at the stack pointer. For truly "frameless"
functions this might work too. */
- cache->base = frame_unwind_register_unsigned (next_frame, SP_REGNUM);
+ cache->base = get_frame_register_unsigned
+ (this_frame, gdbarch_sp_regnum (gdbarch));
}
/* Now that we have the base address for the stack frame we can
return cache;
}
-static void
-sh_frame_prev_register (struct frame_info *next_frame, void **this_cache,
- int regnum, int *optimizedp,
- enum lval_type *lvalp, CORE_ADDR *addrp,
- int *realnump, gdb_byte *valuep)
+static struct value *
+sh_frame_prev_register (struct frame_info *this_frame,
+ void **this_cache, int regnum)
{
- struct sh_frame_cache *cache = sh_frame_cache (next_frame, this_cache);
+ struct gdbarch *gdbarch = get_frame_arch (this_frame);
+ struct sh_frame_cache *cache = sh_frame_cache (this_frame, this_cache);
gdb_assert (regnum >= 0);
- if (regnum == SP_REGNUM && cache->saved_sp)
- {
- *optimizedp = 0;
- *lvalp = not_lval;
- *addrp = 0;
- *realnump = -1;
- if (valuep)
- {
- /* Store the value. */
- store_unsigned_integer (valuep, 4, cache->saved_sp);
- }
- return;
- }
+ if (regnum == gdbarch_sp_regnum (gdbarch) && cache->saved_sp)
+ return frame_unwind_got_constant (this_frame, regnum, cache->saved_sp);
/* The PC of the previous frame is stored in the PR register of
the current frame. Frob regnum so that we pull the value from
the correct place. */
- if (regnum == PC_REGNUM)
+ if (regnum == gdbarch_pc_regnum (gdbarch))
regnum = PR_REGNUM;
if (regnum < SH_NUM_REGS && cache->saved_regs[regnum] != -1)
- {
- *optimizedp = 0;
- *lvalp = lval_memory;
- *addrp = cache->saved_regs[regnum];
- *realnump = -1;
- if (valuep)
- {
- /* Read the value in from memory. */
- read_memory (*addrp, valuep,
- register_size (current_gdbarch, regnum));
- }
- return;
- }
+ return frame_unwind_got_memory (this_frame, regnum,
+ cache->saved_regs[regnum]);
- *optimizedp = 0;
- *lvalp = lval_register;
- *addrp = 0;
- *realnump = regnum;
- if (valuep)
- frame_unwind_register (next_frame, (*realnump), valuep);
+ return frame_unwind_got_register (this_frame, regnum, regnum);
}
static void
-sh_frame_this_id (struct frame_info *next_frame, void **this_cache,
+sh_frame_this_id (struct frame_info *this_frame, void **this_cache,
struct frame_id *this_id)
{
- struct sh_frame_cache *cache = sh_frame_cache (next_frame, this_cache);
+ struct sh_frame_cache *cache = sh_frame_cache (this_frame, this_cache);
/* This marks the outermost frame. */
if (cache->base == 0)
static const struct frame_unwind sh_frame_unwind = {
NORMAL_FRAME,
sh_frame_this_id,
- sh_frame_prev_register
+ sh_frame_prev_register,
+ NULL,
+ default_frame_sniffer
};
-static const struct frame_unwind *
-sh_frame_sniffer (struct frame_info *next_frame)
-{
- return &sh_frame_unwind;
-}
-
static CORE_ADDR
sh_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
{
- return frame_unwind_register_unsigned (next_frame, SP_REGNUM);
+ return frame_unwind_register_unsigned (next_frame,
+ gdbarch_sp_regnum (gdbarch));
}
static CORE_ADDR
sh_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
{
- return frame_unwind_register_unsigned (next_frame, PC_REGNUM);
+ return frame_unwind_register_unsigned (next_frame,
+ gdbarch_pc_regnum (gdbarch));
}
static struct frame_id
-sh_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
+sh_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
{
- return frame_id_build (sh_unwind_sp (gdbarch, next_frame),
- frame_pc_unwind (next_frame));
+ CORE_ADDR sp = get_frame_register_unsigned (this_frame,
+ gdbarch_sp_regnum (gdbarch));
+ return frame_id_build (sp, get_frame_pc (this_frame));
}
static CORE_ADDR
-sh_frame_base_address (struct frame_info *next_frame, void **this_cache)
+sh_frame_base_address (struct frame_info *this_frame, void **this_cache)
{
- struct sh_frame_cache *cache = sh_frame_cache (next_frame, this_cache);
+ struct sh_frame_cache *cache = sh_frame_cache (this_frame, this_cache);
return cache->base;
}
static int
sh_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
{
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
CORE_ADDR func_addr = 0, func_end = 0;
if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
/* First search forward until hitting an rts. */
while (addr < func_end
- && !IS_RTS (read_memory_unsigned_integer (addr, 2)))
+ && !IS_RTS (read_memory_unsigned_integer (addr, 2, byte_order)))
addr += 2;
if (addr >= func_end)
return 0;
/* At this point we should find a mov.l @r15+,r14 instruction,
either before or after the rts. If not, then the function has
probably no "normal" epilogue and we bail out here. */
- inst = read_memory_unsigned_integer (addr - 2, 2);
- if (IS_RESTORE_FP (read_memory_unsigned_integer (addr - 2, 2)))
+ inst = read_memory_unsigned_integer (addr - 2, 2, byte_order);
+ if (IS_RESTORE_FP (read_memory_unsigned_integer (addr - 2, 2,
+ byte_order)))
addr -= 2;
- else if (!IS_RESTORE_FP (read_memory_unsigned_integer (addr + 2, 2)))
+ else if (!IS_RESTORE_FP (read_memory_unsigned_integer (addr + 2, 2,
+ byte_order)))
return 0;
- inst = read_memory_unsigned_integer (addr - 2, 2);
+ inst = read_memory_unsigned_integer (addr - 2, 2, byte_order);
/* Step over possible lds.l @r15+,macl. */
if (IS_MACL_LDS (inst))
{
addr -= 2;
- inst = read_memory_unsigned_integer (addr - 2, 2);
+ inst = read_memory_unsigned_integer (addr - 2, 2, byte_order);
}
/* Step over possible lds.l @r15+,pr. */
if (IS_LDS (inst))
{
addr -= 2;
- inst = read_memory_unsigned_integer (addr - 2, 2);
+ inst = read_memory_unsigned_integer (addr - 2, 2, byte_order);
}
/* Step over possible mov r14,r15. */
if (IS_MOV_FP_SP (inst))
{
addr -= 2;
- inst = read_memory_unsigned_integer (addr - 2, 2);
+ inst = read_memory_unsigned_integer (addr - 2, 2, byte_order);
}
/* Now check for FP adjustments, using add #imm,r14 or add rX, r14
&& (IS_ADD_REG_TO_FP (inst) || IS_ADD_IMM_FP (inst)))
{
addr -= 2;
- inst = read_memory_unsigned_integer (addr - 2, 2);
+ inst = read_memory_unsigned_integer (addr - 2, 2, byte_order);
}
/* On SH2a check if the previous instruction was perhaps a MOVI20.
if ((gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_sh2a
|| gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_sh2a_nofpu)
&& addr > func_addr + 6
- && IS_MOVI20 (read_memory_unsigned_integer (addr - 4, 2)))
+ && IS_MOVI20 (read_memory_unsigned_integer (addr - 4, 2,
+ byte_order)))
addr -= 4;
if (pc >= addr)
set_gdbarch_breakpoint_from_pc (gdbarch, sh_breakpoint_from_pc);
- set_gdbarch_print_insn (gdbarch, gdb_print_insn_sh);
+ set_gdbarch_print_insn (gdbarch, print_insn_sh);
set_gdbarch_register_sim_regno (gdbarch, legacy_register_sim_regno);
- set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
-
set_gdbarch_return_value (gdbarch, sh_return_value_nofpu);
- set_gdbarch_deprecated_extract_struct_value_address (gdbarch,
- sh_extract_struct_value_address);
set_gdbarch_skip_prologue (gdbarch, sh_skip_prologue);
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
set_gdbarch_frame_align (gdbarch, sh_frame_align);
set_gdbarch_unwind_sp (gdbarch, sh_unwind_sp);
set_gdbarch_unwind_pc (gdbarch, sh_unwind_pc);
- set_gdbarch_unwind_dummy_id (gdbarch, sh_unwind_dummy_id);
+ set_gdbarch_dummy_id (gdbarch, sh_dummy_id);
frame_base_set_default (gdbarch, &sh_frame_base);
set_gdbarch_in_function_epilogue_p (gdbarch, sh_in_function_epilogue_p);
/* Hook in ABI-specific overrides, if they have been registered. */
gdbarch_init_osabi (info, gdbarch);
- frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer);
- frame_unwind_append_sniffer (gdbarch, sh_frame_sniffer);
+ dwarf2_append_unwinders (gdbarch);
+ frame_unwind_append_unwinder (gdbarch, &sh_frame_unwind);
return gdbarch;
}
+static void
+show_sh_command (char *args, int from_tty)
+{
+ help_list (showshcmdlist, "show sh ", all_commands, gdb_stdout);
+}
+
+static void
+set_sh_command (char *args, int from_tty)
+{
+ printf_unfiltered
+ ("\"set sh\" must be followed by an appropriate subcommand.\n");
+ help_list (setshcmdlist, "set sh ", all_commands, gdb_stdout);
+}
+
extern initialize_file_ftype _initialize_sh_tdep; /* -Wmissing-prototypes */
void
gdbarch_register (bfd_arch_sh, sh_gdbarch_init, NULL);
add_com ("regs", class_vars, sh_show_regs_command, _("Print all registers"));
+
+ add_prefix_cmd ("sh", no_class, set_sh_command, "SH specific commands.",
+ &setshcmdlist, "set sh ", 0, &setlist);
+ add_prefix_cmd ("sh", no_class, show_sh_command, "SH specific commands.",
+ &showshcmdlist, "show sh ", 0, &showlist);
+
+ add_setshow_enum_cmd ("calling-convention", class_vars, sh_cc_enum,
+ &sh_active_calling_convention,
+ _("Set calling convention used when calling target "
+ "functions from GDB."),
+ _("Show calling convention used when calling target "
+ "functions from GDB."),
+ _("gcc - Use GCC calling convention (default).\n"
+ "renesas - Enforce Renesas calling convention."),
+ NULL, NULL,
+ &setshcmdlist, &showshcmdlist);
}