-# Copyright (C) 2002, 2003, 2005, 2007 Free Software Foundation, Inc.
+# Copyright (C) 2002-2021 Free Software Foundation, Inc.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
+# the Free Software Foundation; either version 3 of the License, or
# (at your option) any later version.
#
-# This program is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
#
-# Please email any bugs, comments, and/or additions to this file to:
-# bug-gdb@prep.ai.mit.edu
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
#
# Tests for Powerpc AltiVec register setting and fetching
-if $tracelevel then {
- strace $tracelevel
-}
-
#
# Test the use of registers, especially AltiVec registers, for Powerpc.
# This file uses altivec-regs.c for input.
#
-set prms_id 0
-set bug_id 0
if {![istarget "powerpc*"] || [skip_altivec_tests]} then {
verbose "Skipping altivec register tests."
- verbose -log "Skipping altivec register tests."
return
}
-set testfile "altivec-regs"
-set binfile ${objdir}/${subdir}/${testfile}
-set srcfile ${testfile}.c
+standard_testfile
set compile_flags {debug nowarnings}
-if [get_compiler_info $binfile] {
+if [get_compiler_info] {
warning "get_compiler failed"
return -1
}
if [test_compiler_info gcc*] {
- set compile_flags "$compile_flags additional_flags=-maltivec"
+ set compile_flags "$compile_flags additional_flags=-maltivec additional_flags=-mabi=altivec"
} elseif [test_compiler_info xlc*] {
set compile_flags "$compile_flags additional_flags=-qaltivec"
} else {
}
if { [gdb_compile ${srcdir}/${subdir}/${srcfile} ${binfile} executable $compile_flags] != "" } {
- untested altivec-regs.exp
+ untested "failed to compile"
return -1
}
#
if ![runto_main] then {
- gdb_suppress_tests
+ fail "can't run to main"
+ return 0
}
+gdb_test "set print frame-arguments all"
+
# set all the registers integer portions to 1
for {set i 0} {$i < 32} {incr i 1} {
for {set j 0} {$j < 4} {incr j 1} {
gdb_test "next" "" ""
-send_gdb "show endian\n"
-gdb_expect {
- -re "(The target endianness is set automatically .currently )(big|little)( endian.*)$gdb_prompt $" {
- pass "endianness"
- set endianness $expect_out(2,string)
- }
- -re ".*$gdb_prompt $" {
- fail "couldn't get endianness"
- }
- timeout { fail "(timeout) endianness" }
-}
+set endianness [get_endianness]
# And then read the AltiVec registers back, to see that
# a) the register write above worked, and
# b) the register read (below) also works.
if {$endianness == "big"} {
-set vector_register ".uint128 = 0x00000001000000010000000100000001, v4_float = .0x0, 0x0, 0x0, 0x0., v4_int32 = .0x1, 0x1, 0x1, 0x1., v8_int16 = .0x0, 0x1, 0x0, 0x1, 0x0, 0x1, 0x0, 0x1., v16_int8 = .0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1.."
+set vector_register ".uint128 = 0x1000000010000000100000001, v4_float = .0x0, 0x0, 0x0, 0x0., v4_int32 = .0x1, 0x1, 0x1, 0x1., v8_int16 = .0x0, 0x1, 0x0, 0x1, 0x0, 0x1, 0x0, 0x1., v16_int8 = .0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1.."
} else {
-set vector_register ".uint128 = 0x00000001000000010000000100000001, v4_float = .0x0, 0x0, 0x0, 0x0., v4_int32 = .0x1, 0x1, 0x1, 0x1., v8_int16 = .0x1, 0x0, 0x1, 0x0, 0x1, 0x0, 0x1, 0x0., v16_int8 = .0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0.."
+set vector_register ".uint128 = 0x1000000010000000100000001, v4_float = .0x0, 0x0, 0x0, 0x0., v4_int32 = .0x1, 0x1, 0x1, 0x1., v8_int16 = .0x1, 0x0, 0x1, 0x0, 0x1, 0x0, 0x1, 0x0., v16_int8 = .0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0.."
}
for {set i 0} {$i < 32} {incr i 1} {
- gdb_test "info reg vr$i" "vr$i.*$vector_register" "info reg vr$i"
+ gdb_test "info reg vr$i" "vr$i.*$vector_register" "info reg vr$i"
+ gdb_test "info reg v$i" "v$i.*$vector_register" "info reg v$i"
}
-gdb_test "info reg vrsave" "vrsave.*0x1\t1" "info reg vrsave"
-gdb_test "info reg vscr" "vscr.*0x1\t1" "info reg vscr"
+gdb_test "info reg vrsave" "vrsave.*0x1\[ \t\]+1" "info reg vrsave"
+gdb_test "info reg vscr" "vscr.*0x1\[ \t\]+1" "info reg vscr"
# Now redo the same tests, but using the print command.
# Note: in LE case, the char array is printed WITHOUT the last character.
# the way gdb works.
if {$endianness == "big"} {
- set decimal_vector ".uint128 = 0x00000001000000010000000100000001, v4_float = .1.*e-45, 1.*e-45, 1.*e-45, 1.*e-45., v4_int32 = .1, 1, 1, 1., v8_int16 = .0, 1, 0, 1, 0, 1, 0, 1., v16_int8 = ..000.000.000.001.000.000.000.001.000.000.000.001.000.000.000.001.."
+ set decimal_vector ".uint128 = 79228162532711081671548469249, v4_float = .1.*e-45, 1.*e-45, 1.*e-45, 1.*e-45., v4_int32 = .1, 1, 1, 1., v8_int16 = .0, 1, 0, 1, 0, 1, 0, 1., v16_int8 = .0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1.."
} else {
- set decimal_vector ".uint128 = 0x00000001000000010000000100000001, v4_float = .1.*e-45, 1.*e-45, 1.*e-45, 1.*e-45., v4_int32 = .1, 1, 1, 1., v8_int16 = .1, 0, 1, 0, 1, 0, 1, 0., v16_int8 = ..001.000.000.000.001.000.000.000.001.000.000.000.001.000.000.."
+ set decimal_vector ".uint128 = 79228162532711081671548469249, v4_float = .1.*e-45, 1.*e-45, 1.*e-45, 1.*e-45., v4_int32 = .1, 1, 1, 1., v8_int16 = .1, 0, 1, 0, 1, 0, 1, 0., v16_int8 = .1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0.."
}
for {set i 0} {$i < 32} {incr i 1} {
- gdb_test "print \$vr$i" ".* = $decimal_vector" "print vr$i"
+ gdb_test "print \$vr$i" ".* = $decimal_vector" "print vr$i"
+ gdb_test "print \$v$i" ".* = $decimal_vector" "print v$i"
}
gdb_test "print \$vrsave" ".* = 1" "print vrsave"
gdb_test "print \$vscr" ".* = 1" "print vscr"
for {set i 0} {$i < 32} {incr i 1} {
- set pattern$i ".*vr$i.*"
- append pattern$i $vector_register
+ lappend pattern_list "vr$i\[ \t\]+$vector_register"
}
+lappend pattern_list "vscr\[ \t\]+0x1"
+lappend pattern_list "vrsave\[ \t\]+0x1"
+
send_gdb "info vector\n"
-gdb_expect_list "info vector" ".*$gdb_prompt $" {
-[$pattern0]
-[$pattern1]
-[$pattern2]
-[$pattern3]
-[$pattern4]
-[$pattern5]
-[$pattern6]
-[$pattern7]
-[$pattern8]
-[$pattern9]
-[$pattern10]
-[$pattern11]
-[$pattern12]
-[$pattern13]
-[$pattern14]
-[$pattern15]
-[$pattern16]
-[$pattern17]
-[$pattern18]
-[$pattern19]
-[$pattern20]
-[$pattern21]
-[$pattern22]
-[$pattern23]
-[$pattern24]
-[$pattern25]
-[$pattern26]
-[$pattern27]
-[$pattern28]
-[$pattern29]
-[$pattern30]
-[$pattern31]
-"\[ \t\n\r\]+vscr\[ \t\]+0x1"
-"\[ \t\n\r\]+vrsave\[ \t\]+0x1"
-}
+gdb_expect_list "info vector" ".*$gdb_prompt $" $pattern_list
gdb_test "break vector_fun" \
"Breakpoint 2 at.*altivec-regs.c, line \[0-9\]+\\." \
- "Set breakpoint at vector_fun"
+ "set breakpoint at vector_fun"
# Actually it is nuch easier to see these results printed in hex.
gdb_test "set output-radix 16" \
"Output radix now set to decimal 16, hex 10, octal 20." \
- "Set output radix to hex"
+ "set output radix to hex"
gdb_test "continue" \
"Breakpoint 2, vector_fun .a=.0xfefefefe, 0xfefefefe, 0xfefefefe, 0xfefefefe., b=.0x1010101, 0x1010101, 0x1010101, 0x1010101.*altivec-regs.c.*vec_splat_u8.2..;" \