#define ET_NONE 0 /* No file type */
#define ET_REL 1 /* Relocatable file */
-#define ET_EXEC 2 /* Executable file */
-#define ET_DYN 3 /* Shared object file */
+#define ET_EXEC 2 /* Position-dependent executable file */
+#define ET_DYN 3 /* Position-independent executable or
+ shared object file */
#define ET_CORE 4 /* Core file */
#define ET_LOOS 0xFE00 /* Operating system-specific */
#define ET_HIOS 0xFEFF /* Operating system-specific */
#define PT_GNU_RELRO (PT_LOOS + 0x474e552) /* Read-only after relocation */
#define PT_GNU_PROPERTY (PT_LOOS + 0x474e553) /* GNU property */
+/* OpenBSD segment types. */
+#define PT_OPENBSD_RANDOMIZE (PT_LOOS + 0x5a3dbe6) /* Fill with random data. */
+#define PT_OPENBSD_WXNEEDED (PT_LOOS + 0x5a3dbe7) /* Program does W^X violations. */
+#define PT_OPENBSD_BOOTDATA (PT_LOOS + 0x5a41be6) /* Section for boot arguments. */
+
/* Mbind segments */
#define PT_GNU_MBIND_NUM 4096
#define PT_GNU_MBIND_LO (PT_LOOS + 0x474e555)
#define NT_PRPSINFO 3 /* Contains copy of prpsinfo struct */
#define NT_TASKSTRUCT 4 /* Contains copy of task struct */
#define NT_AUXV 6 /* Contains copy of Elfxx_auxv_t */
+#define NT_MEMTAG 7 /* Contains a copy of the memory tags */
#define NT_PRXFPREG 0x46e62b7f /* Contains a user_xfpregs_struct; */
/* note name must be "LINUX". */
#define NT_PPC_VMX 0x100 /* PowerPC Altivec/VMX registers */
/* note name must be "LINUX". */
#define NT_X86_XSTATE 0x202 /* x86 XSAVE extended state */
/* note name must be "LINUX". */
+#define NT_X86_CET 0x203 /* x86 CET state. */
+ /* note name must be "LINUX". */
#define NT_S390_HIGH_GPRS 0x300 /* S/390 upper halves of GPRs */
/* note name must be "LINUX". */
#define NT_S390_TIMER 0x301 /* S390 timer */
/* note name must be "LINUX". */
#define NT_ARM_PAC_MASK 0x406 /* AArch pointer authentication code masks */
/* note name must be "LINUX". */
+#define NT_ARM_MORELLO 0x410 /* AArch capability registers */
+ /* Note name must be "LINUX". */
+
+#define NT_ARC_V2 0x600 /* ARC HS accumulator/extra registers. */
+ /* note name must be "LINUX". */
#define NT_SIGINFO 0x53494749 /* Fields of siginfo_t. */
#define NT_FILE 0x46494c45 /* Description of mapped files. */
+/* NT_MEMTAG record types. Reuse the same 0x4xx prefix to identify this
+ type as ARM-specific. */
+#define ELF_CORE_TAG_CHERI 0x401 /* CHERI memory tags for AArch64. */
+
/* Note segments for core files on dir-style procfs systems. */
#define NT_PSTATUS 10 /* Has a struct pstatus */
#define NT_NETBSDCORE_PROCINFO 1 /* Has a struct procinfo */
#define NT_NETBSDCORE_AUXV 2 /* Has auxv data */
+#define NT_NETBSDCORE_LWPSTATUS 24 /* Has LWPSTATUS data */
#define NT_NETBSDCORE_FIRSTMACH 32 /* start of machdep note types */
(GNU_PROPERTY_X86_UINT32_AND_LO + 0)
#define GNU_PROPERTY_X86_ISA_1_NEEDED \
- (GNU_PROPERTY_X86_UINT32_OR_LO + 0)
+ (GNU_PROPERTY_X86_UINT32_OR_LO + 2)
#define GNU_PROPERTY_X86_FEATURE_2_NEEDED \
(GNU_PROPERTY_X86_UINT32_OR_LO + 1)
#define GNU_PROPERTY_X86_ISA_1_USED \
- (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 0)
+ (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 2)
#define GNU_PROPERTY_X86_FEATURE_2_USED \
(GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1)
+/* Baseline: CMOV (cmov) CX8 (cmpxchg8b) FPU (fld), FXSR (fxsave),
+ SCE (syscall), MMX, SSE and SSE2. */
+
+/* GNU_PROPERTY_X86_ISA_1_V2: Baseline, CMPXCHG16B (cmpxchg16b),
+ LAHF-SAHF (lahf), POPCNT (popcnt), SSE3, SSSE3, SSE4.1 and SSE4.2. */
+#define GNU_PROPERTY_X86_ISA_1_V2 (1U << 0)
+/* GNU_PROPERTY_X86_ISA_1_V3: GNU_PROPERTY_X86_ISA_1_V2, AVX, AVX2, BMI1,
+ BMI2, F16C, FMA, LZCNT, MOVBE, XSAVE. */
+#define GNU_PROPERTY_X86_ISA_1_V3 (1U << 1)
+/* GNU_PROPERTY_X86_ISA_1_V4: GNU_PROPERTY_X86_ISA_1_V3, AVX512F,
+ AVX512BW, AVX512CD, AVX512DQ and AVX512VL. */
+#define GNU_PROPERTY_X86_ISA_1_V4 (1U << 2)
+
#define GNU_PROPERTY_X86_FEATURE_1_IBT (1U << 0)
#define GNU_PROPERTY_X86_FEATURE_1_SHSTK (1U << 1)
-#define GNU_PROPERTY_X86_ISA_1_CMOV (1U << 0)
-#define GNU_PROPERTY_X86_ISA_1_SSE (1U << 1)
-#define GNU_PROPERTY_X86_ISA_1_SSE2 (1U << 2)
-#define GNU_PROPERTY_X86_ISA_1_SSE3 (1U << 3)
-#define GNU_PROPERTY_X86_ISA_1_SSSE3 (1U << 4)
-#define GNU_PROPERTY_X86_ISA_1_SSE4_1 (1U << 5)
-#define GNU_PROPERTY_X86_ISA_1_SSE4_2 (1U << 6)
-#define GNU_PROPERTY_X86_ISA_1_AVX (1U << 7)
-#define GNU_PROPERTY_X86_ISA_1_AVX2 (1U << 8)
-#define GNU_PROPERTY_X86_ISA_1_FMA (1U << 9)
-#define GNU_PROPERTY_X86_ISA_1_AVX512F (1U << 10)
-#define GNU_PROPERTY_X86_ISA_1_AVX512CD (1U << 11)
-#define GNU_PROPERTY_X86_ISA_1_AVX512ER (1U << 12)
-#define GNU_PROPERTY_X86_ISA_1_AVX512PF (1U << 13)
-#define GNU_PROPERTY_X86_ISA_1_AVX512VL (1U << 14)
-#define GNU_PROPERTY_X86_ISA_1_AVX512DQ (1U << 15)
-#define GNU_PROPERTY_X86_ISA_1_AVX512BW (1U << 16)
-#define GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS (1U << 17)
-#define GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW (1U << 18)
-#define GNU_PROPERTY_X86_ISA_1_AVX512_BITALG (1U << 19)
-#define GNU_PROPERTY_X86_ISA_1_AVX512_IFMA (1U << 20)
-#define GNU_PROPERTY_X86_ISA_1_AVX512_VBMI (1U << 21)
-#define GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2 (1U << 22)
-#define GNU_PROPERTY_X86_ISA_1_AVX512_VNNI (1U << 23)
-#define GNU_PROPERTY_X86_ISA_1_AVX512_BF16 (1U << 24)
-
#define GNU_PROPERTY_X86_FEATURE_2_X86 (1U << 0)
#define GNU_PROPERTY_X86_FEATURE_2_X87 (1U << 1)
#define GNU_PROPERTY_X86_FEATURE_2_MMX (1U << 2)
#define GNU_PROPERTY_X86_FEATURE_2_XSAVE (1U << 7)
#define GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT (1U << 8)
#define GNU_PROPERTY_X86_FEATURE_2_XSAVEC (1U << 9)
+#define GNU_PROPERTY_X86_FEATURE_2_TMM (1U << 10)
+#define GNU_PROPERTY_X86_FEATURE_2_MASK (1U << 11)
+
+#define GNU_PROPERTY_X86_COMPAT_2_ISA_1_NEEDED \
+ (GNU_PROPERTY_X86_UINT32_OR_LO + 0)
+
+#define GNU_PROPERTY_X86_COMPAT_2_ISA_1_USED \
+ (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 0)
+
+#define GNU_PROPERTY_X86_COMPAT_2_ISA_1_CMOV (1U << 0)
+#define GNU_PROPERTY_X86_COMPAT_2_ISA_1_SSE (1U << 1)
+#define GNU_PROPERTY_X86_COMPAT_2_ISA_1_SSE2 (1U << 2)
+#define GNU_PROPERTY_X86_COMPAT_2_ISA_1_SSE3 (1U << 3)
+#define GNU_PROPERTY_X86_COMPAT_2_ISA_1_SSSE3 (1U << 4)
+#define GNU_PROPERTY_X86_COMPAT_2_ISA_1_SSE4_1 (1U << 5)
+#define GNU_PROPERTY_X86_COMPAT_2_ISA_1_SSE4_2 (1U << 6)
+#define GNU_PROPERTY_X86_COMPAT_2_ISA_1_AVX (1U << 7)
+#define GNU_PROPERTY_X86_COMPAT_2_ISA_1_AVX2 (1U << 8)
+#define GNU_PROPERTY_X86_COMPAT_2_ISA_1_FMA (1U << 9)
+#define GNU_PROPERTY_X86_COMPAT_2_ISA_1_AVX512F (1U << 10)
+#define GNU_PROPERTY_X86_COMPAT_2_ISA_1_AVX512CD (1U << 11)
+#define GNU_PROPERTY_X86_COMPAT_2_ISA_1_AVX512ER (1U << 12)
+#define GNU_PROPERTY_X86_COMPAT_2_ISA_1_AVX512PF (1U << 13)
+#define GNU_PROPERTY_X86_COMPAT_2_ISA_1_AVX512VL (1U << 14)
+#define GNU_PROPERTY_X86_COMPAT_2_ISA_1_AVX512DQ (1U << 15)
+#define GNU_PROPERTY_X86_COMPAT_2_ISA_1_AVX512BW (1U << 16)
+#define GNU_PROPERTY_X86_COMPAT_2_ISA_1_AVX512_4FMAPS (1U << 17)
+#define GNU_PROPERTY_X86_COMPAT_2_ISA_1_AVX512_4VNNIW (1U << 18)
+#define GNU_PROPERTY_X86_COMPAT_2_ISA_1_AVX512_BITALG (1U << 19)
+#define GNU_PROPERTY_X86_COMPAT_2_ISA_1_AVX512_IFMA (1U << 20)
+#define GNU_PROPERTY_X86_COMPAT_2_ISA_1_AVX512_VBMI (1U << 21)
+#define GNU_PROPERTY_X86_COMPAT_2_ISA_1_AVX512_VBMI2 (1U << 22)
+#define GNU_PROPERTY_X86_COMPAT_2_ISA_1_AVX512_VNNI (1U << 23)
+#define GNU_PROPERTY_X86_COMPAT_2_ISA_1_AVX512_BF16 (1U << 24)
/* AArch64 specific GNU PROPERTY. */
#define GNU_PROPERTY_AARCH64_FEATURE_1_AND 0xc0000000
#define ELF32_R_SYM(i) ((i) >> 8)
#define ELF32_R_TYPE(i) ((i) & 0xff)
-#define ELF32_R_INFO(s,t) (((s) << 8) + ((t) & 0xff))
+#define ELF32_R_INFO(s,t) (((unsigned) (s) << 8) + ((t) & 0xff))
#define ELF64_R_SYM(i) ((i) >> 32)
#define ELF64_R_TYPE(i) ((i) & 0xffffffff)
#define AT_FREEBSD_EHDRFLAGS 24 /* e_flags field from ELF header. */
#define AT_FREEBSD_HWCAP 25 /* CPU feature flags. */
#define AT_FREEBSD_HWCAP2 26 /* CPU feature flags 2. */
+#define AT_FREEBSD_BSDFLAGS 27 /* ELF BSD Flags. */
+#define AT_FREEBSD_ARGC 28 /* Argument count. */
+#define AT_FREEBSD_ARGV 29 /* Argument vector. */
+#define AT_FREEBSD_ENVC 30 /* Environment count. */
+#define AT_FREEBSD_ENVV 31 /* Environment vvector. */
+#define AT_FREEBSD_PS_STRINGS 32 /* struct ps_strings. */
#define AT_SUN_UID 2000 /* Effective user ID. */
#define AT_SUN_RUID 2001 /* Real user ID. */
#define AT_SUN_BRAND_AUX3 2022
#define AT_SUN_CAP_HW2 2023 /* Extension of AT_SUN_CAP_HW1. */
+/* CHERI auxv types. */
+#define AT_CHERI_EXEC_RW_CAP 60
+#define AT_CHERI_EXEC_RX_CAP 61
+#define AT_CHERI_INTERP_RW_CAP 62
+#define AT_CHERI_INTERP_RX_CAP 63
+#define AT_CHERI_STACK_CAP 64
+#define AT_CHERI_SEAL_CAP 65
+#define AT_CHERI_CID_CAP 66
+#define AT_ARGC 80
+#define AT_ARGV 81
+#define AT_ENVC 82
+#define AT_ENVP 83
+
#endif /* _ELF_COMMON_H */