]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blobdiff - opcodes/ChangeLog
2.41 Release sources
[thirdparty/binutils-gdb.git] / opcodes / ChangeLog
index f0e4b72c353c20d35f12e454766874022535e3ba..a0e55822751dd48145378b0d99b6dc8b59f9e995 100644 (file)
@@ -1,3 +1,181 @@
+2023-07-30  Nick Clifton  <nickc@redhat.com>
+
+       This is the 2.41 release.
+       * configure: Regenerate.
+       * po/opcodes.pot: Regenerate.
+
+2023-07-03  Nick Clifton  <nickc@redhat.com>
+
+       * configure: Regenerate.
+       * po/opcodes.pot: Regenerate.
+
+2023-07-03  Nick Clifton  <nickc@redhat.com>
+
+       2.41 Branch Point.
+
+2023-05-23  Nick Clifton  <nickc@redhat.com>
+
+       * po/sv.po: Updated translation.
+
+2023-04-21  Tom Tromey  <tromey@adacore.com>
+
+       * i386-dis.c (OP_J): Check result of get16.
+
+2023-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
+
+       * arc-tbl.h: Remove vadds2, vadds2h, vadds4h, vaddsubs,
+       vaddsubs2h, vaddsubs4h, vsubadds, vsubadds2h, vsubadds4h, vsubs2,
+       vsubs2h, and vsubs4h instructions.
+
+2023-04-11  Nick Clifton  <nickc@redhat.com>
+
+       PR 30310
+       * nfp-dis.c (init_nfp6000_priv): Check that the output section
+       exists.
+
+2023-03-15  Nick Clifton  <nickc@redhat.com>
+
+       PR 30231
+       * mep-dis.c: Regenerate.
+
+2023-03-15  Nick Clifton  <nickc@redhat.com>
+
+       PR 30230
+       * arm-dis.c (get_sym_code_type): Check for non-ELF symbols.
+
+2023-02-28  Richard Ball  <richard.ball@arm.com>
+
+       * aarch64-opc.c: Add MEC system registers.
+
+2023-01-03  Nick Clifton  <nickc@redhat.com>
+
+       * po/de.po: Updated German translation.
+       * po/ro.po: Updated Romainian translation.
+       * po/uk.po: Updated Ukrainian translation.
+
+2022-12-31  Nick Clifton  <nickc@redhat.com>
+
+       * 2.40 branch created.
+
+2022-11-22  Shahab Vahedi  <shahab@synopsys.com>
+
+       * arc-regs.h: Change isa_config address to 0xc1.
+       isa_config exists for ARC700 and ARCV2 and not ARCALL.
+
+2022-10-31  Yoshinori Sato  <ysato@users.sourceforge.jp>
+
+       * rx-decode.opc: Switch arguments of the MVTACGU insn.
+       * rx-decode.c: Regenerate.
+
+2022-09-22  Yoshinori Sato  <ysato@users.sourceforge.jp>
+
+       * sh-dis.c (print_insn_sh): Enforce bit7 of LDC Rm,Rn_BANK and STC
+       Rm_BANK,Rn is always 1.
+
+2022-07-21  Peter Bergner  <bergner@linux.ibm.com>
+
+       * ppc-opc.c (XACC_MASK, XX3ACC_MASK): New defines.
+       (P_GER_MASK, xxmfacc, xxmtacc, xxsetaccz, xvi8ger4pp, xvi8ger4,
+       xvf16ger2pp, xvf16ger2, xvf32gerpp, xvf32ger, xvi4ger8pp, xvi4ger8,
+       xvi16ger2spp, xvi16ger2s, xvbf16ger2pp, xvbf16ger2, xvf64gerpp,
+       xvf64ger, xvi16ger2, xvf16ger2np, xvf32gernp, xvi8ger4spp, xvi16ger2pp,
+       xvbf16ger2np, xvf64gernp, xvf16ger2pn, xvf32gerpn, xvbf16ger2pn,
+       xvf64gerpn, xvf16ger2nn, xvf32gernn, xvbf16ger2nn, xvf64gernn: Use them.
+
+2022-07-18  Claudiu Zissulescu  <claziss@synopsys.com>
+
+       * disassemble.c (disassemble_init_for_target): Set
+       created_styled_output for ARC based targets.
+       * arc-dis.c (find_format_from_table): Use fprintf_styled_ftype
+       instead of fprintf_ftype throughout.
+       (find_format): Likewise.
+       (print_flags): Likewise.
+       (print_insn_arc): Likewise.
+
+2022-07-08  Nick Clifton  <nickc@redhat.com>
+
+       * 2.39 branch created.
+
+2022-07-04  Marcus Nilsson  <brainbomb@gmail.com>
+
+       * disassemble.c: (disassemble_init_for_target): Set
+       created_styled_output for AVR based targets.
+       * avr-dis.c: (print_insn_avr): Use fprintf_styled_ftype
+       instead of fprintf_ftype throughout.
+       (avr_operand): Pass in and fill disassembler_style when
+       parsing operands.
+
+2022-04-07  Andreas Krebbel  <krebbel@linux.ibm.com>
+
+       * s390-mkopc.c (main): Enable z16 as CPU string in the opcode
+       table.
+
+2022-03-16  Simon Marchi  <simon.marchi@efficios.com>
+
+       * configure.ac: Handle bfd_amdgcn_arch.
+       * configure: Re-generate.
+
+2022-03-06  Sagar Patel  <sagarmp@cs.unc.edu>
+           Maciej W. Rozycki  <macro@orcam.me.uk>
+
+       * mips-opc.c (mips_builtin_opcodes): Fix INSN2_ALIAS annotation
+       for "bal", "beqz", "beqzl", "bnez" and "bnezl" instructions.
+       * micromips-opc.c (micromips_opcodes): Likewise for "beqz" and
+       "bnez" instructions.
+
+2022-02-17  Nick Clifton  <nickc@redhat.com>
+
+       * po/sr.po: Updated Serbian translation.
+
+2022-02-14  Sergei Trofimovich  <siarheit@google.com>
+
+       * microblaze-opcm.h: Renamed 'fsqrt' to 'microblaze_fsqrt'.
+       * microblaze-opc.h: Follow 'fsqrt' rename.
+
+2022-01-24  Nick Clifton  <nickc@redhat.com>
+
+       * po/ro.po: Updated Romanian translation.
+       * po/uk.po: Updated Ukranian translation.
+
+2022-01-22  Nick Clifton  <nickc@redhat.com>
+
+       * configure: Regenerate.
+       * po/opcodes.pot: Regenerate.
+
+2022-01-22  Nick Clifton  <nickc@redhat.com>
+
+       * 2.38 release branch created.
+
+2022-01-17  Nick Clifton  <nickc@redhat.com>
+
+       * Makefile.in: Regenerate.
+       * po/opcodes.pot: Regenerate.
+
+2021-12-02  Marcus Nilsson  <brainbomb@gmail.com>
+
+       * avr-dis.c (avr_operand); Pass in disassemble_info and fill
+       in insn_type on branching instructions.
+
+2021-11-25  Andrew Burgess  <aburgess@redhat.com>
+           Simon Cook  <simon.cook@embecosm.com>
+
+       * riscv-dis.c (enum riscv_option_arg_t): New enum typedef.
+       (riscv_options): New static global.
+       (disassembler_options_riscv): New function.
+       (print_riscv_disassembler_options): Rewrite to use
+       disassembler_options_riscv.
+
+2021-11-25  Nick Clifton  <nickc@redhat.com>
+
+       PR 28614
+       * aarch64-asm.c: Replace assert(0) with real code.
+       * aarch64-dis.c: Likewise.
+       * aarch64-opc.c: Likewise.
+
+2021-11-25  Nick Clifton  <nickc@redhat.com>
+
+       * po/fr.po; Updated French translation.
+
 2021-10-27  Maciej W. Rozycki  <macro@embecosm.com>
 
        * Makefile.am: Remove obsolete comment.
 
 For older changes see ChangeLog-2020
 \f
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+Copyright (C) 2021-2023 Free Software Foundation, Inc.
 
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