Fix printf formatting errors where "0x" is used as a prefix for a decimal number.

[thirdparty/binutils-gdb.git] / opcodes / disassemble.c

diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c
index ce83423b6dd76b1980a7861bcd89f0438d07d76c..290dcdd100d19437e7f52423d629711e3c2a007e 100644 (file)
--- a/opcodes/disassemble.c
+++ b/opcodes/disassemble.c
@@ -1,5 +1,5 @@
 /* Select disassembly routine for specified architecture.
-   Copyright (C) 1994-2018 Free Software Foundation, Inc.
+   Copyright (C) 1994-2020 Free Software Foundation, Inc.
 
    This file is part of the GNU opcodes library.
 
@@ -21,7 +21,7 @@
 #include "sysdep.h"
 #include "disassemble.h"
 #include "safe-ctype.h"
-#include <assert.h>
+#include "opintl.h"
 
 #ifdef ARCH_all
 #define ARCH_aarch64
@@ -37,6 +37,7 @@
 #define ARCH_d10v
 #define ARCH_d30v
 #define ARCH_dlx
+#define ARCH_bpf
 #define ARCH_epiphany
 #define ARCH_fr30
 #define ARCH_frv
@@ -87,7 +88,6 @@
 #define ARCH_tic4x
 #define ARCH_tic54x
 #define ARCH_tic6x
-#define ARCH_tic80
 #define ARCH_tilegx
 #define ARCH_tilepro
 #define ARCH_v850
@@ -106,6 +106,23 @@
 #include "m32c-desc.h"
 #endif
 
+#ifdef ARCH_bpf
+/* XXX this should be including bpf-desc.h instead of this hackery,
+   but at the moment it is not possible to include several CGEN
+   generated *-desc.h files simultaneously.  To be fixed in
+   CGEN...  */
+
+# ifdef ARCH_m32c
+enum epbf_isa_attr
+{
+  ISA_EBPFLE, ISA_EBPFBE, ISA_XBPFLE, ISA_XBPFBE, ISA_EBPFMAX
+};
+# else
+#  include "bpf-desc.h"
+#  define ISA_EBPFMAX ISA_MAX
+# endif
+#endif /* ARCH_bpf */
+
 disassembler_ftype
 disassembler (enum bfd_architecture a,
              bfd_boolean big ATTRIBUTE_UNUSED,
@@ -224,6 +241,11 @@ disassembler (enum bfd_architecture a,
       disassemble = print_insn_ip2k;
       break;
 #endif
+#ifdef ARCH_bpf
+    case bfd_arch_bpf:
+      disassemble = print_insn_bpf;
+      break;
+#endif
 #ifdef ARCH_epiphany
     case bfd_arch_epiphany:
       disassemble = print_insn_epiphany;
@@ -441,11 +463,6 @@ disassembler (enum bfd_architecture a,
       disassemble = print_insn_tic6x;
       break;
 #endif
-#ifdef ARCH_tic80
-    case bfd_arch_tic80:
-      disassemble = print_insn_tic80;
-      break;
-#endif
 #ifdef ARCH_ft32
     case bfd_arch_ft32:
       disassemble = print_insn_ft32;
@@ -631,13 +648,34 @@ disassemble_init_for_target (struct disassemble_info * info)
       /* This processor in fact is little endian.  The value set here
         reflects the way opcodes are written in the cgen description.  */
       info->endian = BFD_ENDIAN_BIG;
-      if (! info->insn_sets)
+      if (!info->private_data)
        {
-         info->insn_sets = cgen_bitset_create (ISA_MAX);
+         info->private_data = cgen_bitset_create (ISA_MAX);
          if (info->mach == bfd_mach_m16c)
-           cgen_bitset_set (info->insn_sets, ISA_M16C);
+           cgen_bitset_set (info->private_data, ISA_M16C);
          else
-           cgen_bitset_set (info->insn_sets, ISA_M32C);
+           cgen_bitset_set (info->private_data, ISA_M32C);
+       }
+      break;
+#endif
+#ifdef ARCH_bpf
+    case bfd_arch_bpf:
+      info->endian_code = BFD_ENDIAN_LITTLE;
+      if (!info->private_data)
+       {
+         info->private_data = cgen_bitset_create (ISA_MAX);
+         if (info->endian == BFD_ENDIAN_BIG)
+           {
+             cgen_bitset_set (info->private_data, ISA_EBPFBE);
+             if (info->mach == bfd_mach_xbpf)
+               cgen_bitset_set (info->private_data, ISA_XBPFBE);
+           }
+         else
+           {
+             cgen_bitset_set (info->private_data, ISA_EBPFLE);
+             if (info->mach == bfd_mach_xbpf)
+               cgen_bitset_set (info->private_data, ISA_XBPFLE);
+           }
        }
       break;
 #endif
@@ -656,6 +694,11 @@ disassemble_init_for_target (struct disassemble_info * info)
       disassemble_init_powerpc (info);
       break;
 #endif
+#ifdef ARCH_riscv
+    case bfd_arch_riscv:
+      info->symbol_is_valid = riscv_symbol_is_valid;
+      break;
+#endif
 #ifdef ARCH_wasm32
     case bfd_arch_wasm32:
       disassemble_init_wasm32 (info);
@@ -666,11 +709,75 @@ disassemble_init_for_target (struct disassemble_info * info)
       disassemble_init_s390 (info);
       break;
 #endif
+#ifdef ARCH_nds32
+    case bfd_arch_nds32:
+      disassemble_init_nds32 (info);
+      break;
+ #endif
     default:
       break;
     }
 }
 
+void
+disassemble_free_target (struct disassemble_info *info)
+{
+  if (info == NULL)
+    return;
+
+  switch (info->arch)
+    {
+    default:
+      return;
+
+#ifdef ARCH_bpf
+    case bfd_arch_bpf:
+#endif
+#ifdef ARCH_m32c
+    case bfd_arch_m32c:
+#endif
+#if defined ARCH_bpf || defined ARCH_m32c
+      if (info->private_data)
+       {
+         CGEN_BITSET *mask = info->private_data;
+         free (mask->bits);
+       }
+      break;
+#endif
+
+#ifdef ARCH_arc
+    case bfd_arch_arc:
+      break;
+#endif
+#ifdef ARCH_cris
+    case bfd_arch_cris:
+      break;
+#endif
+#ifdef ARCH_mmix
+    case bfd_arch_mmix:
+      break;
+#endif
+#ifdef ARCH_nfp
+    case bfd_arch_nfp:
+      break;
+#endif
+#ifdef ARCH_powerpc
+    case bfd_arch_powerpc:
+      break;
+#endif
+#ifdef ARCH_riscv
+    case bfd_arch_riscv:
+      break;
+#endif
+#ifdef ARCH_rs6000
+    case bfd_arch_rs6000:
+      break;
+#endif
+    }
+
+  free (info->private_data);
+}
+
 /* Remove whitespace and consecutive commas from OPTIONS.  */
 
 char *
@@ -734,3 +841,11 @@ disassembler_options_cmp (const char *s1, const char *s2)
 
   return c1 - c2;
 }
+
+void
+opcodes_assert (const char *file, int line)
+{
+  opcodes_error_handler (_("assertion fail %s:%d"), file, line);
+  opcodes_error_handler (_("Please report this bug"));
+  abort ();
+}