cpu/

[thirdparty/binutils-gdb.git] / opcodes / m32r-ibld.c

diff --git a/opcodes/m32r-ibld.c b/opcodes/m32r-ibld.c
index b049c47315b81d079408688b6e167985e9947407..8e3319f796b1f517613f8218c06c0cf6f7e35ea5 100644 (file)
--- a/opcodes/m32r-ibld.c
+++ b/opcodes/m32r-ibld.c
@@ -33,6 +33,7 @@
 #include "symcat.h"
 #include "m32r-desc.h"
 #include "m32r-opc.h"
+#include "cgen/basic-modes.h"
 #include "opintl.h"
 #include "safe-ctype.h"
 
@@ -580,21 +581,21 @@ m32r_cgen_insert_operand (CGEN_CPU_DESC cd,
     case M32R_OPERAND_DISP16 :
       {
         long value = fields->f_disp16;
-        value = ((int) (((value) - (pc))) >> (2));
+        value = ((SI) (((value) - (pc))) >> (2));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 16, 32, total_length, buffer);
       }
       break;
     case M32R_OPERAND_DISP24 :
       {
         long value = fields->f_disp24;
-        value = ((int) (((value) - (pc))) >> (2));
+        value = ((SI) (((value) - (pc))) >> (2));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 24, 32, total_length, buffer);
       }
       break;
     case M32R_OPERAND_DISP8 :
       {
         long value = fields->f_disp8;
-        value = ((int) (((value) - (((pc) & (-4))))) >> (2));
+        value = ((SI) (((value) - (((pc) & (-4))))) >> (2));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, buffer);
       }
       break;