* cpu/mep.opc (mep_cgen_insn_supported_asm): Change the test to a

[thirdparty/binutils-gdb.git] / opcodes / mep-opc.c

diff --git a/opcodes/mep-opc.c b/opcodes/mep-opc.c
index 0191a603b374f3d4ea8b9f5f8772fc9000a2f390..88576330f4ca121233f29193fe5ead36cdd3434a 100644 (file)
--- a/opcodes/mep-opc.c
+++ b/opcodes/mep-opc.c
@@ -167,7 +167,7 @@ mep_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn)
 int
 mep_cgen_insn_supported_asm (CGEN_CPU_DESC cd, const CGEN_INSN *insn)
 {
-#ifdef ISA_EXT_COP1_64
+#ifdef MEP_IVC2_SUPPORTED
   /* If we're assembling VLIW packets, ignore the 12-bit BSR as we
      can't relax that.  The 24-bit BSR is matched instead.  */
   if (insn->base->num == MEP_INSN_BSR12