+2021-05-17 Mike Frysinger <vapier@gentoo.org>
+
+ * sim-main.h (SIM_HAVE_COMMON_SIM_STATE): Define.
+ (struct sim_state): Delete.
+
+2021-05-16 Mike Frysinger <vapier@gentoo.org>
+
+ * cpustate.c: Include defs.h.
+ * interp.c: Replace config.h include with defs.h.
+ * memory.c, simulator.c: Likewise.
+ * cpustate.h, simulator.h: Delete config.h include.
+
+2021-05-16 Mike Frysinger <vapier@gentoo.org>
+
+ * config.in, configure: Regenerate.
+
+2021-05-14 Mike Frysinger <vapier@gentoo.org>
+
+ * cpustate.h: Update include path.
+ * interp.c: Likewise.
+
+2021-05-04 Mike Frysinger <vapier@gentoo.org>
+
+ * configure: Regenerate.
+
+2021-05-01 Mike Frysinger <vapier@gentoo.org>
+
+ * config.in, configure: Regenerate.
+
+2021-05-01 Mike Frysinger <vapier@gentoo.org>
+
+ * cpustate.c (aarch64_set_FP_float): Change lx to PRIx64.
+ (aarch64_set_FP_double, aarch64_set_FP_long_double,
+ aarch64_set_vec_u64, aarch64_set_vec_s64): Likewise.
+
+2021-05-01 Mike Frysinger <vapier@gentoo.org>
+
+ * simulator.c (do_fcvtzu): Change UL to ULL.
+
+2021-04-26 Mike Frysinger <vapier@gentoo.org>
+
+ * aclocal.m4, config.in, configure: Regenerate.
+
+2021-04-22 Tom Tromey <tom@tromey.com>
+
+ * configure, config.in: Rebuild.
+
+2021-04-22 Tom Tromey <tom@tromey.com>
+
+ * configure: Rebuild.
+
+2021-04-21 Mike Frysinger <vapier@gentoo.org>
+
+ * aclocal.m4: Regenerate.
+
+2021-04-21 Simon Marchi <simon.marchi@polymtl.ca>
+
+ * configure: Regenerate.
+
+2021-04-18 Mike Frysinger <vapier@gentoo.org>
+
+ * configure: Regenerate.
+
+2021-04-12 Mike Frysinger <vapier@gentoo.org>
+
+ * interp.c (sim_open): Delete 3rd arg to sim_cpu_alloc_all.
+
+2021-04-07 Jim Wilson <jimw@sifive.com>
+
+ PR sim/27483
+ * simulator.c (set_flags_for_add32): Compare uresult against
+ itself. Compare sresult against itself.
+
+2021-04-02 Mike Frysinger <vapier@gentoo.org>
+
+ * aclocal.m4, configure: Regenerate.
+
+2021-02-28 Mike Frysinger <vapier@gentoo.org>
+
+ * configure: Regenerate.
+
+2021-02-21 Mike Frysinger <vapier@gentoo.org>
+
+ * configure.ac (AC_CONFIG_MACRO_DIRS): Replace common with m4.
+ * aclocal.m4, configure: Regenerate.
+
+2021-02-13 Mike Frysinger <vapier@gentoo.org>
+
+ * configure.ac: Replace sinclude with AC_CONFIG_MACRO_DIRS.
+ * aclocal.m4, configure: Regenerate.
+
+2021-02-06 Mike Frysinger <vapier@gentoo.org>
+
+ * configure: Regenerate.
+
+2021-01-11 Mike Frysinger <vapier@gentoo.org>
+
+ * config.in, configure: Regenerate.
+
+2021-01-09 Mike Frysinger <vapier@gentoo.org>
+
+ * configure: Regenerate.
+
+2021-01-08 Mike Frysinger <vapier@gentoo.org>
+
+ * configure: Regenerate.
+
+2021-01-04 Mike Frysinger <vapier@gentoo.org>
+
+ * configure: Regenerate.
+
+2020-02-06 Carlo Bramini <carlo_bramini@users.sourceforge.net>
+
+ PR sim/25318
+ * simulator.c (blr): Read destination register before calling
+ aarch64_save_LR.
+
+2019-03-28 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * cpustate.c: Add 'libiberty.h' include.
+ * interp.c: Add 'sim-assert.h' include.
+
+2017-09-06 John Baldwin <jhb@FreeBSD.org>
+
+ * configure: Regenerate.
+
+2017-04-22 Jim Wilson <jim.wilson@linaro.org>
+
+ * simulator.c (vec_load): Add M argument. Rewrite to iterate over
+ registers based on structure size.
+ (LD4, LD3, LD2, LD1_2, LD1_3, LD1_4): Pass new arg to vec_load.
+ (LD1_1): Replace with call to vec_load.
+ (vec_store): Add new M argument. Rewrite to iterate over registers
+ based on structure size.
+ (ST4, ST3, ST2, ST1_2, ST1_3, ST1_4): Pass new arg to vec_store.
+ (ST1_1): Replace with call to vec_store.
+
2017-04-08 Jim Wilson <jim.wilson@linaro.org>
* simulator.c (do_vec_FCVTL): New.