sim: trace: add a basic cpu register class

[thirdparty/binutils-gdb.git] / sim / common / ChangeLog

diff --git a/sim/common/ChangeLog b/sim/common/ChangeLog
index 63978bf64100261a63a9f5aeb6fbed5784985eab..7a224bc02d3b7c4952b65966c4ee546303b4a16e 100644 (file)
--- a/sim/common/ChangeLog
+++ b/sim/common/ChangeLog
@@ -1,3 +1,13 @@
+2015-06-24  Mike Frysinger  <vapier@gentoo.org>
+
+       * sim-trace.c (OPTION_TRACE_REGISTER): New enum.
+       (trace_options): Add trace-register option.
+       (trace_option_handler): Handle OPTION_TRACE_REGISTER case.
+       (trace_idx_to_str): Handle TRACE_REGISTER_IDX case and re-indent.
+       * sim-trace.h (TRACE_REGISTER_IDX): New enum.
+       (TRACE_register, WITH_TRACE_REGISTER_P, STRACE_REGISTER_P,
+       TRACE_REGISTER_P, TRACE_REGISTER): Define.
+
 2015-06-24  Mike Frysinger  <vapier@gentoo.org>
 
        * sim-trace.h (STRACE, STRACE_INSN, STRACE_DECODE, STRACE_EXTRACT,