+Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+2000-05-22 Alexandre Oliva <aoliva@cygnus.com>
+
+ * am33.igen: Fix leading comments of SP-relative offset insns that
+ referred to other registers. Make their offsets unsigned.
+
+2000-05-18 Alexandre Oliva <aoliva@cygnus.com>
+
+ * mn10300_sim.h (genericAdd, genericSub, genericCmp, genericOr,
+ genericXor, genericBtst): Use `unsigned32'.
+ * op_utils.c: Likewise.
+ * mn10300.igen, am33.igen: Use `unsigned32', `signed32',
+ `unsigned64' or `signed64' where type width is relevant.
+
+2000-04-25 Alexandre Oliva <aoliva@cygnus.com>
+
+ * am33.igen (inc4 Rn): Use genericAdd so as to modify flags.
+
+2000-04-09 Alexandre Oliva <aoliva@cygnus.com>
+
+ * am33.igen: Make SP-relative offsets unsigned. Add `*am33' for
+ some instructions that were missing it.
+
+2000-03-03 Alexandre Oliva <oliva@lsd.ic.unicamp.br>
+
+ * Makefile.in (IGEN_INSN): Added am33.igen.
+
+Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Tue Jul 13 13:26:20 1999 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * interp.c: Clarify error message reporting an unknown board.
+
+1999-05-08 Felix Lee <flee@cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+1999-04-16 Frank Ch. Eigler <fche@cygnus.com>
+
+ * interp.c (program_interrupt): Detect undesired recursion using
+ static flag. Set NMIRC register's SYSEF flag during
+ --board=stdeval1 mode.
+ * dv-mn103-int.c (write_icr): Add backdoor address to allow CPU to
+ set SYSEF flag.
+
+1999-04-02 Keith Seitz <keiths@cygnus.com>
+
+ * Makefile.in (SIM_EXTRA_CFLAGS): Define a POLL_QUIT_INTERVAL
+ for use in the simulator so that the poll_quit callback is
+ not called too often.
+
+Tue Mar 9 21:26:41 1999 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * dv-mn103int.c (mn103int_ioctl): Return something.
+ * dv-mn103tim.c (write_tm6md): GCC suggested parentheses around &&
+ within ||.
+
+Tue Feb 16 23:57:17 1999 Jeffrey A Law (law@cygnus.com)
+
+ * mn10300.igen (retf): Fix return address computation and store
+ the new pc value into nia.
+
+1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
+
+ * Makefile.in (WITH_COMMON_OBJS): Build also dv-sockser.o.
+ * interp.c (sim_open): Add stub mn103002 cache control memory regions.
+ Set OPERATING_ENVIRONMENT on "stdeval1" board.
+ (mn10300_core_signal): New function to intercept memory errors.
+ (program_interrupt): New function to dispatch to exception vector
+ (mn10300_exception_*): New functions to snapshot pre/post exception
+ state.
+ * sim-main.h (SIM_CORE_SIGNAL): Define hook - call mn10300_core_signal.
+ (SIM_ENGINE_HALT_HOOK): Do nothing.
+ (SIM_CPU_EXCEPTION*): Define hooks to call mn10300_cpu_exception*().
+ (_sim_cpu): Add exc_* fields to store register value snapshots.
+ * dv-mn103ser.c (*): Support dv-sockser backend for UART I/O.
+ Various endianness and warning fixes.
+ * mn10300.igen (illegal): Call program_interrupt on error.
+ (break): Call program_interrupt on breakpoint
+
+ Several changes from <janczyn@cygnus.com> and <cagney@cygnus.com>
+ merged in:
+ * dv-mn103int.c (mn103int_ioctl): New function for NMI
+ generation. (mn103int_finish): Install it as ioctl handler.
+ * dv-mn103tim.c: Support timer 6 specially. Endianness fixes.
+
+Wed Oct 14 12:11:05 1998 Jeffrey A Law (law@cygnus.com)
+
+ * am33.igen: Allow autoincrement stores using the same register
+ for source and destination operands.
+
+Mon Aug 31 10:19:55 1998 Jeffrey A Law (law@cygnus.com)
+
+ * am33.igen: Reverse HI/LO outputs of 4 operand "mul" and "mulu".
+
+Fri Aug 28 14:40:49 1998 Joyce Janczyn <janczyn@cygnus.com>
+
+ * interp.c (sim_open): Check for invalid --board option, fix
+ indentation, allocate memory for mem control and DMA regs.
+
+Wed Aug 26 09:29:38 1998 Joyce Janczyn <janczyn@cygnus.com>
+
+ * mn10300.igen (div,divu): Fix divide instructions so divide by 0
+ behaves like the hardware.
+
+Mon Aug 24 11:50:09 1998 Joyce Janczyn <janczyn@cygnus.com>
+
+ * sim-main.h (SIM_HANDLES_LMA): Define SIM_HANDLES_LMA.
+
+Wed Aug 12 12:36:07 1998 Jeffrey A Law (law@cygnus.com)
+
+ * am33.igen: Handle case where first DSP operation modifies a
+ register used in the second DSP operation correctly.
+
+Tue Jul 28 10:10:25 1998 Jeffrey A Law (law@cygnus.com)
+
+ * am33.igen: Detect cases where two operands must not match for
+ DSP instructions too.
+
+Mon Jul 27 12:04:17 1998 Jeffrey A Law (law@cygnus.com)
+
+ * am33.igen: Detect cases where two operands must not match in
+ non-DSP instructions.
+
+Fri Jul 24 18:15:21 1998 Joyce Janczyn <janczyn@cygnus.com>
+
+ * op_utils.c (do_syscall): Rewrite to use common/syscall.c.
+ (syscall_read_mem, syscall_write_mem): New functions for syscall
+ callbacks.
+ * mn10300_sim.h: Add prototypes for syscall_read_mem and
+ syscall_write_mem.
+ * mn10300.igen: Change C++ style comments to C style comments.
+ Check for divide by zero in div and divu ops.
+
+Fri Jul 24 12:49:28 1998 Jeffrey A Law (law@cygnus.com)
+
+ * am33.igen (translate_xreg): New function. Use it as needed.
+
+Thu Jul 23 10:05:28 1998 Jeffrey A Law (law@cygnus.com)
+
+ * am33.igen: Add some missing instructions.
+
+ * am33.igen: Autoincrement loads/store fixes.
+
+Tue Jul 21 09:48:14 1998 Jeffrey A Law (law@cygnus.com)
+
+ * am33.igen: Add mov_lCC DSP instructions.
+
+ * am33.igen: Add most am33 DSP instructions.
+
+Thu Jul 9 10:06:55 1998 Jeffrey A Law (law@cygnus.com)
+
+ * mn10300.igen: Fix Z bit for addc and subc instructions.
+ Minor fixes in multiply/divide patterns.
+
+ * am33.igen: Add missing mul[u] imm32,Rn. Fix condition code
+ handling for many instructions. Fix sign extension for some
+ 24bit immediates.
+
+ * am33.igen: Fix Z bit for remaining addc/subc instructions.
+ Do not sign extend immediate for mov imm,XRn.
+ More random mul, mac & div fixes.
+ Remove some unused variables.
+ Sign extend 24bit displacement in memory addresses.
+
+ * am33.igen: Fix Z bit for addc Rm,Rn and subc Rm,Rn. Various
+ fixes to 2 register multiply, divide and mac instructions. Set
+ Z,N correctly for sat16. Sign extend 24 bit immediate for add,
+ and sub instructions.
+
+ * am33.igen: Add remaining non-DSP instructions.
+
+Wed Jul 8 16:29:12 1998 Jeffrey A Law (law@cygnus.com)
+
+ * am33.igen (translate_rreg): New function. Use it as appropriate.
+
+ * am33.igen: More am33 instructions. Fix "div".
+
+Mon Jul 6 15:39:22 1998 Jeffrey A Law (law@cygnus.com)
+
+ * mn10300.igen: Add am33 support.
+
+ * Makefile.in: Use multi-sim to support both a mn10300 and am33
+ simulator.
+
+ * am33.igen: Add many more am33 instructions.
+
+Wed Jul 1 17:07:09 1998 Jeffrey A Law (law@cygnus.com)
+
+ * mn10300_sim.h (FETCH24): Define.
+
+ * mn10300_sim.h: Add defines for some registers found on the AM33.
+ * am33.igen: New file with some am33 support.
+
+Tue Jun 30 11:23:20 1998 Jeffrey A Law (law@cygnus.com)
+
+ * mn10300_sim.h: Include bfd.h
+ (struct state): Add more room for processor specific registers.
+ (REG_E0): Define.
+
+Thu Jun 25 10:12:03 1998 Joyce Janczyn <janczyn@cygnus.com>
+
+ * dv-mn103tim.c: Include sim-assert.h
+ * dv-mn103ser.c (do_polling_event): Check for incoming data on
+ serial line and schedule next polling event.
+ (read_status_reg): schedule events to check for incoming data on
+ serial line and issue interrupt if necessary.
+
+Fri Jun 19 16:47:27 1998 Joyce Janczyn <janczyn@cygnus.com>
+
+ * interp.c (sim_open): hook up serial 1 and 2 ports properly (typo).
+
+Fri Jun 19 11:59:26 1998 Joyce Janczyn <janczyn@cygnus.com>
+
+ * interp.c (board): Rename am32 to stdeval1 as this is the name
+ consistently used to refer to the mn1030002 board.
+
+Thu June 18 14:37:14 1998 Joyce Janczyn <janczyn@cygnus.com>
+ * interp.c (sim_open): Fix typo in address of EXTMD register
+ (0x34000280, not 0x3400280).
+
+Wed Jun 17 18:00:18 1998 Jeffrey A Law (law@cygnus.com)
+
+ * simops.c (syscall): Handle change in opcode # for syscall.
+ * mn10300.igen (syscall): Likewise.
+
+Tue June 16 09:36:21 1998 Joyce Janczyn <janczyn@cygnus.com>
+ * dv-mn103int.c (mn103int_finish): Regular interrupts (not NMI or
+ reset) are not enabled on reset.
+
+Sun June 14 17:04:00 1998 Joyce Janczyn <janczyn@cygnus.com>
+ * dv-mn103iop.c (write_*_reg): Check for attempt to write r/o
+ register bits.
+ * dv-mn103ser.c: Fill in methods for reading and writing to serial
+ device registers.
+ * interp.c (sim_open): Make the serial device a polling device.
+
+Fri June 12 16:24:00 1998 Joyce Janczyn <janczyn@cygnus.com>
+ * dv-mn103iop.c: New file for handling am32 io ports.
+ * configure.in: Add mn103iop to hw_device list.
+ * configure: Re-generate.
+ * interp.c (sim_open): Create io port device.
+
+Wed June 10 14:34:00 1998 Joyce Janczyn <janczyn@cygnus.com>
+ * dv-mn103int.c (external_group): Use enumerated types to access
+ correct group addresses.
+ * dv-mn103tim.c (do_counter_event): Underflow of cascaded timer
+ triggers an interrupt on the higher-numbered timer's port.
+
+Mon June 8 13:30:00 1998 Joyce Janczyn <janczyn@cygnus.com>
+ * interp.c: (mn10300_option_handler): New function parses arguments
+ using sim-options.
+ * (board): Add --board option for specifying am32.
+ * (sim_open): Create new timer and serial devices and control
+ configuration of other am32 devices via board option.
+ * dv-mn103tim.c, dv-mn103ser.c: New files for timers and serial devices.
+ * dv-mn103cpu.c: Fix typos in opening comments.
+ * dv-mn103int.c: Adjust interrupt controller settings for am32 instead of am30.
+ * configure.in: Add mn103tim and mn103ser to hw_device list.
+ * configure: Re-generate.
+
+Mon May 25 20:50:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * dv-mn103int.c, dv-mn103cpu.c: Rename *_callback to *_method.
+
+ * dv-mn103cpu.c, dv-mn103int.c: Include hw-main.h and
+ sim-main.h. Declare a struct hw_descriptor instead of struct
+ hw_device_descriptor.
+
+Mon May 25 17:33:33 1998 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * dv-mn103cpu.c (struct mn103cpu): Change type of pending_handler
+ to struct hw_event.
+
+Fri May 22 12:17:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * configure.in (SIM_AC_OPTION_HARDWARE): Add argument "yes".
+
+Wed May 6 13:29:06 1998 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * interp.c (sim_open): Create a polling PAL device.
+
+Fri May 1 16:39:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * dv-mn103int.c (mn103int_port_event):
+ (mn103int_port_event):
+ (mn103int_io_read_buffer):
+ (mn103int_io_write_buffer):
+
+ * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Drop CPU/CIA args.
+ (mn103cpu_port_event): Ditto.
+ (mn103cpu_io_read_buffer): Ditto.
+ (mn103cpu_io_write_buffer): Ditto.
+
+Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+ * config.in: Ditto.
+
+Sun Apr 26 15:19:55 1998 Tom Tromey <tromey@cygnus.com>
+
+ * acconfig.h: New file.
+ * configure.in: Reverted change of Apr 24; use sinclude again.
+
+Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+ * config.in: Ditto.
+
+Fri Apr 24 11:19:07 1998 Tom Tromey <tromey@cygnus.com>
+
+ * configure.in: Don't call sinclude.
+
+Tue Apr 14 10:03:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * mn10300_sim.h: Declare all functions in op_utils.c using
+ INLINE_SIM_MAIN.
+ * op_utils.c: Ditto.
+ * sim-main.c: New file. Include op_utils.c.
+
+ * mn10300.igen (mov, cmp): Use new igen operators `!' and `=' to
+ differentiate between MOV/CMP immediate/register instructions.
+
+ * configure.in (SIM_AC_OPTION_INLINE): Add and enable.
+ * configure: Regenerate.
+
+Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * interp.c (hw): Delete variable, moved to SIM_DESC.
+ (sim_open): Delete calls to hw_tree_create, hw_tree_finish.
+ Handled by sim-module.
+ (sim_open): Do not anotate tree with trace properties, handled by
+ sim-hw.c
+ (sim_open): Call sim_hw_parse instead of hw_tree_parse.
+
+ * configure: Regenerated to track ../common/aclocal.m4 changes.
+
+Thu Mar 26 20:46:18 1998 Stu Grossman <grossman@bhuna.cygnus.co.uk>
+
+ * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Save the entire PC
+ on the stack when delivering interrupts (not just the lower
+ half)...
+ * mn10300.igen (mov (Di,Am),Dn): Fix decode. Registers were
+ specified in the wrong order.
+
+Fri Mar 27 00:56:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Stop loss of
+ succeeding interrupts, clear pending_handler when the handler
+ isn't re-scheduled.
+
+Thu Mar 26 10:11:01 1998 Stu Grossman <grossman@bhuna.cygnus.co.uk>
+
+ * Makefile.in (tmp-igen): Prefix all usage of move-if-change
+ script with $(SHELL) to make NT native builds happy.
+ * configure: Regenerate because of change to ../common/aclocal.m4.
+
+Thu Mar 26 11:22:31 1998 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * configure.in: Make --enable-sim-common the default.
+ * configure: Re-generate.
+
+ * sim-main.h (CIA_GET, CIA_SET): Save/restore current instruction
+ address into Sate.regs[REG_PC] instead of common struct.
+
+Wed Mar 25 17:42:00 1998 Joyce Janczyn <janczyn@cygnus.com>
+
+ * mn10300.igen (cmp imm8,An): Do not sign extend imm8 value.
+
+Wed Mar 25 12:08:00 1998 Joyce Janczyn <janczyn@cygnus.com>
+
+ * simops.c (OP_F0FD): Initialise variable 'sp'.
+
+Thu Mar 26 00:21:32 1998 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * dv-mn103int.c (decode_group): A group register every 4 bytes not
+ 8.
+ (write_icr): Rewrite equation updating request field.
+ (read_iagr): Fix check that interrupt is still pending.
+
Wed Mar 25 16:14:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
* interp.c (sim_open): Tidy up device creation.