5 days ago |
Jan Beulich | x86: reduce check_{byte,word,long,qword}_reg() overhead |
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7 days ago |
Jan Beulich | x86/Intel: warn about undue mnemonic suffixes |
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7 days ago |
Jan Beulich | x86/Intel: SHLD/SHRD have dual meaning |
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12 days ago |
Jan Beulich | x86: simplify VexVVVV_SRC2 handling for the XOP case |
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12 days ago |
Jan Beulich | x86: simplify / consolidate check_{word,long,qword... |
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12 days ago |
Jan Beulich | x86: correct VCVT{,U}SI2SD |
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2024-05-22 |
Cui, Lili | Support APX zero-upper |
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2024-05-22 |
Cui, Lili | X86: Remove "i.rex" to eliminate extra conditional... |
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2024-05-22 |
Cui, Lili | Add check for 8-bit old registers in EVEX format |
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2024-05-22 |
Cui, Lili | x86: Split REX/REX2 old registers judgment. |
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2024-05-06 |
Cui, Lili | x86: Drop using extension_opcode to encode vvvv register |
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2024-05-06 |
Cui, Lili | x86: Drop SwapSources |
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2024-05-06 |
Cui, Lili | x86: Use vexvvvv as the switch state to encode the... |
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2024-05-03 |
Jan Beulich | x86/APX: extend SSE2AVX coverage |
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2024-04-22 |
Cui, Lili | x86/APX: Add invalid check for APX EVEX.X4. |
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2024-04-16 |
H.J. Lu | x86: Fix a memory leak in md_assemble |
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2024-04-11 |
H.J. Lu | x86-64: Use long NOPs for Intel Core processors |
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2024-04-07 |
Cui, Lili | Support APX NF |
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2024-04-03 |
Cui, Lili | x86/APX: Remove KEYLOCKER and SHA promotions from EVEX... |
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2024-03-28 |
Jan Beulich | x86/SSE2AVX: move checking |
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2024-03-28 |
Jan Beulich | x86/SSE2AVX: respect prefixes |
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2024-03-22 |
Jan Beulich | x86: fix Solaris testsuite failures |
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2024-03-15 |
Jan Beulich | x86/APX: legacy promoted insns can't access %xmm16... |
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2024-03-11 |
Jan Beulich | x86: KeyLocker insn interaction with -msse-check /... |
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2024-03-11 |
Jan Beulich | x86/APX: permit wider than 4-bit immediates with V... |
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2024-03-11 |
Jan Beulich | x86: don't open-code REG_{SP,FP} |
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2024-03-08 |
H.J. Lu | gas: Fix x86 build with GCC 6.4 |
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2024-03-01 |
Jan Beulich | x86: adjust which Dwarf2 register numbers to use |
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2024-03-01 |
Jan Beulich | x86/APX: honor -mevexwig= for byte-size insns |
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2024-03-01 |
Jan Beulich | x86/APX: optimize certain XOR and SUB forms |
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2024-03-01 |
Jan Beulich | x86/APX: correct .insn opcode space determination when... |
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2024-03-01 |
Jan Beulich | x86/APX: respect {vex}/{vex3} |
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2024-02-23 |
Jan Beulich | x86: rename vec_encoding and vex_encoding_* |
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2024-02-21 |
Alan Modra | Leak in i386_elf_section_change_hook |
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2024-02-15 |
H.J. Lu | x86: Display -msse-check= default as none |
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2024-02-09 |
Jan Beulich | x86: change type of Dwarf2 register numbers in register... |
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2024-02-08 |
H.J. Lu | x86-64: Add R_X86_64_CODE_6_GOTTPOFF |
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2024-02-07 |
Indu Bhagat | gas: x86: ginsn: handle sub-QWORD ALU with imm and... |
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2024-02-06 |
H.J. Lu | x86: Warn .insn instruction with length > 15 bytes |
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2024-02-02 |
H.J. Lu | x86: Disallow instructions with length > 15 bytes |
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2024-02-02 |
Jan Beulich | x86: move Q-suffix-to-REX.W translation logic |
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2024-02-02 |
Jan Beulich | x86: actually implement .noopt |
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2024-02-01 |
Indu Bhagat | gas: x86: ginsn: adjust ginsns for certain lea ops |
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2024-01-26 |
Jan Beulich | x86: make "-msyntax=intel -mnaked-reg" match ".intel_sy... |
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2024-01-26 |
Jan Beulich | x86/APX: optimize MOVBE |
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2024-01-19 |
Jan Beulich | x86/APX: VROUND{P,S}{S,D} can generally be encoded |
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2024-01-19 |
Jan Beulich | x86: support APX forms of U{RD,WR}MSR |
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2024-01-15 |
Indu Bhagat | gas: x86: synthesize CFI for hand-written asm |
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2024-01-15 |
Indu Bhagat | opcodes: gas: x86: define and use Rex2 as attribute... |
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2024-01-12 |
Cui, Lili | x86: Fix indentation and use true/false instead of 1/0 |
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2024-01-09 |
Jan Beulich | x86: add missing APX logic to cpu_flags_match() |
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2024-01-09 |
Jan Beulich | x86: FMA insns aren't eligible to VEX2 encoding |
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2024-01-05 |
Tejas Joshi | Add AMD znver5 processor support |
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2024-01-05 |
Jan Beulich | x86: corrections to CPU attribute/flags splitting |
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2024-01-04 |
Alan Modra | Update year range in copyright notice of binutils files |
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2023-12-28 |
H.J. Lu | x86-64: Add R_X86_64_CODE_4_GOTTPOFF/R_X86_64_CODE_4_GO... |
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2023-12-28 |
H.J. Lu | x86-64: Add R_X86_64_CODE_4_GOTPCRELX |
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2023-12-28 |
Hu, Lin1 | Support APX NDD optimized encoding. |
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2023-12-28 |
Cui, Lili | Support APX pushp/popp |
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2023-12-28 |
Mo, Zewei | Support APX Push2/Pop2 |
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2023-12-28 |
konglin1 | Support APX NDD |
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2023-12-28 |
Cui, Lili | Support APX GPR32 with extend evex prefix |
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2023-12-28 |
Cui, Lili | Support APX GPR32 with rex2 prefix |
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2023-12-22 |
Jan Beulich | x86-64: refuse "high" 8-bit regs with .insn and VEX... |
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2023-12-22 |
Jan Beulich | x86: properly respect rex/{rex} |
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2023-12-19 |
Haochen Jiang | x86: Remove the restriction for size of the mask regist... |
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2023-12-15 |
Jan Beulich | x86: last-insn recording should be per-subsection |
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2023-12-15 |
Jan Beulich | x86: don't needlessly override .bss |
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2023-12-15 |
Jan Beulich | x86: fold assembly dialect attributes |
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2023-12-15 |
Jan Beulich | x86: Intel syntax implies Intel mnemonics |
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2023-12-13 |
Cui, Lili | Clean base_reg and assign correct values to regs for... |
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2023-12-01 |
Jan Beulich | x86: adjust NOP generation after potential non-insn |
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2023-12-01 |
Jan Beulich | x86: i386_cons_align() badly affects diagnostics |
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2023-12-01 |
Jan Beulich | x86: suppress optimization after potential non-insn |
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2023-12-01 |
Jan Beulich | x86: last-insn recording should be per-section |
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2023-11-24 |
Jan Beulich | x86: shrink opcode sets table |
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2023-11-24 |
Jan Beulich | x86: also prefer VEX encoding over EVEX one for VCVTNEP... |
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2023-11-17 |
Jan Beulich | x86: improve a few diagnostics |
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2023-11-17 |
Jan Beulich | x86: don't allow pseudo-prefixes to be overridden by... |
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2023-11-17 |
Jan Beulich | x86: CPU-qualify {disp16} / {disp32} |
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2023-11-17 |
Jan Beulich | x86: use IS_ELF |
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2023-11-17 |
Jan Beulich | x86: conditionally hide object-format-specific functions |
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2023-11-17 |
Jan Beulich | x86: fold conditionals in check_long_reg() |
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2023-11-17 |
Jan Beulich | x86-64: extend expected-size check in check_qword_reg() |
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2023-11-09 |
Jan Beulich | x86: rework UWRMSR operand swapping |
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2023-11-09 |
Jan Beulich | x86: do away with is_evex_encoding() |
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2023-11-09 |
Jan Beulich | x86: split insn templates' CPU field |
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2023-11-09 |
Jan Beulich | x86: Cpu64 handling improvements |
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2023-10-31 |
Hu, Lin1 | Support Intel USER_MSR |
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2023-10-23 |
Jan Beulich | x86: fold a few of the "alternative" NOP patterns |
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2023-10-23 |
Jan Beulich | x86: add a few more NOP patterns |
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2023-10-23 |
Jan Beulich | x86: don't record full i386_cpu_flags in struct i386_tc... |
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2023-10-23 |
Jan Beulich | x86: i686 != PentiumPro |
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2023-10-23 |
Jan Beulich | x86: respect ".arch nonop" when selecting which NOPs... |
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2023-10-23 |
Jan Beulich | x86: don't use operand size override with NOP in 16... |
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2023-10-23 |
Jan Beulich | x86: don't use 32-bit LEA as NOP surrogate in 64-bit... |
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2023-10-23 |
Jan Beulich | x86: i386_generate_nops() may not derive decisions... |
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2023-10-23 |
Jan Beulich | x86: record flag_code in tc_frag_data |
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2023-09-27 |
Jan Beulich | x86: prefer VEX encodings over EVEX ones when possible |
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2023-09-27 |
Jan Beulich | x86: drop cpu_arch_tune_flags |
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