]> git.ipfire.org Git - thirdparty/binutils-gdb.git/history - opcodes/i386-opc.tbl
s390: Print base register 0 as "0" in disassembly
[thirdparty/binutils-gdb.git] / opcodes / i386-opc.tbl
2024-03-01  Jan Beulichx86/APX: optimize certain XOR and SUB forms
2024-02-23  Jan Beulichx86/APX: INV{EPT,PCID,VPID} are WIG
2024-02-16  Jan Beulichx86/APX: drop stray IgnoreSize
2024-02-16  Jan Beulichx86: don't use VexWIG in SSE2AVX templates
2024-02-16  Jan Beulichx86: drop redundant Xmmword
2024-02-09  Jan Beulichx86/APX: V{BROADCAST,EXTRACT,INSERT}{F,I}128 can also...
2024-02-09  Jan Beulichx86/APX: VROUND{P,S}{S,D} encodings require AVX512...
2024-01-26  Jan Beulichx86/APX: optimize MOVBE
2024-01-19  Jan Beulichx86/APX: VROUND{P,S}{S,D} can generally be encoded
2024-01-19  Jan Beulichx86: drop redundant EVex128 from PUSH2/POP2
2024-01-19  Jan Beulichx86: support APX forms of U{RD,WR}MSR
2024-01-15  Indu Bhagatopcodes: x86: new marker for insns that implicitly...
2024-01-15  Indu Bhagatopcodes: gas: x86: define and use Rex2 as attribute...
2024-01-09  Jan Beulichx86: add missing APX logic to cpu_flags_match()
2024-01-04  Alan ModraUpdate year range in copyright notice of binutils files
2023-12-28  Cui, LiliSupport APX pushp/popp
2023-12-28  Mo, ZeweiSupport APX Push2/Pop2
2023-12-28  konglin1Support APX NDD
2023-12-28  Cui, LiliSupport APX GPR32 with extend evex prefix
2023-12-28  Cui, LiliSupport APX GPR32 with rex2 prefix
2023-12-19  Haochen Jiangx86: Remove the restriction for size of the mask regist...
2023-12-15  Jan Beulichrevert "x86: allow 32-bit reg to be used with U{RD...
2023-12-15  Jan Beulichx86: fold assembly dialect attributes
2023-12-15  Jan Beulichx86: Intel syntax implies Intel mnemonics
2023-12-14  Cui, LiliRemove redundant Byte, Word, Dword and Qword from insn...
2023-12-01  Jan Beulichx86: allow 32-bit reg to be used with U{RD,WR}MSR
2023-11-24  Jan Beulichx86: also prefer VEX encoding over EVEX one for VCVTNEP...
2023-11-17  Jan Beulichx86: CPU-qualify {disp16} / {disp32}
2023-11-09  Jan Beulichx86: rework UWRMSR operand swapping
2023-11-09  Jan Beulichx86: split insn templates' CPU field
2023-11-09  Jan Beulichx86: Cpu64 handling improvements
2023-10-31  Hu, Lin1Support Intel USER_MSR
2023-09-27  Jan Beulichx86: fold FMA VEX and EVEX templates
2023-09-27  Jan Beulichx86: fold VAES/VPCLMULQDQ VEX and EVEX templates
2023-09-27  Jan Beulichx86: fold certain VEX and EVEX templates
2023-09-14  Jan Beulichx86: Vxy naming correction
2023-09-14  Jan Beulichx86: support AVX10.1 vector size restrictions
2023-09-14  Jan Beulichx86: make AES/PCMULQDQ respectively prereqs of VAES...
2023-09-01  Jan Beulichx86: rename CpuPCLMUL
2023-09-01  Jan Beulichx86: drop Size64 from VMOVQ
2023-08-02  Sam JamesRevert "2.41 Release sources"
2023-08-02  Nick Clifton2.41 Release sources binutils-2_41-release
2023-07-27  Hu, Lin1Support Intel PBNDKB
2023-07-27  Haochen JiangSupport Intel SM4
2023-07-27  Haochen JiangSupport Intel SM3
2023-07-27  Haochen JiangSupport Intel SHA512
2023-07-27  konglin1Support Intel AVX-VNNI-INT16
2023-07-04  Jan Beulichx86: optimize 128-bit VPBROADCASTQ to VPUNPCKLQDQ
2023-07-04  Jan Beulichx86: optimize pre-AVX512 {,V}PCMPGT* with identical...
2023-07-04  Jan Beulichx86: optimize pre-AVX512 {,V}PCMPEQQ with identical...
2023-06-16  Jan Beulichx86: shrink Masking insn attribute to a single bit...
2023-05-23  Zhang, JunSupport Intel FRED LKGS
2023-05-23  liuhongtRevert "Support Intel FRED LKGS"
2023-05-23  Zhang, JunSupport Intel FRED LKGS
2023-04-07  Haochen JiangSupport Intel AMX-COMPLEX
2023-03-20  Jan Beulichx86: drop "shimm" special case template expansions
2023-03-20  Jan Beulichx86: VexVVVV is now merely a boolean
2023-03-20  Jan Beulichx86: re-work build_modrm_byte()'s register assignment
2023-02-24  Jan Beulichx86: MONITOR/MWAIT are not SSE3 insns
2023-02-24  Jan Beulichx86-64: don't permit LAHF/SAHF with "generic64"
2023-02-24  Jan Beulichx86: have insns acting on segment selector values allow...
2023-02-24  Jan Beulichx86: restrict insn templates accepting negative 8-bit...
2023-02-22  Jan Beulichx86-64: LAR and LSL don't need REX.W
2023-02-22  Jan Beulichx86: optimize BT{,C,R,S} $imm,%reg
2023-02-14  Jan Beulichx86: {LD,ST}TILECFG use an extension opcode
2023-02-13  Michael MatzPR30120: fix x87 fucomp misassembled
2023-02-10  Jan Beulichx86: drop use of VEX3SOURCES
2023-02-10  Jan Beulichx86: drop use of XOP2SOURCES
2023-02-10  Jan Beulichx86: limit use of XOP2SOURCES
2023-01-27  Jan Beulichx86: use ModR/M for FPU insns with operands
2023-01-01  Alan ModraUpdate year range in copyright notice of binutils files
2022-12-21  Jan Beulichx86: rename CheckRegSize to CheckOperandSize
2022-12-19  Jan Beulichx86: omit Cpu prefixes from opcode table
2022-12-16  Jan Beulichx86: change representation of extension opcode
2022-12-12  Jan Beulichx86: further re-work insn/suffix recognition to also...
2022-12-12  Jan Beulichx86: drop (now) stray IsString
2022-12-12  Jan Beulichx86: re-work insn/suffix recognition
2022-12-03  H.J. Lux86: Allow 16-bit register source for LAR and LSL
2022-12-02  Jan Beulichx86: also use D for XCHG and TEST
2022-12-01  Jan Beulichx86: drop No_ldSuf
2022-12-01  Jan Beulichx86/Intel: drop LONG_DOUBLE_MNEM_SUFFIX
2022-12-01  Jan Beulichx86/Intel: restrict use of LONG_DOUBLE_MNEM_SUFFIX
2022-11-30  Jan Beulichx86: clean up after removal of support for gcc <= 2.8.1
2022-11-30  Jan Beulichx86: drop FloatR
2022-11-24  Jan Beulichx86: widen applicability and use of CheckRegSize
2022-11-24  Jan Beulichx86: add missing CheckRegSize
2022-11-24  Jan Beulichx86: correct handling of LAR and LSL
2022-11-17  H.J. Luopcodes: Define NoSuf in i386-opc.tbl
2022-11-15  Tejas JoshiAdd AMD znver4 processor support
2022-11-14  Jan Beulichx86: fold special-operand insn attributes into a single...
2022-11-11  Jan Beulichx86: drop stray IsString from PadLock insns
2022-11-08  Kong LinglingSupport Intel RAO-INT
2022-11-04  konglin1Support Intel AVX-NE-CONVERT
2022-11-04  konglin1i386: Rename <xy> template.
2022-11-02  Jan Beulichx86: drop bogus Tbyte
2022-11-02  Hu, Lin1Support Intel MSRLIST
2022-11-02  Hu, Lin1Support Intel WRMSRNS
2022-11-02  Haochen JiangSupport Intel CMPccXADD
2022-11-02  Cui,LiliSupport Intel AVX-VNNI-INT8
2022-11-02  Hongyu WangSupport Intel AVX-IFMA
next