Stefan Agner [Fri, 10 Mar 2017 01:17:55 +0000 (17:17 -0800)]
colibri_imx7: split and resize firmware MTD partition
Use two separate partitions for the two firmware instances. Also
resize them to be of the same size which also makes the start of
the UBI partition nicely aligned to 0x400000.
In order to detect the new MTD layout and whether we run a U-Boot
with the new BCB format or not, introduce a variable called
"updlevel" which we can use in update/upgrade scripts.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
Stefan Agner [Fri, 10 Mar 2017 01:17:52 +0000 (17:17 -0800)]
colibri_imx7: implement board level USB PHY mode
Implement board level USB PHY mode callback. On USB OTG Port 1
the Colibri standard foresees GPIO USBC_DET to decide whether the
port should run in Host or Device mode.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Limit memory used for relocation of FDT or initrd. This is
required to make sure that relocated artifacts are within lowmem.
If fdt_high or initrd_high are not set, U-Boot automatically
relocates artifacts to the end of memory. But this area won't
be part of lowmem and hence will not be accessible by the kernel
during early boot.
With VM split set to 2G/2G (i.MX default), only the 2GB Apalis
iMX6 is affected by that issue. With VM split set to 3G/1G (ARM
default) also modules with 1GB of memory are affected. With the
latter the amount of lowmem will be 760MiB.
The value must also not exceed available memory! Use a safe value
of 512MiB for Apalis and 256MiB for Colibri.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Stefan Agner [Fri, 10 Mar 2017 01:17:49 +0000 (17:17 -0800)]
toradex apalis/colibri: use common USB product id fallback
All modules use the common g_dnl_bind_fixup implementaton which
calculates the PID according to product id (read from the config
block) plus offset of 0x4000. In case there is no config block
support (e.g. SPL) or in case the config block is not readable,
fall back to a generic product id (product id 0, which can be
interpreted as "Unknown Module").
Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
That's because usb_setup_ehci_gadget() function is looking for the usb
device using the req_sed number.
This change makes the usb device have a req_seq number and the UMS
command work again:
CPU: Freescale i.MX6UL rev1.0 528 MHz (running at 396 MHz)
CPU: Industrial temperature grade (-40C to 105C) at 40C
Reset cause: POR
Model: Armadeus Systems OPOS6UL SoM on OPOS6ULDev board
DRAM: 256 MiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
Video: 800x480x18
In: serial
Out: serial
Err: serial
Net: FEC [PRIME]
Hit any key to stop autoboot: 0
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Markus Niebel [Tue, 28 Feb 2017 15:37:32 +0000 (16:37 +0100)]
arm: imx6: tqma6: use CONFIG_TQM6x for SOM specific settings
We have a Kconfig name for the module types. Let's Use it.
Some feature selections and configurations are based on the
module. Module selection selects the CPU type.
Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
Jagan Teki [Fri, 24 Feb 2017 10:15:26 +0000 (15:45 +0530)]
i.MX6Q: isiot: Switch the mmc env based on devno
Add board_mmc_get_env_dev
Switch the mmc env based on the mmc devno, instead of separately
defining a config item in include/configs using board_mmc_get_env_dev
- devno 0: sd/esd
- devno 1: mmc/emmc
Cc: Stefano Babic <sbabic@denx.de> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Fri, 24 Feb 2017 10:15:25 +0000 (15:45 +0530)]
i.MX6Q: icorem6_rqs: Add mmc_late_init
Let the runtime code can set the mmcdev and mmcroot based
on the devno using mmc_get_env_dev instead of defining
separately in build-time configs using mmc_late_init func.
Cc: Stefano Babic <sbabic@denx.de> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Fri, 24 Feb 2017 10:15:24 +0000 (15:45 +0530)]
i.MX6Q: icorem6_rqs: Add modeboot env via board_late_init
Add runtime, modeboot env which is setting mmcboot based
on the bootdevice so-that conditional macros for MMC via
CONFIG_BOOTCOMMAND should be avoided in config files.
Cc: Stefano Babic <sbabic@denx.de> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
CPU: Freescale i.MX6D rev1.2 at 792 MHz
Reset cause: POR
Model: Engicam i.CoreM6 Quad/Dual RQS Starter Kit
DRAM: 512 MiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
switch to partitions #0, OK
mmc1(part 0) is current device
Net: No ethernet found.
Hit any key to stop autoboot: 0
Booting from mmc ...
switch to partitions #0, OK
mmc1(part 0) is current device
Cc: Stefano Babic <sbabic@denx.de> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Markus Niebel [Fri, 3 Feb 2017 15:25:00 +0000 (16:25 +0100)]
imx6: tqma6: disable spi CS unused in U-Boot
Since the CS are not in use, do not map them. User of starterkit
mainboard is free to use them otherwise. When using these pins later
in the OS for instance as GPIO IRQ pin, they need to be input.
Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
Jagan Teki [Fri, 24 Feb 2017 10:15:22 +0000 (15:45 +0530)]
imx6: icorem6_rqs: Update SPL board boot order for eMMC
SPL mmc device index is get based on the boot device, like
- BOOT_DEVICE_MMC1 for mmc device 0
- BOOT_DEVICE_MMC2 for mmc device 1
Currently BOOT_DEVICE_MMC1 is setting both SD/eSD and MMC/eMMC
boot devices in i.MX, So u-boot is loading from mmc device 0 even
"if the board booting from SD/eSD or MMC/eMMC"
So, this patch set BOOT_DEVICE_MMC2 for MMC/eMMC so for MMC/eMMC
the u-boot is loading from mmc device 1 and the board file need to
take care if the board have different mmc device order intialization.
Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed by: Stefano Babic <sbabic@denx.de> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Fri, 24 Feb 2017 10:15:20 +0000 (15:45 +0530)]
i.MX6UL: isiot: Switch the mmc env based on devno
Add board_mmc_get_env_dev
Switch the mmc env based on the mmc devno, instead of separately
defining a config item in include/configs using board_mmc_get_env_dev
- devno 0: sd/esd
- devno 1: mmc/emmc
Cc: Stefano Babic <sbabic@denx.de> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Fri, 24 Feb 2017 10:15:19 +0000 (15:45 +0530)]
i.MX6UL: isiot: Add mmc_late_init
Let the runtime code can set the mmcdev and mmcroot based
on the devno using mmc_get_env_dev instead of defining
separately in build-time configs using mmc_late_init func.
Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed by: Stefano Babic <sbabic@denx.de> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Fri, 24 Feb 2017 10:15:18 +0000 (15:45 +0530)]
i.MX6UL: isiot: Add modeboot env via board_late_init
Add runtime, modeboot env which is setting mmcboot, or
nandboot based on the bootdevice so-that conditional
macros b/w MMC and NAND for CONFIG_BOOTCOMMAND should
be avoided in config files.
Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed by: Stefano Babic <sbabic@denx.de> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Fri, 24 Feb 2017 10:15:16 +0000 (15:45 +0530)]
imx6: isiotmx6ul: Update SPL board boot order for eMMC
SPL mmc device index is get based on the boot device, like
- BOOT_DEVICE_MMC1 for mmc device 0
- BOOT_DEVICE_MMC2 for mmc device 1
Currently BOOT_DEVICE_MMC1 is setting both SD/eSD and MMC/eMMC
boot devices in i.MX, So u-boot is loading from mmc device 0 even
"if the board booting from SD/eSD or MMC/eMMC"
So, this patch set BOOT_DEVICE_MMC2 for MMC/eMMC so for MMC/eMMC
the u-boot is loading from mmc device 1 and the board file need to
take care if the board have different mmc device order intialization.
Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed by: Stefano Babic <sbabic@denx.de> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Fri, 24 Feb 2017 10:15:13 +0000 (15:45 +0530)]
imx: spl: Update NAND bootmode detection bit
BOOT_CFG1[7:4] the NAND boot mode selection is done
only when BOOT_CFG1[7] is 1 hence update the NAND
boot mode detection bit case. This information available
on Table 8-11. NAND Boot eFUSE Descriptions, from IMX6DQRM.
Cc: Tim Harvey <tharvey@gateworks.com>
Reviewed by: Stefano Babic <sbabic@denx.de> Signed-off-by: Jagan Teki <jagan@openedev.com>
Jagan Teki [Fri, 24 Feb 2017 10:15:12 +0000 (15:45 +0530)]
imx6: Add imx6_src_get_boot_mode
For i.MX6, the bootmode determine code is part of spl_boot_device,
but there is might be a possibility for other part the code need to
check the desired boot mode for adding new functionalities like
modeboot env variable, or changing boot order etc.
So introduced imx6_src_get_boot_mode which actually reading the
boot mode register for desired modes.
More cleanup will be add in future patches.
Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
Jagan Teki [Fri, 24 Feb 2017 10:02:53 +0000 (15:32 +0530)]
configs: imx6: Don't define USDHC2_BASE_ADDR
USDHC base address will assigned by SPL using fsl_esdhc_initialize
and u-boot with devicetree, hence no remove base address assignment
in config files.
Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Peng Fan [Wed, 22 Feb 2017 08:21:52 +0000 (16:21 +0800)]
serial: lpuart: add i.MX7ULP support
Add i.MX7ULP support.
The buadrate calculation on i.MX7ULP is different,so add a new setbrg
function for i.MX7ULP.
Add a enum lpuart_devtype for runtime check for different platforms.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Cc: York Sun <york.sun@nxp.com> Cc: Shaohui Xie <Shaohui.Xie@nxp.com> Cc: Alison Wang <b18965@freescale.com>
Peng Fan [Wed, 22 Feb 2017 08:21:51 +0000 (16:21 +0800)]
serial: lpuart: restructure lpuart driver
Drop CONFIG_LPUART_32B_REG.
Move the register structure to a common file include/fsl_lpuart.h
Define lpuart_serial_platdata structure which includes the reg base and flags.
For 32Bit register access, use lpuart_read32/lpuart_write32 which handles
big/little endian.
For 8Bit register access, still use the orignal code.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de> Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Cc: York Sun <york.sun@nxp.com> Cc: Shaohui Xie <Shaohui.Xie@nxp.com> Cc: Alison Wang <b18965@freescale.com>
Ye Li [Wed, 22 Feb 2017 08:21:47 +0000 (16:21 +0800)]
mx7ulp: Add iomux pins header file
Add the iomux pins header file from iomux tool team. Change the IOMUXC0 pins
to add IOMUX_CONFIG_MPORTS flags.
Note: The IOMUXC0 offset provided in this file is from 0xD000, this is not
aligned with IOMUXC0 base address. We have adjusted the IOMUXC0 base address
to aligin with it.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
Peng Fan [Wed, 22 Feb 2017 08:21:46 +0000 (16:21 +0800)]
mxc_ocotp: Update driver to support OCOTP controller on i.MX7ULP
Update the mxc_ocotp driver to support i.MX7ULP.
The read/write sequence has some changes due to
PDN and OUT_STATUS registers added and TIME register is
removed. Also update the bank size and number.
Add is_mx7ulp macro in sys_proto.h
Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>
Peng Fan [Wed, 22 Feb 2017 08:21:45 +0000 (16:21 +0800)]
gpio: Add Rapid GPIO2P driver for i.MX7ULP
Add the imx_rgpio2p driver for Rapid GPIO2P controllers on i.MX7ULP.
Have added all ports on RGPIO2P_0 and RGPIO2P_1.
The configurations CONFIG_IMX_RGPIO2P and CONFIG_DM_GPIO must be set
to y to enable the drivers.
To use the GPIO function, the IBE and OBE needs to set in IOMUXC.
We did not set the bits in driver, but leave them to IOMUXC settings
of the GPIO pins. User should use IMX_GPIO_NR to generate the GPIO number
for gpio APIs access.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>
Peng Fan [Wed, 22 Feb 2017 08:21:43 +0000 (16:21 +0800)]
imx: mx7ulp: Add soc level initialization codes and functions
Implement soc level functions to get cpu rev, reset cause, enable cache,
etc. We will disable the wdog and init clocks in s_init at very early u-boot
phase.
Since the we are seeking the way to get chip id for mx7ulp, the get_cpu_rev
is hard coded to a fixed value. This may change in future.
Reuse some code in imx-common.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
Peng Fan [Wed, 22 Feb 2017 08:21:42 +0000 (16:21 +0800)]
imx: mx7ulp: Add clock framework and functions
Add a clock framework to support SCG1/PCC2/PCC3 for A7 to support get/set
clock source, divider, clock rate and parent source.
Users need to include pcc.h to use the APIs to for peripherals clock. Each
peripheral clock is defined in enum pcc_clk type.
SCG relevants APIs are defined in scg.h which supports clock rate get, PLL/PFD
enablement and settings, and all SCG clock initialization. User need use enum
scg_clk to access each clock source.
In clock.c, we initialize necessary clocks at u-boot s_init and implement the
clock functions used by driver modules to operate clocks dynamically.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
Peng Fan [Wed, 22 Feb 2017 08:21:41 +0000 (16:21 +0800)]
imx: mx7ulp: add iomux driver to support IOMUXC0 and IOMUXC1
Add a new driver under ULP directory to support its IOMUXC
controllers. The ULP has two IOMUXC, the IOMUXC0 is used
for M4 domain, while IOMUXC1 is for A7. We set IOMUXC1 as
the default IOMUX in this driver. Any pins in IOMUXC0 needs
to configure with IOMUX_CONFIG_MPORTS in its mux_mode field.
Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>
Masahiro Yamada [Thu, 9 Mar 2017 07:28:25 +0000 (16:28 +0900)]
arm64: booti: allow to place kernel image anywhere in physical memory
At first, the ARM64 Linux booting requirement recommended that the
kernel image be placed text_offset bytes from 2MB aligned base near
the start of usable system RAM because memory below that base address
was unusable at that time.
This requirement was relaxed by Linux commit a7f8de168ace ("arm64:
allow kernel Image to be loaded anywhere in physical memory").
Since then, the bit 3 of the flags field indicates the tolerance
of the kernel physical placement. If this bit is set, the 2MB
aligned base may be anywhere in physical memory. For details, see
Documentation/arm64/booting.txt of Linux.
The booti command should be also relaxed. If the bit 3 is set,
images->ep is respected, and the image is placed at the nearest
bootable location. Otherwise, it is relocated to the start of the
system RAM to keep the original behavior.
Another wrinkle we need to take care of is the unknown endianness of
text_offset for a kernel older than commit a2c1d73b94ed (i.e. v3.16).
We can detect this based on the image_size field. If the field is
zero, just use a fixed offset 0x80000.
Masahiro Yamada [Mon, 13 Mar 2017 08:43:16 +0000 (17:43 +0900)]
tools: fix cross-compiling tools when HOSTCC is overridden
Richard reported U-Boot tools issues in OpenEmbedded/Yocto project.
OE needs to be able to change the default compiler. If we pass in
HOSTCC through the make command, it overwrites all HOSTCC instances,
including ones in tools/Makefile and tools/env/Makefile, which breaks
"make cross_tools" and "make env", respectively.
Add "override" directives to avoid overriding HOSTCC instances that
really need to point to the cross-compiler.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reported-by: Richard Purdie <richard.purdie@linuxfoundation.org> Reviewed-by: Simon Glass <sjg@chromium.org>
Ladislav Michl [Sat, 18 Feb 2017 23:24:49 +0000 (00:24 +0100)]
igep00x0: fixup FDT according to detected flash type
Leave only detected flash type enabled in FTD as otherwise GPMC CS is
claimed (and never freed) by Linux, causing 'concurent' flash type
not to be probed.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Ladislav Michl [Sat, 18 Feb 2017 23:23:39 +0000 (00:23 +0100)]
igep00x0: disable environment
ISEE's U-Boot and Linux are using 1bit ECC scheme, while we
switched to 8bit ECC to fullfill flash specification requirements.
However when trying to run U-Boot on board with 1bit ECC'd data
on flash, UBI code takes several minutes to pass scan as reading
of every block ends with ecc error (which is also printed on
console).
So, until proper solution is developed, disable environment
alltogether.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Patrice Chotard [Tue, 21 Feb 2017 12:37:12 +0000 (13:37 +0100)]
board: Add STMicroelectronics STiH410-B2260 support
This is a 96Board compliant board based on STiH410 SoC:
- 1GB DDR
- On-Board USB combo WiFi/Bluetooth RTL8723BU
with PCB soldered antenna
- Ethernet 1000-BaseT
- SATA
- HDMI
- 2 x USB2.0 type A
- 1 x USB2.0 type micro-AB
- SD card slot
- High speed connector (SD/I2C/USB interfaces)
- Low speed connector (UART/I2C/GPIO/SPI/PCM interfaces)
Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Patrice Chotard [Tue, 21 Feb 2017 12:37:09 +0000 (13:37 +0100)]
STiH410: Add STi SDHCI driver
Add SDHCI host controller found on STMicroelectronics SoCs
On some ST SoCs, i.e. STiH407/STiH410, the MMC devices can live
inside a dedicated flashSS sub-system that provides an extend subset
of registers that can be used to configure the Arasan MMC/SD Host
Controller.
This means, that the SDHCI Arasan Controller can be configured to be
eMMC4.5 or 4.3 spec compliant.
W/o these settings the SDHCI will configure and use the MMC/SD
controller with limited features e.g. PIO mode, no DMA, no HS etc.
Patrice Chotard [Tue, 21 Feb 2017 12:37:07 +0000 (13:37 +0100)]
STiH410: Add STi serial driver
This patch adds support to ASC (asynchronous serial controller)
driver, which is basically a standard serial driver. This IP
is common across other STMicroelectronics SoCs
Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Phil Edworthy [Fri, 17 Feb 2017 08:22:17 +0000 (08:22 +0000)]
armv7m: Add SysTick timer driver
The SysTick is a 24-bit down counter that is found on all ARM Cortex
M3, M4, M7 devices and is always located at a fixed address.
The number of reference clock ticks that correspond to 10ms is normally
defined in the SysTick Calibration register's TENMS field. However, on some
devices this is wrong, so this driver allows the clock rate to be defined
using CONFIG_SYS_HZ_CLOCK.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Reviewed-by: Vikas MANOCHA <vikas.manocha@st.com>
Lokesh Vutla [Wed, 15 Feb 2017 13:12:54 +0000 (18:42 +0530)]
tools: omapimage: Fix size in header
The size field in GP header that is expected by ROM is size of the
image + size of the header. But omapimage generates a gp header
only with size of the image as size field. Fix it
arm: omap3: Bring back ARM errata workaround 725233
The workaround for ARM errata 725233 had been lost since
commit 45bf05854bc94e (armv7: adapt omap3 to the new cache
maintenance framework). Bring it back in order to avoid
very difficult to reproduce, but actually encountered in
the wild CPU deadlocks when running software rendered
X11 desktop on OMAP3530 hardware.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Migrate to Kconfig] Signed-off-by: Tom Rini <trini@konsulko.com>
arm: omap3: Compile clock.c with -marm option to unbreak OMAP3530
Boards with OMAP3530 SoC fail to boot since commit bd2c4522c26d5
("ti: armv7: enable EXT support in SPL (using ti_armv7_common.h)")
because it enabled the use of Thumb2 for the SPL.
Experiments have shown that the deadlock happens in the
prcm_init() function from 'arch/arm/mach-omap2/omap3/clock.c'.
This patch enforces the compilation of clock.c source file in
ARM mode and makes the deadlock disappear. We are yet to figure
out the root cause of the problem. Still this is somewhat
better than having non-bootable boards for years.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Masahiro Yamada [Mon, 6 Mar 2017 20:28:25 +0000 (05:28 +0900)]
ARM: uniphier: set DRAM_SPARSE flag for LD21 boards
Commit 04cd4e7215d3 ("ARM: uniphier: remove DRAM base address from
board parameters") accidentally unset the DRAM_SPARSE flag, and
changed the physical map of the DRAM channels. Revive the original
behavior.
Fixes: 04cd4e7215d3 ("ARM: uniphier: remove DRAM base address from board parameters") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reported-by: Shunji Sato <sato.shunji@socionext.com>
arm: omap-common: Fix typo in CONFIG_OMAP54XX guard
Some initialization was unintentionally being skipped on omap5.
Fixes: f5af0827f276 ("arm: omap-common: Guard some parts of the code with CONFIG_OMAP44XX/OMAP54XX") Signed-off-by: Matthijs van Duin <matthijsvanduin@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Ladislav Michl [Mon, 6 Mar 2017 12:54:30 +0000 (13:54 +0100)]
arm: OMAP2+: nandecc: propagate error to command return status
Currently nandecc returns zero even if underlaying
omap_nand_switch_ecc function fails. Fix that by
propagating error returned to command return value.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Reviewed-by: Tom Rini <trini@konsulko.com>
projects / people / ms / u-boot.git / log
