]> git.ipfire.org Git - people/ms/u-boot.git/commitdiff
ARM: dts: uniphier: more re-sync DT with Linux
authorMasahiro Yamada <yamada.masahiro@socionext.com>
Sun, 12 Mar 2017 15:16:41 +0000 (00:16 +0900)
committerMasahiro Yamada <yamada.masahiro@socionext.com>
Mon, 13 Mar 2017 20:52:53 +0000 (05:52 +0900)
For better maintainability.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
arch/arm/dts/uniphier-ld11.dtsi
arch/arm/dts/uniphier-pinctrl.dtsi
arch/arm/dts/uniphier-pro4-ace.dts
arch/arm/dts/uniphier-pro4-sanji.dts
arch/arm/dts/uniphier-pxs2-gentil.dts
arch/arm/dts/uniphier-pxs2.dtsi
arch/arm/dts/uniphier-ref-daughter.dtsi
arch/arm/dts/uniphier-sld3.dtsi

index 848898466964eb94dbd8d47a89e9e28adf1985e6..2843adb01e78f23035b8947e3b1e0e3e29a10273 100644 (file)
                };
 
                mioctrl@5b3e0000 {
-                       compatible = "socionext,uniphier-mioctrl",
+                       compatible = "socionext,uniphier-ld11-mioctrl",
                                     "simple-mfd", "syscon";
                        reg = <0x5b3e0000 0x800>;
 
index 2810f3b3e1cccc5b133595cf3d4b7676d46b7804..9591e888dc353b7decb9354906a96b3525d4ecad 100644 (file)
@@ -1,7 +1,8 @@
 /*
  * Device Tree Source for UniPhier SoCs default pinctrl settings
  *
- * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2015-2017 Socionext Inc.
+ *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  *
  * SPDX-License-Identifier:    GPL-2.0+        X11
  */
index 0183df0fdc32e50a3a54c9fe6f468f7153859859..679e48b5aee25f070b89ffb4e2811b363469c61e 100644 (file)
@@ -54,6 +54,7 @@
        eeprom@54 {
                compatible = "st,24c64", "i2c-eeprom";
                reg = <0x54>;
+               pagesize = <32>;
                u-boot,i2c-offset-len = <2>;
        };
 };
index 11016a4b8d9bd0c309fe872821dfd36d2f7faae0..25e73c68534aecaddc8645d487c5f51c31bdca43 100644 (file)
@@ -49,6 +49,7 @@
        eeprom@54 {
                compatible = "st,24c64", "i2c-eeprom";
                reg = <0x54>;
+               pagesize = <32>;
                u-boot,i2c-offset-len = <2>;
        };
 };
index a26d586c76d1c719f565542ecdc09c8da83330d8..0c0a9cf82120189c0d34093adab4fb54d062c042 100644 (file)
@@ -46,6 +46,7 @@
        eeprom@54 {
                compatible = "st,24c64", "i2c-eeprom";
                reg = <0x54>;
+               pagesize = <32>;
                u-boot,i2c-offset-len = <2>;
        };
 };
index 904320c124afaa2263a92b814088e2d21e929440..b0f6f94ce7da70d58a9885b0455417aafaddc197 100644 (file)
                        compatible = "fixed-clock";
                        clock-frequency = <50000000>;
                };
-
-               i2c_clk: i2c_clk {
-                       #clock-cells = <0>;
-                       compatible = "fixed-clock";
-                       clock-frequency = <50000000>;
-               };
        };
 
        soc {
                        interrupts = <0 41 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_i2c0>;
-                       clocks = <&i2c_clk>;
+                       clocks = <&peri_clk 4>;
                        clock-frequency = <100000>;
                };
 
                        interrupts = <0 42 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_i2c1>;
-                       clocks = <&i2c_clk>;
+                       clocks = <&peri_clk 5>;
                        clock-frequency = <100000>;
                };
 
                        interrupts = <0 43 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_i2c2>;
-                       clocks = <&i2c_clk>;
+                       clocks = <&peri_clk 6>;
                        clock-frequency = <100000>;
                };
 
                        interrupts = <0 44 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_i2c3>;
-                       clocks = <&i2c_clk>;
+                       clocks = <&peri_clk 7>;
                        clock-frequency = <100000>;
                };
 
                        #address-cells = <1>;
                        #size-cells = <0>;
                        interrupts = <0 45 4>;
-                       clocks = <&i2c_clk>;
+                       clocks = <&peri_clk 8>;
                        clock-frequency = <400000>;
                };
 
                        #address-cells = <1>;
                        #size-cells = <0>;
                        interrupts = <0 25 4>;
-                       clocks = <&i2c_clk>;
+                       clocks = <&peri_clk 9>;
                        clock-frequency = <400000>;
                };
 
                        #address-cells = <1>;
                        #size-cells = <0>;
                        interrupts = <0 26 4>;
-                       clocks = <&i2c_clk>;
+                       clocks = <&peri_clk 10>;
                        clock-frequency = <400000>;
                };
 
                sysctrl@61840000 {
                        compatible = "socionext,uniphier-pxs2-sysctrl",
                                     "simple-mfd", "syscon";
-                       reg = <0x61840000 0x4000>;
+                       reg = <0x61840000 0x10000>;
 
                        sys_clk: clock {
                                compatible = "socionext,uniphier-pxs2-clock";
index 6d25104281dd442dd55e9339be9d659095f59f82..9365b8fc48468a0eeaa1c3922e7524eb27f2f2e4 100644 (file)
@@ -1,7 +1,8 @@
 /*
  * Device Tree Source for UniPhier Reference Daughter Board
  *
- * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2015-2017 Socionext Inc.
+ *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  *
  * SPDX-License-Identifier:    GPL-2.0+        X11
  */
@@ -10,6 +11,7 @@
        eeprom@50 {
                compatible = "microchip,24lc128", "i2c-eeprom";
                reg = <0x50>;
+               pagesize = <64>;
                u-boot,i2c-offset-len = <2>;
        };
 };
index 757892063ac16b3364ae41a78e7fbfc8e73345a5..9e458d3fcec759edd96cea70e64a890b4b7ed5e7 100644 (file)
                        interrupts = <0 33 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_uart0>;
+                       clocks = <&sys_clk 0>;
                        clock-frequency = <36864000>;
                };
 
                        interrupts = <0 35 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_uart1>;
+                       clocks = <&sys_clk 0>;
                        clock-frequency = <36864000>;
                };
 
                        interrupts = <0 37 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_uart2>;
+                       clocks = <&sys_clk 0>;
                        clock-frequency = <36864000>;
                };
 
                };
 
                mioctrl@59810000 {
-                       compatible = "socionext,uniphier-mioctrl",
+                       compatible = "socionext,uniphier-sld3-mioctrl",
                                     "simple-mfd", "syscon";
                        reg = <0x59810000 0x800>;
                        u-boot,dm-pre-reloc;
                sysctrl@f1840000 {
                        compatible = "socionext,uniphier-sld3-sysctrl",
                                     "simple-mfd", "syscon";
-                       reg = <0xf1840000 0x4000>;
+                       reg = <0xf1840000 0x10000>;
 
                        sys_clk: clock {
                                compatible = "socionext,uniphier-sld3-clock";