1 From 369b60c157f67a71a6f302ab9843ae2de1805a2a Mon Sep 17 00:00:00 2001
2 From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
3 Date: Mon, 22 Oct 2012 15:43:00 +0200
4 Subject: [PATCH 1/6] omap3isp: Use the common clock framework
6 Expose the two ISP external clocks XCLKA and XCLKB as common clocks for
9 Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 Acked-by: Mike Turquette <mturquette@linaro.org>
12 drivers/media/platform/omap3isp/isp.c | 277 ++++++++++++++++++++++++---------
13 drivers/media/platform/omap3isp/isp.h | 22 ++-
14 include/media/omap3isp.h | 10 +-
15 3 files changed, 225 insertions(+), 84 deletions(-)
17 diff --git a/drivers/media/platform/omap3isp/isp.c b/drivers/media/platform/omap3isp/isp.c
18 index 6e5ad8e..1d7dbd5 100644
19 --- a/drivers/media/platform/omap3isp/isp.c
20 +++ b/drivers/media/platform/omap3isp/isp.c
22 #include <asm/cacheflush.h>
24 #include <linux/clk.h>
25 +#include <linux/clkdev.h>
26 #include <linux/delay.h>
27 #include <linux/device.h>
28 #include <linux/dma-mapping.h>
29 @@ -148,6 +149,201 @@ void omap3isp_flush(struct isp_device *isp)
30 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
33 +/* -----------------------------------------------------------------------------
37 +#define to_isp_xclk(_hw) container_of(_hw, struct isp_xclk, hw)
39 +static void isp_xclk_update(struct isp_xclk *xclk, u32 divider)
43 + isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
44 + ISPTCTRL_CTRL_DIVA_MASK,
45 + divider << ISPTCTRL_CTRL_DIVA_SHIFT);
48 + isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
49 + ISPTCTRL_CTRL_DIVB_MASK,
50 + divider << ISPTCTRL_CTRL_DIVB_SHIFT);
55 +static int isp_xclk_prepare(struct clk_hw *hw)
57 + struct isp_xclk *xclk = to_isp_xclk(hw);
59 + omap3isp_get(xclk->isp);
64 +static void isp_xclk_unprepare(struct clk_hw *hw)
66 + struct isp_xclk *xclk = to_isp_xclk(hw);
68 + omap3isp_put(xclk->isp);
71 +static int isp_xclk_enable(struct clk_hw *hw)
73 + struct isp_xclk *xclk = to_isp_xclk(hw);
74 + unsigned long flags;
76 + spin_lock_irqsave(&xclk->lock, flags);
77 + isp_xclk_update(xclk, xclk->divider);
78 + xclk->enabled = true;
79 + spin_unlock_irqrestore(&xclk->lock, flags);
84 +static void isp_xclk_disable(struct clk_hw *hw)
86 + struct isp_xclk *xclk = to_isp_xclk(hw);
87 + unsigned long flags;
89 + spin_lock_irqsave(&xclk->lock, flags);
90 + isp_xclk_update(xclk, 0);
91 + xclk->enabled = false;
92 + spin_unlock_irqrestore(&xclk->lock, flags);
95 +static unsigned long isp_xclk_recalc_rate(struct clk_hw *hw,
96 + unsigned long parent_rate)
98 + struct isp_xclk *xclk = to_isp_xclk(hw);
100 + return parent_rate / xclk->divider;
103 +static u32 isp_xclk_calc_divider(unsigned long *rate, unsigned long parent_rate)
107 + if (*rate >= parent_rate) {
108 + *rate = parent_rate;
109 + return ISPTCTRL_CTRL_DIV_BYPASS;
112 + divider = DIV_ROUND_CLOSEST(parent_rate, *rate);
113 + if (divider >= ISPTCTRL_CTRL_DIV_BYPASS)
114 + divider = ISPTCTRL_CTRL_DIV_BYPASS - 1;
116 + *rate = parent_rate / divider;
120 +static long isp_xclk_round_rate(struct clk_hw *hw, unsigned long rate,
121 + unsigned long *parent_rate)
123 + isp_xclk_calc_divider(&rate, *parent_rate);
127 +static int isp_xclk_set_rate(struct clk_hw *hw, unsigned long rate,
128 + unsigned long parent_rate)
130 + struct isp_xclk *xclk = to_isp_xclk(hw);
131 + unsigned long flags;
134 + divider = isp_xclk_calc_divider(&rate, parent_rate);
136 + spin_lock_irqsave(&xclk->lock, flags);
138 + xclk->divider = divider;
140 + isp_xclk_update(xclk, divider);
142 + spin_unlock_irqrestore(&xclk->lock, flags);
144 + dev_dbg(xclk->isp->dev, "%s: cam_xclk%c set to %lu Hz (div %u)\n",
145 + __func__, xclk->id == ISP_XCLK_A ? 'a' : 'b', rate, divider);
149 +static const struct clk_ops isp_xclk_ops = {
150 + .prepare = isp_xclk_prepare,
151 + .unprepare = isp_xclk_unprepare,
152 + .enable = isp_xclk_enable,
153 + .disable = isp_xclk_disable,
154 + .recalc_rate = isp_xclk_recalc_rate,
155 + .round_rate = isp_xclk_round_rate,
156 + .set_rate = isp_xclk_set_rate,
159 +static const char *isp_xclk_parent_name = "cam_mclk";
161 +static const struct clk_init_data isp_xclk_init_data = {
162 + .name = "cam_xclk",
163 + .ops = &isp_xclk_ops,
164 + .parent_names = &isp_xclk_parent_name,
168 +static int isp_xclk_init(struct isp_device *isp)
170 + struct isp_platform_data *pdata = isp->pdata;
171 + struct clk_init_data init;
174 + for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
175 + struct isp_xclk *xclk = &isp->xclks[i];
179 + xclk->id = i == 0 ? ISP_XCLK_A : ISP_XCLK_B;
181 + spin_lock_init(&xclk->lock);
183 + init.name = i == 0 ? "cam_xclka" : "cam_xclkb";
184 + init.ops = &isp_xclk_ops;
185 + init.parent_names = &isp_xclk_parent_name;
186 + init.num_parents = 1;
188 + xclk->hw.init = &init;
190 + clk = devm_clk_register(isp->dev, &xclk->hw);
192 + return PTR_ERR(clk);
194 + if (pdata->xclks[i].con_id == NULL &&
195 + pdata->xclks[i].dev_id == NULL)
198 + xclk->lookup = kzalloc(sizeof(*xclk->lookup), GFP_KERNEL);
199 + if (xclk->lookup == NULL)
202 + xclk->lookup->con_id = pdata->xclks[i].con_id;
203 + xclk->lookup->dev_id = pdata->xclks[i].dev_id;
204 + xclk->lookup->clk = clk;
206 + clkdev_add(xclk->lookup);
212 +static void isp_xclk_cleanup(struct isp_device *isp)
216 + for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
217 + struct isp_xclk *xclk = &isp->xclks[i];
220 + clkdev_drop(xclk->lookup);
224 +/* -----------------------------------------------------------------------------
229 * isp_enable_interrupts - Enable ISP interrupts.
230 * @isp: OMAP3 ISP device
231 @@ -180,80 +376,6 @@ static void isp_disable_interrupts(struct isp_device *isp)
232 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
236 - * isp_set_xclk - Configures the specified cam_xclk to the desired frequency.
237 - * @isp: OMAP3 ISP device
238 - * @xclk: Desired frequency of the clock in Hz. 0 = stable low, 1 is stable high
239 - * @xclksel: XCLK to configure (0 = A, 1 = B).
241 - * Configures the specified MCLK divisor in the ISP timing control register
242 - * (TCTRL_CTRL) to generate the desired xclk clock value.
244 - * Divisor = cam_mclk_hz / xclk
246 - * Returns the final frequency that is actually being generated
248 -static u32 isp_set_xclk(struct isp_device *isp, u32 xclk, u8 xclksel)
252 - unsigned long mclk_hz;
254 - if (!omap3isp_get(isp))
257 - mclk_hz = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
259 - if (xclk >= mclk_hz) {
260 - divisor = ISPTCTRL_CTRL_DIV_BYPASS;
261 - currentxclk = mclk_hz;
262 - } else if (xclk >= 2) {
263 - divisor = mclk_hz / xclk;
264 - if (divisor >= ISPTCTRL_CTRL_DIV_BYPASS)
265 - divisor = ISPTCTRL_CTRL_DIV_BYPASS - 1;
266 - currentxclk = mclk_hz / divisor;
274 - isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
275 - ISPTCTRL_CTRL_DIVA_MASK,
276 - divisor << ISPTCTRL_CTRL_DIVA_SHIFT);
277 - dev_dbg(isp->dev, "isp_set_xclk(): cam_xclka set to %d Hz\n",
281 - isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
282 - ISPTCTRL_CTRL_DIVB_MASK,
283 - divisor << ISPTCTRL_CTRL_DIVB_SHIFT);
284 - dev_dbg(isp->dev, "isp_set_xclk(): cam_xclkb set to %d Hz\n",
287 - case ISP_XCLK_NONE:
290 - dev_dbg(isp->dev, "ISP_ERR: isp_set_xclk(): Invalid requested "
291 - "xclk. Must be 0 (A) or 1 (B).\n");
295 - /* Do we go from stable whatever to clock? */
296 - if (divisor >= 2 && isp->xclk_divisor[xclksel - 1] < 2)
298 - /* Stopping the clock. */
299 - else if (divisor < 2 && isp->xclk_divisor[xclksel - 1] >= 2)
302 - isp->xclk_divisor[xclksel - 1] = divisor;
306 - return currentxclk;
310 * isp_core_init - ISP core settings
311 * @isp: OMAP3 ISP device
312 @@ -1969,6 +2091,7 @@ static int isp_remove(struct platform_device *pdev)
314 isp_unregister_entities(isp);
315 isp_cleanup_modules(isp);
316 + isp_xclk_cleanup(isp);
318 __omap3isp_get(isp, false);
319 iommu_detach_device(isp->domain, &pdev->dev);
320 @@ -2042,7 +2165,6 @@ static int isp_probe(struct platform_device *pdev)
323 isp->autoidle = autoidle;
324 - isp->platform_cb.set_xclk = isp_set_xclk;
326 mutex_init(&isp->isp_mutex);
327 spin_lock_init(&isp->stat_lock);
328 @@ -2093,6 +2215,10 @@ static int isp_probe(struct platform_device *pdev)
332 + ret = isp_xclk_init(isp);
336 /* Memory resources */
337 for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
338 if (isp->revision == isp_res_maps[m].isp_rev)
339 @@ -2162,6 +2288,7 @@ detach_dev:
341 iommu_domain_free(isp->domain);
343 + isp_xclk_cleanup(isp);
346 platform_set_drvdata(pdev, NULL);
347 diff --git a/drivers/media/platform/omap3isp/isp.h b/drivers/media/platform/omap3isp/isp.h
348 index c77e1f2..cd3eff4 100644
349 --- a/drivers/media/platform/omap3isp/isp.h
350 +++ b/drivers/media/platform/omap3isp/isp.h
353 #include <media/omap3isp.h>
354 #include <media/v4l2-device.h>
355 +#include <linux/clk-provider.h>
356 #include <linux/device.h>
357 #include <linux/io.h>
358 #include <linux/iommu.h>
359 @@ -125,8 +126,20 @@ struct isp_reg {
363 -struct isp_platform_callback {
364 - u32 (*set_xclk)(struct isp_device *isp, u32 xclk, u8 xclksel);
371 + struct isp_device *isp;
373 + struct clk_lookup *lookup;
374 + enum isp_xclk_id id;
376 + spinlock_t lock; /* Protects enabled and divider */
378 + unsigned int divider;
382 @@ -149,6 +162,7 @@ struct isp_platform_callback {
383 * @cam_mclk: Pointer to camera functional clock structure.
384 * @csi2_fck: Pointer to camera CSI2 complexIO clock structure.
385 * @l3_ick: Pointer to OMAP3 L3 bus interface clock.
386 + * @xclks: External clocks provided by the ISP
387 * @irq: Currently attached ISP ISR callbacks information structure.
388 * @isp_af: Pointer to current settings for ISP AutoFocus SCM.
389 * @isp_hist: Pointer to current settings for ISP Histogram SCM.
390 @@ -185,12 +199,12 @@ struct isp_device {
393 unsigned int autoidle;
394 - u32 xclk_divisor[2]; /* Two clocks, a and b. */
395 #define ISP_CLK_CAM_ICK 0
396 #define ISP_CLK_CAM_MCLK 1
397 #define ISP_CLK_CSI2_FCK 2
398 #define ISP_CLK_L3_ICK 3
399 struct clk *clock[4];
400 + struct isp_xclk xclks[2];
403 struct ispstat isp_af;
404 @@ -209,8 +223,6 @@ struct isp_device {
405 unsigned int subclk_resources;
407 struct iommu_domain *domain;
409 - struct isp_platform_callback platform_cb;
412 #define v4l2_dev_to_isp_device(dev) \
413 diff --git a/include/media/omap3isp.h b/include/media/omap3isp.h
414 index 9584269..c9d06d9 100644
415 --- a/include/media/omap3isp.h
416 +++ b/include/media/omap3isp.h
418 struct i2c_board_info;
421 -#define ISP_XCLK_NONE 0
422 -#define ISP_XCLK_A 1
423 -#define ISP_XCLK_B 2
425 enum isp_interface_type {
426 ISP_INTERFACE_PARALLEL,
427 ISP_INTERFACE_CSI2A_PHY2,
428 @@ -153,7 +149,13 @@ struct isp_v4l2_subdevs_group {
429 } bus; /* gcc < 4.6.0 chokes on anonymous union initializers */
432 +struct isp_platform_xclk {
433 + const char *dev_id;
434 + const char *con_id;
437 struct isp_platform_data {
438 + struct isp_platform_xclk xclks[2];
439 struct isp_v4l2_subdevs_group *subdevs;
440 void (*set_constraints)(struct isp_device *isp, bool enable);