src/patches/suse-2.6.27.39/patches.arch/ia64-fix-csum_ipv6_magic.patch

   1 From: Jiri Bohac <jbohac@suse.cz>
   2 Patch-mainline: 2.6.31-rc9; 5afe18d2f58812f3924edbd215464e5e3e8545e7
   3 Subject: IA64: fix csum_ipv6_magic()
   4 References: bnc#459146
   5
   6 The 32-bit parameters (len and csum) of csum_ipv6_magic() are passed in 64-bit
   7 registers in2 and in4. The high order 32 bits of the registers were never
   8 cleared, and garbage was sometimes calculated into the checksum.
   9
  10 Fix this by clearing the high order 32 bits of these registers.
  11
  12 Signed-off-by: Jiri Bohac <jbohac@suse.cz>
  13 Signed-off-by: Tony Luck <tony.luck@intel.com>
  14
  15 diff --git a/arch/ia64/lib/ip_fast_csum.S b/arch/ia64/lib/ip_fast_csum.S
  16 index 1f86aeb..620d9dc 100644
  17 --- a/arch/ia64/lib/ip_fast_csum.S
  18 +++ b/arch/ia64/lib/ip_fast_csum.S
  19 @@ -96,20 +96,22 @@ END(ip_fast_csum)
  20  GLOBAL_ENTRY(csum_ipv6_magic)
  21         ld4     r20=[in0],4
  22         ld4     r21=[in1],4
  23 -       dep     r15=in3,in2,32,16
  24 +       zxt4    in2=in2
  25         ;;
  26         ld4     r22=[in0],4
  27         ld4     r23=[in1],4
  28 -       mux1    r15=r15,@rev
  29 +       dep     r15=in3,in2,32,16
  30         ;;
  31         ld4     r24=[in0],4
  32         ld4     r25=[in1],4
  33 -       shr.u   r15=r15,16
  34 +       mux1    r15=r15,@rev
  35         add     r16=r20,r21
  36         add     r17=r22,r23
  37 +       zxt4    in4=in4
  38         ;;
  39         ld4     r26=[in0],4
  40         ld4     r27=[in1],4
  41 +       shr.u   r15=r15,16
  42         add     r18=r24,r25
  43         add     r8=r16,r17
  44         ;;