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drm/vmwgfx: Implement the cursor_set2 callback v2
[people/ms/linux.git] / drivers / gpu / drm / vmwgfx / vmwgfx_kms.c
CommitLineData
fb1d9738
JB
1/**************************************************************************
2 *
54fbde8a 3 * Copyright © 2009-2015 VMware, Inc., Palo Alto, CA., USA
fb1d9738
JB
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include "vmwgfx_kms.h"
29
56d1c78d 30
fb1d9738
JB
31/* Might need a hrtimer here? */
32#define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
33
c8261a96 34void vmw_du_cleanup(struct vmw_display_unit *du)
fb1d9738
JB
35{
36 if (du->cursor_surface)
37 vmw_surface_unreference(&du->cursor_surface);
38 if (du->cursor_dmabuf)
39 vmw_dmabuf_unreference(&du->cursor_dmabuf);
34ea3d38 40 drm_connector_unregister(&du->connector);
fb1d9738
JB
41 drm_crtc_cleanup(&du->crtc);
42 drm_encoder_cleanup(&du->encoder);
43 drm_connector_cleanup(&du->connector);
44}
45
46/*
47 * Display Unit Cursor functions
48 */
49
50int vmw_cursor_update_image(struct vmw_private *dev_priv,
51 u32 *image, u32 width, u32 height,
52 u32 hotspotX, u32 hotspotY)
53{
54 struct {
55 u32 cmd;
56 SVGAFifoCmdDefineAlphaCursor cursor;
57 } *cmd;
58 u32 image_size = width * height * 4;
59 u32 cmd_size = sizeof(*cmd) + image_size;
60
61 if (!image)
62 return -EINVAL;
63
64 cmd = vmw_fifo_reserve(dev_priv, cmd_size);
65 if (unlikely(cmd == NULL)) {
66 DRM_ERROR("Fifo reserve failed.\n");
67 return -ENOMEM;
68 }
69
70 memset(cmd, 0, sizeof(*cmd));
71
72 memcpy(&cmd[1], image, image_size);
73
b9eb1a61
TH
74 cmd->cmd = SVGA_CMD_DEFINE_ALPHA_CURSOR;
75 cmd->cursor.id = 0;
76 cmd->cursor.width = width;
77 cmd->cursor.height = height;
78 cmd->cursor.hotspotX = hotspotX;
79 cmd->cursor.hotspotY = hotspotY;
fb1d9738 80
4e0858a6 81 vmw_fifo_commit_flush(dev_priv, cmd_size);
fb1d9738
JB
82
83 return 0;
84}
85
6a91d97e
JB
86int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv,
87 struct vmw_dma_buffer *dmabuf,
88 u32 width, u32 height,
89 u32 hotspotX, u32 hotspotY)
90{
91 struct ttm_bo_kmap_obj map;
92 unsigned long kmap_offset;
93 unsigned long kmap_num;
94 void *virtual;
95 bool dummy;
96 int ret;
97
98 kmap_offset = 0;
99 kmap_num = (width*height*4 + PAGE_SIZE - 1) >> PAGE_SHIFT;
100
ee3939e0 101 ret = ttm_bo_reserve(&dmabuf->base, true, false, false, NULL);
6a91d97e
JB
102 if (unlikely(ret != 0)) {
103 DRM_ERROR("reserve failed\n");
104 return -EINVAL;
105 }
106
107 ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
108 if (unlikely(ret != 0))
109 goto err_unreserve;
110
111 virtual = ttm_kmap_obj_virtual(&map, &dummy);
112 ret = vmw_cursor_update_image(dev_priv, virtual, width, height,
113 hotspotX, hotspotY);
114
115 ttm_bo_kunmap(&map);
116err_unreserve:
117 ttm_bo_unreserve(&dmabuf->base);
118
119 return ret;
120}
121
122
fb1d9738
JB
123void vmw_cursor_update_position(struct vmw_private *dev_priv,
124 bool show, int x, int y)
125{
b76ff5ea 126 u32 *fifo_mem = dev_priv->mmio_virt;
fb1d9738
JB
127 uint32_t count;
128
b76ff5ea
TH
129 vmw_mmio_write(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON);
130 vmw_mmio_write(x, fifo_mem + SVGA_FIFO_CURSOR_X);
131 vmw_mmio_write(y, fifo_mem + SVGA_FIFO_CURSOR_Y);
132 count = vmw_mmio_read(fifo_mem + SVGA_FIFO_CURSOR_COUNT);
133 vmw_mmio_write(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
fb1d9738
JB
134}
135
8fbf9d92
TH
136
137/*
138 * vmw_du_crtc_cursor_set2 - Driver cursor_set2 callback.
139 */
140int vmw_du_crtc_cursor_set2(struct drm_crtc *crtc, struct drm_file *file_priv,
141 uint32_t handle, uint32_t width, uint32_t height,
142 int32_t hot_x, int32_t hot_y)
fb1d9738
JB
143{
144 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
fb1d9738
JB
145 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
146 struct vmw_surface *surface = NULL;
147 struct vmw_dma_buffer *dmabuf = NULL;
8fbf9d92 148 s32 hotspot_x, hotspot_y;
fb1d9738
JB
149 int ret;
150
bfb89928
DV
151 /*
152 * FIXME: Unclear whether there's any global state touched by the
153 * cursor_set function, especially vmw_cursor_update_position looks
154 * suspicious. For now take the easy route and reacquire all locks. We
155 * can do this since the caller in the drm core doesn't check anything
156 * which is protected by any looks.
157 */
21e88620 158 drm_modeset_unlock_crtc(crtc);
bfb89928 159 drm_modeset_lock_all(dev_priv->dev);
8fbf9d92
TH
160 hotspot_x = hot_x + du->hotspot_x;
161 hotspot_y = hot_y + du->hotspot_y;
bfb89928 162
baa91d64 163 /* A lot of the code assumes this */
bfb89928
DV
164 if (handle && (width != 64 || height != 64)) {
165 ret = -EINVAL;
166 goto out;
167 }
baa91d64 168
fb1d9738 169 if (handle) {
a5d0f576
VS
170 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
171
e7ac9211
JB
172 ret = vmw_user_lookup_handle(dev_priv, tfile,
173 handle, &surface, &dmabuf);
174 if (ret) {
175 DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
bfb89928
DV
176 ret = -EINVAL;
177 goto out;
fb1d9738
JB
178 }
179 }
180
e7ac9211
JB
181 /* need to do this before taking down old image */
182 if (surface && !surface->snooper.image) {
183 DRM_ERROR("surface not suitable for cursor\n");
184 vmw_surface_unreference(&surface);
bfb89928
DV
185 ret = -EINVAL;
186 goto out;
e7ac9211
JB
187 }
188
fb1d9738
JB
189 /* takedown old cursor */
190 if (du->cursor_surface) {
191 du->cursor_surface->snooper.crtc = NULL;
192 vmw_surface_unreference(&du->cursor_surface);
193 }
194 if (du->cursor_dmabuf)
195 vmw_dmabuf_unreference(&du->cursor_dmabuf);
196
197 /* setup new image */
8fbf9d92 198 ret = 0;
fb1d9738
JB
199 if (surface) {
200 /* vmw_user_surface_lookup takes one reference */
201 du->cursor_surface = surface;
202
203 du->cursor_surface->snooper.crtc = crtc;
204 du->cursor_age = du->cursor_surface->snooper.age;
8fbf9d92
TH
205 ret = vmw_cursor_update_image(dev_priv, surface->snooper.image,
206 64, 64, hotspot_x, hotspot_y);
fb1d9738 207 } else if (dmabuf) {
fb1d9738
JB
208 /* vmw_user_surface_lookup takes one reference */
209 du->cursor_dmabuf = dmabuf;
210
6a91d97e 211 ret = vmw_cursor_update_dmabuf(dev_priv, dmabuf, width, height,
8fbf9d92 212 hotspot_x, hotspot_y);
fb1d9738
JB
213 } else {
214 vmw_cursor_update_position(dev_priv, false, 0, 0);
bfb89928 215 goto out;
fb1d9738
JB
216 }
217
8fbf9d92
TH
218 if (!ret) {
219 vmw_cursor_update_position(dev_priv, true,
220 du->cursor_x + hotspot_x,
221 du->cursor_y + hotspot_y);
222 du->core_hotspot_x = hot_x;
223 du->core_hotspot_y = hot_y;
224 }
fb1d9738 225
bfb89928
DV
226out:
227 drm_modeset_unlock_all(dev_priv->dev);
4d02e2de 228 drm_modeset_lock_crtc(crtc, crtc->cursor);
bfb89928
DV
229
230 return ret;
fb1d9738
JB
231}
232
233int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
234{
235 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
236 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
237 bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false;
238
239 du->cursor_x = x + crtc->x;
240 du->cursor_y = y + crtc->y;
241
dac35663
DV
242 /*
243 * FIXME: Unclear whether there's any global state touched by the
244 * cursor_set function, especially vmw_cursor_update_position looks
245 * suspicious. For now take the easy route and reacquire all locks. We
246 * can do this since the caller in the drm core doesn't check anything
247 * which is protected by any looks.
248 */
21e88620 249 drm_modeset_unlock_crtc(crtc);
dac35663
DV
250 drm_modeset_lock_all(dev_priv->dev);
251
fb1d9738 252 vmw_cursor_update_position(dev_priv, shown,
8fbf9d92
TH
253 du->cursor_x + du->hotspot_x +
254 du->core_hotspot_x,
255 du->cursor_y + du->hotspot_y +
256 du->core_hotspot_y);
fb1d9738 257
dac35663 258 drm_modeset_unlock_all(dev_priv->dev);
4d02e2de 259 drm_modeset_lock_crtc(crtc, crtc->cursor);
dac35663 260
fb1d9738
JB
261 return 0;
262}
263
264void vmw_kms_cursor_snoop(struct vmw_surface *srf,
265 struct ttm_object_file *tfile,
266 struct ttm_buffer_object *bo,
267 SVGA3dCmdHeader *header)
268{
269 struct ttm_bo_kmap_obj map;
270 unsigned long kmap_offset;
271 unsigned long kmap_num;
272 SVGA3dCopyBox *box;
273 unsigned box_count;
274 void *virtual;
275 bool dummy;
276 struct vmw_dma_cmd {
277 SVGA3dCmdHeader header;
278 SVGA3dCmdSurfaceDMA dma;
279 } *cmd;
2ac86371 280 int i, ret;
fb1d9738
JB
281
282 cmd = container_of(header, struct vmw_dma_cmd, header);
283
284 /* No snooper installed */
285 if (!srf->snooper.image)
286 return;
287
288 if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) {
289 DRM_ERROR("face and mipmap for cursors should never != 0\n");
290 return;
291 }
292
293 if (cmd->header.size < 64) {
294 DRM_ERROR("at least one full copy box must be given\n");
295 return;
296 }
297
298 box = (SVGA3dCopyBox *)&cmd[1];
299 box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) /
300 sizeof(SVGA3dCopyBox);
301
2ac86371 302 if (cmd->dma.guest.ptr.offset % PAGE_SIZE ||
fb1d9738
JB
303 box->x != 0 || box->y != 0 || box->z != 0 ||
304 box->srcx != 0 || box->srcy != 0 || box->srcz != 0 ||
2ac86371 305 box->d != 1 || box_count != 1) {
fb1d9738 306 /* TODO handle none page aligned offsets */
2ac86371
JB
307 /* TODO handle more dst & src != 0 */
308 /* TODO handle more then one copy */
309 DRM_ERROR("Cant snoop dma request for cursor!\n");
310 DRM_ERROR("(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n",
311 box->srcx, box->srcy, box->srcz,
312 box->x, box->y, box->z,
313 box->w, box->h, box->d, box_count,
314 cmd->dma.guest.ptr.offset);
fb1d9738
JB
315 return;
316 }
317
318 kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT;
319 kmap_num = (64*64*4) >> PAGE_SHIFT;
320
ee3939e0 321 ret = ttm_bo_reserve(bo, true, false, false, NULL);
fb1d9738
JB
322 if (unlikely(ret != 0)) {
323 DRM_ERROR("reserve failed\n");
324 return;
325 }
326
327 ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map);
328 if (unlikely(ret != 0))
329 goto err_unreserve;
330
331 virtual = ttm_kmap_obj_virtual(&map, &dummy);
332
2ac86371
JB
333 if (box->w == 64 && cmd->dma.guest.pitch == 64*4) {
334 memcpy(srf->snooper.image, virtual, 64*64*4);
335 } else {
336 /* Image is unsigned pointer. */
337 for (i = 0; i < box->h; i++)
338 memcpy(srf->snooper.image + i * 64,
339 virtual + i * cmd->dma.guest.pitch,
340 box->w * 4);
341 }
342
fb1d9738
JB
343 srf->snooper.age++;
344
fb1d9738
JB
345 ttm_bo_kunmap(&map);
346err_unreserve:
347 ttm_bo_unreserve(bo);
348}
349
8fbf9d92
TH
350/**
351 * vmw_kms_legacy_hotspot_clear - Clear legacy hotspots
352 *
353 * @dev_priv: Pointer to the device private struct.
354 *
355 * Clears all legacy hotspots.
356 */
357void vmw_kms_legacy_hotspot_clear(struct vmw_private *dev_priv)
358{
359 struct drm_device *dev = dev_priv->dev;
360 struct vmw_display_unit *du;
361 struct drm_crtc *crtc;
362
363 drm_modeset_lock_all(dev);
364 drm_for_each_crtc(crtc, dev) {
365 du = vmw_crtc_to_du(crtc);
366
367 du->hotspot_x = 0;
368 du->hotspot_y = 0;
369 }
370 drm_modeset_unlock_all(dev);
371}
372
fb1d9738
JB
373void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
374{
375 struct drm_device *dev = dev_priv->dev;
376 struct vmw_display_unit *du;
377 struct drm_crtc *crtc;
378
379 mutex_lock(&dev->mode_config.mutex);
380
381 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
382 du = vmw_crtc_to_du(crtc);
383 if (!du->cursor_surface ||
384 du->cursor_age == du->cursor_surface->snooper.age)
385 continue;
386
387 du->cursor_age = du->cursor_surface->snooper.age;
388 vmw_cursor_update_image(dev_priv,
389 du->cursor_surface->snooper.image,
8fbf9d92
TH
390 64, 64,
391 du->hotspot_x + du->core_hotspot_x,
392 du->hotspot_y + du->core_hotspot_y);
fb1d9738
JB
393 }
394
395 mutex_unlock(&dev->mode_config.mutex);
396}
397
398/*
399 * Generic framebuffer code
400 */
401
fb1d9738
JB
402/*
403 * Surface framebuffer code
404 */
405
847c5964 406static void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer)
fb1d9738 407{
3a939a5e 408 struct vmw_framebuffer_surface *vfbs =
fb1d9738 409 vmw_framebuffer_to_vfbs(framebuffer);
3a939a5e 410
fb1d9738 411 drm_framebuffer_cleanup(framebuffer);
3a939a5e 412 vmw_surface_unreference(&vfbs->surface);
a278724a
TH
413 if (vfbs->base.user_obj)
414 ttm_base_object_unref(&vfbs->base.user_obj);
fb1d9738 415
3a939a5e 416 kfree(vfbs);
fb1d9738
JB
417}
418
847c5964 419static int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer,
02b00162 420 struct drm_file *file_priv,
fb1d9738
JB
421 unsigned flags, unsigned color,
422 struct drm_clip_rect *clips,
423 unsigned num_clips)
424{
425 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
426 struct vmw_framebuffer_surface *vfbs =
427 vmw_framebuffer_to_vfbs(framebuffer);
fb1d9738 428 struct drm_clip_rect norect;
5deb65cf 429 int ret, inc = 1;
fb1d9738 430
c8261a96
SY
431 /* Legacy Display Unit does not support 3D */
432 if (dev_priv->active_display_unit == vmw_du_legacy)
01e81419
JB
433 return -EINVAL;
434
73e9efd4
VS
435 drm_modeset_lock_all(dev_priv->dev);
436
294adf7d 437 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
73e9efd4
VS
438 if (unlikely(ret != 0)) {
439 drm_modeset_unlock_all(dev_priv->dev);
3a939a5e 440 return ret;
73e9efd4 441 }
3a939a5e 442
fb1d9738
JB
443 if (!num_clips) {
444 num_clips = 1;
445 clips = &norect;
446 norect.x1 = norect.y1 = 0;
447 norect.x2 = framebuffer->width;
448 norect.y2 = framebuffer->height;
449 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
450 num_clips /= 2;
451 inc = 2; /* skip source rects */
452 }
453
c8261a96 454 if (dev_priv->active_display_unit == vmw_du_screen_object)
10b1e0ca
TH
455 ret = vmw_kms_sou_do_surface_dirty(dev_priv, &vfbs->base,
456 clips, NULL, NULL, 0, 0,
457 num_clips, inc, NULL);
35c05125 458 else
6bf6bf03
TH
459 ret = vmw_kms_stdu_surface_dirty(dev_priv, &vfbs->base,
460 clips, NULL, NULL, 0, 0,
461 num_clips, inc, NULL);
fb1d9738 462
3eab3d9e 463 vmw_fifo_flush(dev_priv, false);
294adf7d 464 ttm_read_unlock(&dev_priv->reservation_sem);
73e9efd4
VS
465
466 drm_modeset_unlock_all(dev_priv->dev);
467
fb1d9738
JB
468 return 0;
469}
470
10b1e0ca
TH
471/**
472 * vmw_kms_readback - Perform a readback from the screen system to
473 * a dma-buffer backed framebuffer.
474 *
475 * @dev_priv: Pointer to the device private structure.
476 * @file_priv: Pointer to a struct drm_file identifying the caller.
477 * Must be set to NULL if @user_fence_rep is NULL.
478 * @vfb: Pointer to the dma-buffer backed framebuffer.
479 * @user_fence_rep: User-space provided structure for fence information.
480 * Must be set to non-NULL if @file_priv is non-NULL.
481 * @vclips: Array of clip rects.
482 * @num_clips: Number of clip rects in @vclips.
483 *
484 * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
485 * interrupted.
486 */
487int vmw_kms_readback(struct vmw_private *dev_priv,
488 struct drm_file *file_priv,
489 struct vmw_framebuffer *vfb,
490 struct drm_vmw_fence_rep __user *user_fence_rep,
491 struct drm_vmw_rect *vclips,
492 uint32_t num_clips)
493{
494 switch (dev_priv->active_display_unit) {
495 case vmw_du_screen_object:
496 return vmw_kms_sou_readback(dev_priv, file_priv, vfb,
497 user_fence_rep, vclips, num_clips);
6bf6bf03
TH
498 case vmw_du_screen_target:
499 return vmw_kms_stdu_dma(dev_priv, file_priv, vfb,
500 user_fence_rep, NULL, vclips, num_clips,
501 1, false, true);
10b1e0ca
TH
502 default:
503 WARN_ONCE(true,
504 "Readback called with invalid display system.\n");
6bf6bf03 505}
10b1e0ca
TH
506
507 return -ENOSYS;
508}
509
510
fb1d9738
JB
511static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
512 .destroy = vmw_framebuffer_surface_destroy,
513 .dirty = vmw_framebuffer_surface_dirty,
fb1d9738
JB
514};
515
d3216a0c
TH
516static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
517 struct vmw_surface *surface,
518 struct vmw_framebuffer **out,
519 const struct drm_mode_fb_cmd
f89c6c32
SY
520 *mode_cmd,
521 bool is_dmabuf_proxy)
fb1d9738
JB
522
523{
524 struct drm_device *dev = dev_priv->dev;
525 struct vmw_framebuffer_surface *vfbs;
d3216a0c 526 enum SVGA3dSurfaceFormat format;
fb1d9738
JB
527 int ret;
528
c8261a96
SY
529 /* 3D is only supported on HWv8 and newer hosts */
530 if (dev_priv->active_display_unit == vmw_du_legacy)
01e81419
JB
531 return -ENOSYS;
532
d3216a0c
TH
533 /*
534 * Sanity checks.
535 */
536
e7ac9211
JB
537 /* Surface must be marked as a scanout. */
538 if (unlikely(!surface->scanout))
539 return -EINVAL;
540
d3216a0c
TH
541 if (unlikely(surface->mip_levels[0] != 1 ||
542 surface->num_sizes != 1 ||
b360a3ce
TH
543 surface->base_size.width < mode_cmd->width ||
544 surface->base_size.height < mode_cmd->height ||
545 surface->base_size.depth != 1)) {
d3216a0c
TH
546 DRM_ERROR("Incompatible surface dimensions "
547 "for requested mode.\n");
548 return -EINVAL;
549 }
550
551 switch (mode_cmd->depth) {
552 case 32:
553 format = SVGA3D_A8R8G8B8;
554 break;
555 case 24:
556 format = SVGA3D_X8R8G8B8;
557 break;
558 case 16:
559 format = SVGA3D_R5G6B5;
560 break;
561 case 15:
562 format = SVGA3D_A1R5G5B5;
563 break;
564 default:
565 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
566 return -EINVAL;
567 }
568
d80efd5c
TH
569 /*
570 * For DX, surface format validation is done when surface->scanout
571 * is set.
572 */
573 if (!dev_priv->has_dx && format != surface->format) {
d3216a0c
TH
574 DRM_ERROR("Invalid surface format for requested mode.\n");
575 return -EINVAL;
576 }
577
fb1d9738
JB
578 vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL);
579 if (!vfbs) {
580 ret = -ENOMEM;
581 goto out_err1;
582 }
583
fb1d9738 584 /* XXX get the first 3 from the surface info */
d3216a0c 585 vfbs->base.base.bits_per_pixel = mode_cmd->bpp;
01f2c773 586 vfbs->base.base.pitches[0] = mode_cmd->pitch;
d3216a0c
TH
587 vfbs->base.base.depth = mode_cmd->depth;
588 vfbs->base.base.width = mode_cmd->width;
589 vfbs->base.base.height = mode_cmd->height;
05c95018 590 vfbs->surface = vmw_surface_reference(surface);
90ff18bc 591 vfbs->base.user_handle = mode_cmd->handle;
f89c6c32 592 vfbs->is_dmabuf_proxy = is_dmabuf_proxy;
3a939a5e 593
fb1d9738
JB
594 *out = &vfbs->base;
595
80f0b5af
DV
596 ret = drm_framebuffer_init(dev, &vfbs->base.base,
597 &vmw_framebuffer_surface_funcs);
598 if (ret)
05c95018 599 goto out_err2;
80f0b5af 600
fb1d9738
JB
601 return 0;
602
fb1d9738 603out_err2:
05c95018 604 vmw_surface_unreference(&surface);
fb1d9738
JB
605 kfree(vfbs);
606out_err1:
607 return ret;
608}
609
610/*
611 * Dmabuf framebuffer code
612 */
613
847c5964 614static void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer)
fb1d9738
JB
615{
616 struct vmw_framebuffer_dmabuf *vfbd =
617 vmw_framebuffer_to_vfbd(framebuffer);
618
619 drm_framebuffer_cleanup(framebuffer);
620 vmw_dmabuf_unreference(&vfbd->buffer);
a278724a
TH
621 if (vfbd->base.user_obj)
622 ttm_base_object_unref(&vfbd->base.user_obj);
fb1d9738
JB
623
624 kfree(vfbd);
625}
626
847c5964 627static int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer,
02b00162 628 struct drm_file *file_priv,
fb1d9738
JB
629 unsigned flags, unsigned color,
630 struct drm_clip_rect *clips,
631 unsigned num_clips)
632{
633 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
5deb65cf
JB
634 struct vmw_framebuffer_dmabuf *vfbd =
635 vmw_framebuffer_to_vfbd(framebuffer);
fb1d9738 636 struct drm_clip_rect norect;
5deb65cf 637 int ret, increment = 1;
fb1d9738 638
73e9efd4
VS
639 drm_modeset_lock_all(dev_priv->dev);
640
294adf7d 641 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
73e9efd4
VS
642 if (unlikely(ret != 0)) {
643 drm_modeset_unlock_all(dev_priv->dev);
3a939a5e 644 return ret;
73e9efd4 645 }
3a939a5e 646
df1c93ba 647 if (!num_clips) {
fb1d9738
JB
648 num_clips = 1;
649 clips = &norect;
650 norect.x1 = norect.y1 = 0;
651 norect.x2 = framebuffer->width;
652 norect.y2 = framebuffer->height;
653 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
654 num_clips /= 2;
655 increment = 2;
656 }
657
6bf6bf03
TH
658 switch (dev_priv->active_display_unit) {
659 case vmw_du_screen_target:
660 ret = vmw_kms_stdu_dma(dev_priv, NULL, &vfbd->base, NULL,
661 clips, NULL, num_clips, increment,
662 true, true);
663 break;
664 case vmw_du_screen_object:
10b1e0ca 665 ret = vmw_kms_sou_do_dmabuf_dirty(dev_priv, &vfbd->base,
c8261a96 666 clips, num_clips, increment,
10b1e0ca 667 true,
c8261a96 668 NULL);
6bf6bf03 669 break;
352b20dc
TH
670 case vmw_du_legacy:
671 ret = vmw_kms_ldu_do_dmabuf_dirty(dev_priv, &vfbd->base, 0, 0,
672 clips, num_clips, increment);
673 break;
6bf6bf03 674 default:
352b20dc
TH
675 ret = -EINVAL;
676 WARN_ONCE(true, "Dirty called with invalid display system.\n");
6bf6bf03 677 break;
56d1c78d 678 }
fb1d9738 679
3eab3d9e 680 vmw_fifo_flush(dev_priv, false);
294adf7d 681 ttm_read_unlock(&dev_priv->reservation_sem);
73e9efd4
VS
682
683 drm_modeset_unlock_all(dev_priv->dev);
684
5deb65cf 685 return ret;
fb1d9738
JB
686}
687
688static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = {
689 .destroy = vmw_framebuffer_dmabuf_destroy,
690 .dirty = vmw_framebuffer_dmabuf_dirty,
fb1d9738
JB
691};
692
497a3ff9
JB
693/**
694 * Pin the dmabuffer to the start of vram.
695 */
fd006a43 696static int vmw_framebuffer_pin(struct vmw_framebuffer *vfb)
fb1d9738
JB
697{
698 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
fd006a43 699 struct vmw_dma_buffer *buf;
fb1d9738
JB
700 int ret;
701
fd006a43
TH
702 buf = vfb->dmabuf ? vmw_framebuffer_to_vfbd(&vfb->base)->buffer :
703 vmw_framebuffer_to_vfbs(&vfb->base)->surface->res.backup;
fb1d9738 704
fd006a43
TH
705 if (!buf)
706 return 0;
fb1d9738 707
fd006a43
TH
708 switch (dev_priv->active_display_unit) {
709 case vmw_du_legacy:
710 vmw_overlay_pause_all(dev_priv);
711 ret = vmw_dmabuf_pin_in_start_of_vram(dev_priv, buf, false);
712 vmw_overlay_resume_all(dev_priv);
713 break;
714 case vmw_du_screen_object:
715 case vmw_du_screen_target:
716 if (vfb->dmabuf)
717 return vmw_dmabuf_pin_in_vram_or_gmr(dev_priv, buf,
718 false);
fb1d9738 719
fd006a43
TH
720 return vmw_dmabuf_pin_in_placement(dev_priv, buf,
721 &vmw_mob_placement, false);
722 default:
723 return -EINVAL;
724 }
316ab13a 725
fd006a43 726 return ret;
fb1d9738
JB
727}
728
fd006a43 729static int vmw_framebuffer_unpin(struct vmw_framebuffer *vfb)
fb1d9738
JB
730{
731 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
fd006a43 732 struct vmw_dma_buffer *buf;
fb1d9738 733
fd006a43
TH
734 buf = vfb->dmabuf ? vmw_framebuffer_to_vfbd(&vfb->base)->buffer :
735 vmw_framebuffer_to_vfbs(&vfb->base)->surface->res.backup;
fb1d9738 736
fd006a43 737 if (WARN_ON(!buf))
fb1d9738 738 return 0;
fb1d9738 739
fd006a43 740 return vmw_dmabuf_unpin(dev_priv, buf, false);
fb1d9738
JB
741}
742
f89c6c32
SY
743/**
744 * vmw_create_dmabuf_proxy - create a proxy surface for the DMA buf
745 *
746 * @dev: DRM device
747 * @mode_cmd: parameters for the new surface
748 * @dmabuf_mob: MOB backing the DMA buf
749 * @srf_out: newly created surface
750 *
751 * When the content FB is a DMA buf, we create a surface as a proxy to the
752 * same buffer. This way we can do a surface copy rather than a surface DMA.
753 * This is a more efficient approach
754 *
755 * RETURNS:
756 * 0 on success, error code otherwise
757 */
758static int vmw_create_dmabuf_proxy(struct drm_device *dev,
fd006a43 759 const struct drm_mode_fb_cmd *mode_cmd,
f89c6c32
SY
760 struct vmw_dma_buffer *dmabuf_mob,
761 struct vmw_surface **srf_out)
762{
763 uint32_t format;
764 struct drm_vmw_size content_base_size;
6bf6bf03 765 struct vmw_resource *res;
f89c6c32
SY
766 int ret;
767
f89c6c32
SY
768 switch (mode_cmd->depth) {
769 case 32:
770 case 24:
771 format = SVGA3D_X8R8G8B8;
772 break;
773
774 case 16:
775 case 15:
776 format = SVGA3D_R5G6B5;
777 break;
778
779 case 8:
780 format = SVGA3D_P8;
781 break;
782
783 default:
784 DRM_ERROR("Invalid framebuffer format %d\n", mode_cmd->depth);
785 return -EINVAL;
786 }
787
788 content_base_size.width = mode_cmd->width;
789 content_base_size.height = mode_cmd->height;
790 content_base_size.depth = 1;
791
792 ret = vmw_surface_gb_priv_define(dev,
793 0, /* kernel visible only */
794 0, /* flags */
795 format,
796 true, /* can be a scanout buffer */
797 1, /* num of mip levels */
798 0,
d80efd5c 799 0,
f89c6c32
SY
800 content_base_size,
801 srf_out);
802 if (ret) {
803 DRM_ERROR("Failed to allocate proxy content buffer\n");
804 return ret;
fb1d9738
JB
805 }
806
6bf6bf03 807 res = &(*srf_out)->res;
f89c6c32 808
6bf6bf03
TH
809 /* Reserve and switch the backing mob. */
810 mutex_lock(&res->dev_priv->cmdbuf_mutex);
811 (void) vmw_resource_reserve(res, false, true);
812 vmw_dmabuf_unreference(&res->backup);
813 res->backup = vmw_dmabuf_reference(dmabuf_mob);
814 res->backup_offset = 0;
d80efd5c 815 vmw_resource_unreserve(res, false, NULL, 0);
6bf6bf03 816 mutex_unlock(&res->dev_priv->cmdbuf_mutex);
f89c6c32 817
6bf6bf03 818 return 0;
fb1d9738
JB
819}
820
f89c6c32
SY
821
822
d3216a0c
TH
823static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv,
824 struct vmw_dma_buffer *dmabuf,
825 struct vmw_framebuffer **out,
826 const struct drm_mode_fb_cmd
827 *mode_cmd)
fb1d9738
JB
828
829{
830 struct drm_device *dev = dev_priv->dev;
831 struct vmw_framebuffer_dmabuf *vfbd;
d3216a0c 832 unsigned int requested_size;
fb1d9738
JB
833 int ret;
834
d3216a0c
TH
835 requested_size = mode_cmd->height * mode_cmd->pitch;
836 if (unlikely(requested_size > dmabuf->base.num_pages * PAGE_SIZE)) {
837 DRM_ERROR("Screen buffer object size is too small "
838 "for requested mode.\n");
839 return -EINVAL;
840 }
841
c337ada7 842 /* Limited framebuffer color depth support for screen objects */
c8261a96 843 if (dev_priv->active_display_unit == vmw_du_screen_object) {
c337ada7
JB
844 switch (mode_cmd->depth) {
845 case 32:
846 case 24:
847 /* Only support 32 bpp for 32 and 24 depth fbs */
848 if (mode_cmd->bpp == 32)
849 break;
850
851 DRM_ERROR("Invalid color depth/bbp: %d %d\n",
852 mode_cmd->depth, mode_cmd->bpp);
853 return -EINVAL;
854 case 16:
855 case 15:
856 /* Only support 16 bpp for 16 and 15 depth fbs */
857 if (mode_cmd->bpp == 16)
858 break;
859
860 DRM_ERROR("Invalid color depth/bbp: %d %d\n",
861 mode_cmd->depth, mode_cmd->bpp);
862 return -EINVAL;
863 default:
864 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
865 return -EINVAL;
866 }
867 }
868
fb1d9738
JB
869 vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
870 if (!vfbd) {
871 ret = -ENOMEM;
872 goto out_err1;
873 }
874
d3216a0c 875 vfbd->base.base.bits_per_pixel = mode_cmd->bpp;
01f2c773 876 vfbd->base.base.pitches[0] = mode_cmd->pitch;
d3216a0c
TH
877 vfbd->base.base.depth = mode_cmd->depth;
878 vfbd->base.base.width = mode_cmd->width;
879 vfbd->base.base.height = mode_cmd->height;
2fcd5a73 880 vfbd->base.dmabuf = true;
05c95018 881 vfbd->buffer = vmw_dmabuf_reference(dmabuf);
90ff18bc 882 vfbd->base.user_handle = mode_cmd->handle;
fb1d9738
JB
883 *out = &vfbd->base;
884
80f0b5af
DV
885 ret = drm_framebuffer_init(dev, &vfbd->base.base,
886 &vmw_framebuffer_dmabuf_funcs);
887 if (ret)
05c95018 888 goto out_err2;
80f0b5af 889
fb1d9738
JB
890 return 0;
891
fb1d9738 892out_err2:
05c95018 893 vmw_dmabuf_unreference(&dmabuf);
fb1d9738
JB
894 kfree(vfbd);
895out_err1:
896 return ret;
897}
898
fd006a43
TH
899/**
900 * vmw_kms_new_framebuffer - Create a new framebuffer.
901 *
902 * @dev_priv: Pointer to device private struct.
903 * @dmabuf: Pointer to dma buffer to wrap the kms framebuffer around.
904 * Either @dmabuf or @surface must be NULL.
905 * @surface: Pointer to a surface to wrap the kms framebuffer around.
906 * Either @dmabuf or @surface must be NULL.
907 * @only_2d: No presents will occur to this dma buffer based framebuffer. This
908 * Helps the code to do some important optimizations.
909 * @mode_cmd: Frame-buffer metadata.
fb1d9738 910 */
fd006a43
TH
911struct vmw_framebuffer *
912vmw_kms_new_framebuffer(struct vmw_private *dev_priv,
913 struct vmw_dma_buffer *dmabuf,
914 struct vmw_surface *surface,
915 bool only_2d,
916 const struct drm_mode_fb_cmd *mode_cmd)
fb1d9738 917{
fb1d9738 918 struct vmw_framebuffer *vfb = NULL;
fd006a43 919 bool is_dmabuf_proxy = false;
fb1d9738
JB
920 int ret;
921
fd006a43
TH
922 /*
923 * We cannot use the SurfaceDMA command in an non-accelerated VM,
924 * therefore, wrap the DMA buf in a surface so we can use the
925 * SurfaceCopy command.
926 */
927 if (dmabuf && only_2d &&
928 dev_priv->active_display_unit == vmw_du_screen_target) {
929 ret = vmw_create_dmabuf_proxy(dev_priv->dev, mode_cmd,
930 dmabuf, &surface);
931 if (ret)
932 return ERR_PTR(ret);
933
934 is_dmabuf_proxy = true;
935 }
936
937 /* Create the new framebuffer depending one what we have */
05c95018 938 if (surface) {
fd006a43
TH
939 ret = vmw_kms_new_framebuffer_surface(dev_priv, surface, &vfb,
940 mode_cmd,
941 is_dmabuf_proxy);
05c95018
SY
942
943 /*
944 * vmw_create_dmabuf_proxy() adds a reference that is no longer
945 * needed
946 */
947 if (is_dmabuf_proxy)
948 vmw_surface_unreference(&surface);
949 } else if (dmabuf) {
fd006a43
TH
950 ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, dmabuf, &vfb,
951 mode_cmd);
05c95018 952 } else {
fd006a43 953 BUG();
05c95018 954 }
fd006a43
TH
955
956 if (ret)
957 return ERR_PTR(ret);
958
959 vfb->pin = vmw_framebuffer_pin;
960 vfb->unpin = vmw_framebuffer_unpin;
961
962 return vfb;
963}
964
fb1d9738
JB
965/*
966 * Generic Kernel modesetting functions
967 */
968
969static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
970 struct drm_file *file_priv,
308e5bcb 971 struct drm_mode_fb_cmd2 *mode_cmd2)
fb1d9738
JB
972{
973 struct vmw_private *dev_priv = vmw_priv(dev);
974 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
975 struct vmw_framebuffer *vfb = NULL;
976 struct vmw_surface *surface = NULL;
977 struct vmw_dma_buffer *bo = NULL;
90ff18bc 978 struct ttm_base_object *user_obj;
308e5bcb 979 struct drm_mode_fb_cmd mode_cmd;
fb1d9738
JB
980 int ret;
981
308e5bcb
JB
982 mode_cmd.width = mode_cmd2->width;
983 mode_cmd.height = mode_cmd2->height;
984 mode_cmd.pitch = mode_cmd2->pitches[0];
985 mode_cmd.handle = mode_cmd2->handles[0];
248dbc23 986 drm_fb_get_bpp_depth(mode_cmd2->pixel_format, &mode_cmd.depth,
308e5bcb
JB
987 &mode_cmd.bpp);
988
d3216a0c
TH
989 /**
990 * This code should be conditioned on Screen Objects not being used.
991 * If screen objects are used, we can allocate a GMR to hold the
992 * requested framebuffer.
993 */
994
8a783896 995 if (!vmw_kms_validate_mode_vram(dev_priv,
1a464cbb
LT
996 mode_cmd.pitch,
997 mode_cmd.height)) {
c8261a96 998 DRM_ERROR("Requested mode exceed bounding box limit.\n");
d9826409 999 return ERR_PTR(-ENOMEM);
d3216a0c
TH
1000 }
1001
90ff18bc
TH
1002 /*
1003 * Take a reference on the user object of the resource
1004 * backing the kms fb. This ensures that user-space handle
1005 * lookups on that resource will always work as long as
1006 * it's registered with a kms framebuffer. This is important,
1007 * since vmw_execbuf_process identifies resources in the
1008 * command stream using user-space handles.
1009 */
1010
308e5bcb 1011 user_obj = ttm_base_object_lookup(tfile, mode_cmd.handle);
90ff18bc
TH
1012 if (unlikely(user_obj == NULL)) {
1013 DRM_ERROR("Could not locate requested kms frame buffer.\n");
1014 return ERR_PTR(-ENOENT);
1015 }
1016
d3216a0c
TH
1017 /**
1018 * End conditioned code.
1019 */
1020
e7ac9211
JB
1021 /* returns either a dmabuf or surface */
1022 ret = vmw_user_lookup_handle(dev_priv, tfile,
4cf73129 1023 mode_cmd.handle,
e7ac9211 1024 &surface, &bo);
fb1d9738 1025 if (ret)
e7ac9211
JB
1026 goto err_out;
1027
fd006a43
TH
1028 vfb = vmw_kms_new_framebuffer(dev_priv, bo, surface,
1029 !(dev_priv->capabilities & SVGA_CAP_3D),
1030 &mode_cmd);
1031 if (IS_ERR(vfb)) {
1032 ret = PTR_ERR(vfb);
1033 goto err_out;
1034 }
e7ac9211
JB
1035
1036err_out:
1037 /* vmw_user_lookup_handle takes one ref so does new_fb */
1038 if (bo)
1039 vmw_dmabuf_unreference(&bo);
1040 if (surface)
1041 vmw_surface_unreference(&surface);
fb1d9738
JB
1042
1043 if (ret) {
1044 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
90ff18bc 1045 ttm_base_object_unref(&user_obj);
cce13ff7 1046 return ERR_PTR(ret);
90ff18bc
TH
1047 } else
1048 vfb->user_obj = user_obj;
fb1d9738
JB
1049
1050 return &vfb->base;
1051}
1052
e6ecefaa 1053static const struct drm_mode_config_funcs vmw_kms_funcs = {
fb1d9738 1054 .fb_create = vmw_kms_fb_create,
fb1d9738
JB
1055};
1056
b9eb1a61
TH
1057static int vmw_kms_generic_present(struct vmw_private *dev_priv,
1058 struct drm_file *file_priv,
1059 struct vmw_framebuffer *vfb,
1060 struct vmw_surface *surface,
1061 uint32_t sid,
1062 int32_t destX, int32_t destY,
1063 struct drm_vmw_rect *clips,
1064 uint32_t num_clips)
2fcd5a73 1065{
10b1e0ca
TH
1066 return vmw_kms_sou_do_surface_dirty(dev_priv, vfb, NULL, clips,
1067 &surface->res, destX, destY,
1068 num_clips, 1, NULL);
2fcd5a73
JB
1069}
1070
6bf6bf03 1071
2fcd5a73
JB
1072int vmw_kms_present(struct vmw_private *dev_priv,
1073 struct drm_file *file_priv,
1074 struct vmw_framebuffer *vfb,
1075 struct vmw_surface *surface,
1076 uint32_t sid,
1077 int32_t destX, int32_t destY,
1078 struct drm_vmw_rect *clips,
1079 uint32_t num_clips)
1080{
35c05125 1081 int ret;
2fcd5a73 1082
6bf6bf03
TH
1083 switch (dev_priv->active_display_unit) {
1084 case vmw_du_screen_target:
1085 ret = vmw_kms_stdu_surface_dirty(dev_priv, vfb, NULL, clips,
1086 &surface->res, destX, destY,
1087 num_clips, 1, NULL);
1088 break;
1089 case vmw_du_screen_object:
1090 ret = vmw_kms_generic_present(dev_priv, file_priv, vfb, surface,
1091 sid, destX, destY, clips,
1092 num_clips);
1093 break;
1094 default:
1095 WARN_ONCE(true,
1096 "Present called with invalid display system.\n");
1097 ret = -ENOSYS;
1098 break;
2fcd5a73 1099 }
35c05125
SY
1100 if (ret)
1101 return ret;
2fcd5a73 1102
35c05125 1103 vmw_fifo_flush(dev_priv, false);
2fcd5a73 1104
35c05125 1105 return 0;
2fcd5a73
JB
1106}
1107
fb1d9738
JB
1108int vmw_kms_init(struct vmw_private *dev_priv)
1109{
1110 struct drm_device *dev = dev_priv->dev;
1111 int ret;
1112
1113 drm_mode_config_init(dev);
1114 dev->mode_config.funcs = &vmw_kms_funcs;
3bef3572
JB
1115 dev->mode_config.min_width = 1;
1116 dev->mode_config.min_height = 1;
65ade7d3
SY
1117 dev->mode_config.max_width = dev_priv->texture_max_width;
1118 dev->mode_config.max_height = dev_priv->texture_max_height;
fb1d9738 1119
35c05125
SY
1120 ret = vmw_kms_stdu_init_display(dev_priv);
1121 if (ret) {
1122 ret = vmw_kms_sou_init_display(dev_priv);
1123 if (ret) /* Fallback */
1124 ret = vmw_kms_ldu_init_display(dev_priv);
1125 }
fb1d9738 1126
c8261a96 1127 return ret;
fb1d9738
JB
1128}
1129
1130int vmw_kms_close(struct vmw_private *dev_priv)
1131{
c8261a96
SY
1132 int ret;
1133
fb1d9738
JB
1134 /*
1135 * Docs says we should take the lock before calling this function
1136 * but since it destroys encoders and our destructor calls
1137 * drm_encoder_cleanup which takes the lock we deadlock.
1138 */
1139 drm_mode_config_cleanup(dev_priv->dev);
c8261a96
SY
1140 if (dev_priv->active_display_unit == vmw_du_screen_object)
1141 ret = vmw_kms_sou_close_display(dev_priv);
35c05125
SY
1142 else if (dev_priv->active_display_unit == vmw_du_screen_target)
1143 ret = vmw_kms_stdu_close_display(dev_priv);
c0d18316 1144 else
c8261a96
SY
1145 ret = vmw_kms_ldu_close_display(dev_priv);
1146
1147 return ret;
fb1d9738
JB
1148}
1149
1150int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
1151 struct drm_file *file_priv)
1152{
1153 struct drm_vmw_cursor_bypass_arg *arg = data;
1154 struct vmw_display_unit *du;
fb1d9738
JB
1155 struct drm_crtc *crtc;
1156 int ret = 0;
1157
1158
1159 mutex_lock(&dev->mode_config.mutex);
1160 if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) {
1161
1162 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
1163 du = vmw_crtc_to_du(crtc);
1164 du->hotspot_x = arg->xhot;
1165 du->hotspot_y = arg->yhot;
1166 }
1167
1168 mutex_unlock(&dev->mode_config.mutex);
1169 return 0;
1170 }
1171
a4cd5d68
RC
1172 crtc = drm_crtc_find(dev, arg->crtc_id);
1173 if (!crtc) {
4ae87ff0 1174 ret = -ENOENT;
fb1d9738
JB
1175 goto out;
1176 }
1177
fb1d9738
JB
1178 du = vmw_crtc_to_du(crtc);
1179
1180 du->hotspot_x = arg->xhot;
1181 du->hotspot_y = arg->yhot;
1182
1183out:
1184 mutex_unlock(&dev->mode_config.mutex);
1185
1186 return ret;
1187}
1188
0bef23f9 1189int vmw_kms_write_svga(struct vmw_private *vmw_priv,
d7e1958d 1190 unsigned width, unsigned height, unsigned pitch,
6558429b 1191 unsigned bpp, unsigned depth)
fb1d9738 1192{
d7e1958d
JB
1193 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1194 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch);
1195 else if (vmw_fifo_have_pitchlock(vmw_priv))
b76ff5ea
TH
1196 vmw_mmio_write(pitch, vmw_priv->mmio_virt +
1197 SVGA_FIFO_PITCHLOCK);
d7e1958d
JB
1198 vmw_write(vmw_priv, SVGA_REG_WIDTH, width);
1199 vmw_write(vmw_priv, SVGA_REG_HEIGHT, height);
6558429b 1200 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp);
0bef23f9
MD
1201
1202 if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) {
1203 DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n",
1204 depth, bpp, vmw_read(vmw_priv, SVGA_REG_DEPTH));
1205 return -EINVAL;
1206 }
1207
1208 return 0;
d7e1958d 1209}
fb1d9738 1210
d7e1958d
JB
1211int vmw_kms_save_vga(struct vmw_private *vmw_priv)
1212{
7c4f7780
TH
1213 struct vmw_vga_topology_state *save;
1214 uint32_t i;
1215
fb1d9738
JB
1216 vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH);
1217 vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT);
7c4f7780 1218 vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL);
d7e1958d
JB
1219 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1220 vmw_priv->vga_pitchlock =
7c4f7780 1221 vmw_read(vmw_priv, SVGA_REG_PITCHLOCK);
d7e1958d 1222 else if (vmw_fifo_have_pitchlock(vmw_priv))
b76ff5ea
TH
1223 vmw_priv->vga_pitchlock = vmw_mmio_read(vmw_priv->mmio_virt +
1224 SVGA_FIFO_PITCHLOCK);
7c4f7780
TH
1225
1226 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1227 return 0;
fb1d9738 1228
7c4f7780
TH
1229 vmw_priv->num_displays = vmw_read(vmw_priv,
1230 SVGA_REG_NUM_GUEST_DISPLAYS);
1231
029e50bf
TH
1232 if (vmw_priv->num_displays == 0)
1233 vmw_priv->num_displays = 1;
1234
7c4f7780
TH
1235 for (i = 0; i < vmw_priv->num_displays; ++i) {
1236 save = &vmw_priv->vga_save[i];
1237 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1238 save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY);
1239 save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X);
1240 save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y);
1241 save->width = vmw_read(vmw_priv, SVGA_REG_DISPLAY_WIDTH);
1242 save->height = vmw_read(vmw_priv, SVGA_REG_DISPLAY_HEIGHT);
1243 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
30c78bb8
TH
1244 if (i == 0 && vmw_priv->num_displays == 1 &&
1245 save->width == 0 && save->height == 0) {
1246
1247 /*
1248 * It should be fairly safe to assume that these
1249 * values are uninitialized.
1250 */
1251
1252 save->width = vmw_priv->vga_width - save->pos_x;
1253 save->height = vmw_priv->vga_height - save->pos_y;
1254 }
7c4f7780 1255 }
30c78bb8 1256
fb1d9738
JB
1257 return 0;
1258}
1259
1260int vmw_kms_restore_vga(struct vmw_private *vmw_priv)
1261{
7c4f7780
TH
1262 struct vmw_vga_topology_state *save;
1263 uint32_t i;
1264
fb1d9738
JB
1265 vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width);
1266 vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height);
7c4f7780 1267 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp);
d7e1958d
JB
1268 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1269 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK,
1270 vmw_priv->vga_pitchlock);
1271 else if (vmw_fifo_have_pitchlock(vmw_priv))
b76ff5ea
TH
1272 vmw_mmio_write(vmw_priv->vga_pitchlock,
1273 vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
fb1d9738 1274
7c4f7780
TH
1275 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1276 return 0;
1277
1278 for (i = 0; i < vmw_priv->num_displays; ++i) {
1279 save = &vmw_priv->vga_save[i];
1280 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1281 vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, save->primary);
1282 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, save->pos_x);
1283 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, save->pos_y);
1284 vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, save->width);
1285 vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, save->height);
1286 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
1287 }
1288
fb1d9738
JB
1289 return 0;
1290}
d8bd19d2 1291
e133e737
TH
1292bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv,
1293 uint32_t pitch,
1294 uint32_t height)
1295{
35c05125
SY
1296 return ((u64) pitch * (u64) height) < (u64)
1297 ((dev_priv->active_display_unit == vmw_du_screen_target) ?
1298 dev_priv->prim_bb_mem : dev_priv->vram_size);
e133e737
TH
1299}
1300
1c482ab3
JB
1301
1302/**
1303 * Function called by DRM code called with vbl_lock held.
1304 */
88e72717 1305u32 vmw_get_vblank_counter(struct drm_device *dev, unsigned int pipe)
7a1c2f6c
TH
1306{
1307 return 0;
1308}
626ab771 1309
1c482ab3
JB
1310/**
1311 * Function called by DRM code called with vbl_lock held.
1312 */
88e72717 1313int vmw_enable_vblank(struct drm_device *dev, unsigned int pipe)
1c482ab3
JB
1314{
1315 return -ENOSYS;
1316}
1317
1318/**
1319 * Function called by DRM code called with vbl_lock held.
1320 */
88e72717 1321void vmw_disable_vblank(struct drm_device *dev, unsigned int pipe)
1c482ab3
JB
1322{
1323}
1324
626ab771
JB
1325
1326/*
1327 * Small shared kms functions.
1328 */
1329
847c5964 1330static int vmw_du_update_layout(struct vmw_private *dev_priv, unsigned num,
626ab771
JB
1331 struct drm_vmw_rect *rects)
1332{
1333 struct drm_device *dev = dev_priv->dev;
1334 struct vmw_display_unit *du;
1335 struct drm_connector *con;
626ab771
JB
1336
1337 mutex_lock(&dev->mode_config.mutex);
1338
1339#if 0
6ea77d13
TH
1340 {
1341 unsigned int i;
1342
1343 DRM_INFO("%s: new layout ", __func__);
1344 for (i = 0; i < num; i++)
1345 DRM_INFO("(%i, %i %ux%u) ", rects[i].x, rects[i].y,
1346 rects[i].w, rects[i].h);
1347 DRM_INFO("\n");
1348 }
626ab771
JB
1349#endif
1350
1351 list_for_each_entry(con, &dev->mode_config.connector_list, head) {
1352 du = vmw_connector_to_du(con);
1353 if (num > du->unit) {
1354 du->pref_width = rects[du->unit].w;
1355 du->pref_height = rects[du->unit].h;
1356 du->pref_active = true;
cd2b89e7
TH
1357 du->gui_x = rects[du->unit].x;
1358 du->gui_y = rects[du->unit].y;
626ab771
JB
1359 } else {
1360 du->pref_width = 800;
1361 du->pref_height = 600;
1362 du->pref_active = false;
1363 }
1364 con->status = vmw_du_connector_detect(con, true);
1365 }
1366
1367 mutex_unlock(&dev->mode_config.mutex);
1368
1369 return 0;
1370}
1371
1372void vmw_du_crtc_save(struct drm_crtc *crtc)
1373{
1374}
1375
1376void vmw_du_crtc_restore(struct drm_crtc *crtc)
1377{
1378}
1379
1380void vmw_du_crtc_gamma_set(struct drm_crtc *crtc,
1381 u16 *r, u16 *g, u16 *b,
1382 uint32_t start, uint32_t size)
1383{
1384 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
1385 int i;
1386
1387 for (i = 0; i < size; i++) {
1388 DRM_DEBUG("%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n", i,
1389 r[i], g[i], b[i]);
1390 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 0, r[i] >> 8);
1391 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 1, g[i] >> 8);
1392 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 2, b[i] >> 8);
1393 }
1394}
1395
9a69a9ac 1396int vmw_du_connector_dpms(struct drm_connector *connector, int mode)
626ab771 1397{
9a69a9ac 1398 return 0;
626ab771
JB
1399}
1400
1401void vmw_du_connector_save(struct drm_connector *connector)
1402{
1403}
1404
1405void vmw_du_connector_restore(struct drm_connector *connector)
1406{
1407}
1408
1409enum drm_connector_status
1410vmw_du_connector_detect(struct drm_connector *connector, bool force)
1411{
1412 uint32_t num_displays;
1413 struct drm_device *dev = connector->dev;
1414 struct vmw_private *dev_priv = vmw_priv(dev);
cd2b89e7 1415 struct vmw_display_unit *du = vmw_connector_to_du(connector);
626ab771 1416
626ab771 1417 num_displays = vmw_read(dev_priv, SVGA_REG_NUM_DISPLAYS);
626ab771 1418
cd2b89e7
TH
1419 return ((vmw_connector_to_du(connector)->unit < num_displays &&
1420 du->pref_active) ?
626ab771
JB
1421 connector_status_connected : connector_status_disconnected);
1422}
1423
1424static struct drm_display_mode vmw_kms_connector_builtin[] = {
1425 /* 640x480@60Hz */
1426 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
1427 752, 800, 0, 480, 489, 492, 525, 0,
1428 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1429 /* 800x600@60Hz */
1430 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
1431 968, 1056, 0, 600, 601, 605, 628, 0,
1432 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1433 /* 1024x768@60Hz */
1434 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
1435 1184, 1344, 0, 768, 771, 777, 806, 0,
1436 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1437 /* 1152x864@75Hz */
1438 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
1439 1344, 1600, 0, 864, 865, 868, 900, 0,
1440 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1441 /* 1280x768@60Hz */
1442 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
1443 1472, 1664, 0, 768, 771, 778, 798, 0,
1444 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1445 /* 1280x800@60Hz */
1446 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
1447 1480, 1680, 0, 800, 803, 809, 831, 0,
1448 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1449 /* 1280x960@60Hz */
1450 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
1451 1488, 1800, 0, 960, 961, 964, 1000, 0,
1452 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1453 /* 1280x1024@60Hz */
1454 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
1455 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
1456 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1457 /* 1360x768@60Hz */
1458 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
1459 1536, 1792, 0, 768, 771, 777, 795, 0,
1460 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1461 /* 1440x1050@60Hz */
1462 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
1463 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
1464 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1465 /* 1440x900@60Hz */
1466 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
1467 1672, 1904, 0, 900, 903, 909, 934, 0,
1468 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1469 /* 1600x1200@60Hz */
1470 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
1471 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
1472 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1473 /* 1680x1050@60Hz */
1474 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
1475 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
1476 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1477 /* 1792x1344@60Hz */
1478 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
1479 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
1480 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1481 /* 1853x1392@60Hz */
1482 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
1483 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
1484 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1485 /* 1920x1200@60Hz */
1486 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
1487 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
1488 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1489 /* 1920x1440@60Hz */
1490 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
1491 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
1492 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1493 /* 2560x1600@60Hz */
1494 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
1495 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
1496 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1497 /* Terminate */
1498 { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) },
1499};
1500
1543b4dd
TH
1501/**
1502 * vmw_guess_mode_timing - Provide fake timings for a
1503 * 60Hz vrefresh mode.
1504 *
1505 * @mode - Pointer to a struct drm_display_mode with hdisplay and vdisplay
1506 * members filled in.
1507 */
a278724a 1508void vmw_guess_mode_timing(struct drm_display_mode *mode)
1543b4dd
TH
1509{
1510 mode->hsync_start = mode->hdisplay + 50;
1511 mode->hsync_end = mode->hsync_start + 50;
1512 mode->htotal = mode->hsync_end + 50;
1513
1514 mode->vsync_start = mode->vdisplay + 50;
1515 mode->vsync_end = mode->vsync_start + 50;
1516 mode->vtotal = mode->vsync_end + 50;
1517
1518 mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6;
1519 mode->vrefresh = drm_mode_vrefresh(mode);
1520}
1521
1522
626ab771
JB
1523int vmw_du_connector_fill_modes(struct drm_connector *connector,
1524 uint32_t max_width, uint32_t max_height)
1525{
1526 struct vmw_display_unit *du = vmw_connector_to_du(connector);
1527 struct drm_device *dev = connector->dev;
1528 struct vmw_private *dev_priv = vmw_priv(dev);
1529 struct drm_display_mode *mode = NULL;
1530 struct drm_display_mode *bmode;
1531 struct drm_display_mode prefmode = { DRM_MODE("preferred",
1532 DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1533 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1534 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC)
1535 };
1536 int i;
9a72384d
SY
1537 u32 assumed_bpp = 2;
1538
1539 /*
1540 * If using screen objects, then assume 32-bpp because that's what the
1541 * SVGA device is assuming
1542 */
c8261a96 1543 if (dev_priv->active_display_unit == vmw_du_screen_object)
9a72384d 1544 assumed_bpp = 4;
626ab771 1545
35c05125
SY
1546 if (dev_priv->active_display_unit == vmw_du_screen_target) {
1547 max_width = min(max_width, dev_priv->stdu_max_width);
1548 max_height = min(max_height, dev_priv->stdu_max_height);
1549 }
1550
626ab771 1551 /* Add preferred mode */
c8261a96
SY
1552 mode = drm_mode_duplicate(dev, &prefmode);
1553 if (!mode)
1554 return 0;
1555 mode->hdisplay = du->pref_width;
1556 mode->vdisplay = du->pref_height;
1557 vmw_guess_mode_timing(mode);
626ab771 1558
c8261a96
SY
1559 if (vmw_kms_validate_mode_vram(dev_priv,
1560 mode->hdisplay * assumed_bpp,
1561 mode->vdisplay)) {
1562 drm_mode_probed_add(connector, mode);
1563 } else {
1564 drm_mode_destroy(dev, mode);
1565 mode = NULL;
1566 }
55bde5b2 1567
c8261a96
SY
1568 if (du->pref_mode) {
1569 list_del_init(&du->pref_mode->head);
1570 drm_mode_destroy(dev, du->pref_mode);
626ab771
JB
1571 }
1572
c8261a96
SY
1573 /* mode might be null here, this is intended */
1574 du->pref_mode = mode;
1575
626ab771
JB
1576 for (i = 0; vmw_kms_connector_builtin[i].type != 0; i++) {
1577 bmode = &vmw_kms_connector_builtin[i];
1578 if (bmode->hdisplay > max_width ||
1579 bmode->vdisplay > max_height)
1580 continue;
1581
9a72384d
SY
1582 if (!vmw_kms_validate_mode_vram(dev_priv,
1583 bmode->hdisplay * assumed_bpp,
626ab771
JB
1584 bmode->vdisplay))
1585 continue;
1586
1587 mode = drm_mode_duplicate(dev, bmode);
1588 if (!mode)
1589 return 0;
1590 mode->vrefresh = drm_mode_vrefresh(mode);
1591
1592 drm_mode_probed_add(connector, mode);
1593 }
1594
b87577b7 1595 drm_mode_connector_list_update(connector, true);
f6b05004
TH
1596 /* Move the prefered mode first, help apps pick the right mode. */
1597 drm_mode_sort(&connector->modes);
626ab771
JB
1598
1599 return 1;
1600}
1601
1602int vmw_du_connector_set_property(struct drm_connector *connector,
1603 struct drm_property *property,
1604 uint64_t val)
1605{
1606 return 0;
1607}
cd2b89e7
TH
1608
1609
1610int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
1611 struct drm_file *file_priv)
1612{
1613 struct vmw_private *dev_priv = vmw_priv(dev);
1614 struct drm_vmw_update_layout_arg *arg =
1615 (struct drm_vmw_update_layout_arg *)data;
cd2b89e7
TH
1616 void __user *user_rects;
1617 struct drm_vmw_rect *rects;
1618 unsigned rects_size;
1619 int ret;
1620 int i;
65ade7d3 1621 u64 total_pixels = 0;
cd2b89e7 1622 struct drm_mode_config *mode_config = &dev->mode_config;
c8261a96 1623 struct drm_vmw_rect bounding_box = {0};
cd2b89e7 1624
cd2b89e7
TH
1625 if (!arg->num_outputs) {
1626 struct drm_vmw_rect def_rect = {0, 0, 800, 600};
1627 vmw_du_update_layout(dev_priv, 1, &def_rect);
5151adb3 1628 return 0;
cd2b89e7
TH
1629 }
1630
1631 rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect);
bab9efc2
XW
1632 rects = kcalloc(arg->num_outputs, sizeof(struct drm_vmw_rect),
1633 GFP_KERNEL);
5151adb3
TH
1634 if (unlikely(!rects))
1635 return -ENOMEM;
cd2b89e7
TH
1636
1637 user_rects = (void __user *)(unsigned long)arg->rects;
1638 ret = copy_from_user(rects, user_rects, rects_size);
1639 if (unlikely(ret != 0)) {
1640 DRM_ERROR("Failed to get rects.\n");
1641 ret = -EFAULT;
1642 goto out_free;
1643 }
1644
1645 for (i = 0; i < arg->num_outputs; ++i) {
bab9efc2
XW
1646 if (rects[i].x < 0 ||
1647 rects[i].y < 0 ||
1648 rects[i].x + rects[i].w > mode_config->max_width ||
1649 rects[i].y + rects[i].h > mode_config->max_height) {
cd2b89e7
TH
1650 DRM_ERROR("Invalid GUI layout.\n");
1651 ret = -EINVAL;
1652 goto out_free;
1653 }
c8261a96
SY
1654
1655 /*
1656 * bounding_box.w and bunding_box.h are used as
1657 * lower-right coordinates
1658 */
1659 if (rects[i].x + rects[i].w > bounding_box.w)
1660 bounding_box.w = rects[i].x + rects[i].w;
1661
1662 if (rects[i].y + rects[i].h > bounding_box.h)
1663 bounding_box.h = rects[i].y + rects[i].h;
65ade7d3
SY
1664
1665 total_pixels += (u64) rects[i].w * (u64) rects[i].h;
cd2b89e7
TH
1666 }
1667
65ade7d3
SY
1668 if (dev_priv->active_display_unit == vmw_du_screen_target) {
1669 /*
1670 * For Screen Targets, the limits for a toplogy are:
1671 * 1. Bounding box (assuming 32bpp) must be < prim_bb_mem
1672 * 2. Total pixels (assuming 32bpp) must be < prim_bb_mem
1673 */
1674 u64 bb_mem = bounding_box.w * bounding_box.h * 4;
1675 u64 pixel_mem = total_pixels * 4;
1676
1677 if (bb_mem > dev_priv->prim_bb_mem) {
1678 DRM_ERROR("Topology is beyond supported limits.\n");
35c05125
SY
1679 ret = -EINVAL;
1680 goto out_free;
1681 }
1682
65ade7d3
SY
1683 if (pixel_mem > dev_priv->prim_bb_mem) {
1684 DRM_ERROR("Combined output size too large\n");
1685 ret = -EINVAL;
1686 goto out_free;
1687 }
cd2b89e7
TH
1688 }
1689
1690 vmw_du_update_layout(dev_priv, arg->num_outputs, rects);
1691
1692out_free:
1693 kfree(rects);
cd2b89e7
TH
1694 return ret;
1695}
1a4b172a
TH
1696
1697/**
1698 * vmw_kms_helper_dirty - Helper to build commands and perform actions based
1699 * on a set of cliprects and a set of display units.
1700 *
1701 * @dev_priv: Pointer to a device private structure.
1702 * @framebuffer: Pointer to the framebuffer on which to perform the actions.
1703 * @clips: A set of struct drm_clip_rect. Either this os @vclips must be NULL.
1704 * Cliprects are given in framebuffer coordinates.
1705 * @vclips: A set of struct drm_vmw_rect cliprects. Either this or @clips must
1706 * be NULL. Cliprects are given in source coordinates.
1707 * @dest_x: X coordinate offset for the crtc / destination clip rects.
1708 * @dest_y: Y coordinate offset for the crtc / destination clip rects.
1709 * @num_clips: Number of cliprects in the @clips or @vclips array.
1710 * @increment: Integer with which to increment the clip counter when looping.
1711 * Used to skip a predetermined number of clip rects.
1712 * @dirty: Closure structure. See the description of struct vmw_kms_dirty.
1713 */
1714int vmw_kms_helper_dirty(struct vmw_private *dev_priv,
1715 struct vmw_framebuffer *framebuffer,
1716 const struct drm_clip_rect *clips,
1717 const struct drm_vmw_rect *vclips,
1718 s32 dest_x, s32 dest_y,
1719 int num_clips,
1720 int increment,
1721 struct vmw_kms_dirty *dirty)
1722{
1723 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
1724 struct drm_crtc *crtc;
1725 u32 num_units = 0;
1726 u32 i, k;
1a4b172a
TH
1727
1728 dirty->dev_priv = dev_priv;
1729
1730 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
1731 if (crtc->primary->fb != &framebuffer->base)
1732 continue;
1733 units[num_units++] = vmw_crtc_to_du(crtc);
1734 }
1735
1736 for (k = 0; k < num_units; k++) {
1737 struct vmw_display_unit *unit = units[k];
1738 s32 crtc_x = unit->crtc.x;
1739 s32 crtc_y = unit->crtc.y;
1740 s32 crtc_width = unit->crtc.mode.hdisplay;
1741 s32 crtc_height = unit->crtc.mode.vdisplay;
1742 const struct drm_clip_rect *clips_ptr = clips;
1743 const struct drm_vmw_rect *vclips_ptr = vclips;
1744
1745 dirty->unit = unit;
1746 if (dirty->fifo_reserve_size > 0) {
1747 dirty->cmd = vmw_fifo_reserve(dev_priv,
1748 dirty->fifo_reserve_size);
1749 if (!dirty->cmd) {
1750 DRM_ERROR("Couldn't reserve fifo space "
1751 "for dirty blits.\n");
f3b8c0ca 1752 return -ENOMEM;
1a4b172a
TH
1753 }
1754 memset(dirty->cmd, 0, dirty->fifo_reserve_size);
1755 }
1756 dirty->num_hits = 0;
1757 for (i = 0; i < num_clips; i++, clips_ptr += increment,
1758 vclips_ptr += increment) {
1759 s32 clip_left;
1760 s32 clip_top;
1761
1762 /*
1763 * Select clip array type. Note that integer type
1764 * in @clips is unsigned short, whereas in @vclips
1765 * it's 32-bit.
1766 */
1767 if (clips) {
1768 dirty->fb_x = (s32) clips_ptr->x1;
1769 dirty->fb_y = (s32) clips_ptr->y1;
1770 dirty->unit_x2 = (s32) clips_ptr->x2 + dest_x -
1771 crtc_x;
1772 dirty->unit_y2 = (s32) clips_ptr->y2 + dest_y -
1773 crtc_y;
1774 } else {
1775 dirty->fb_x = vclips_ptr->x;
1776 dirty->fb_y = vclips_ptr->y;
1777 dirty->unit_x2 = dirty->fb_x + vclips_ptr->w +
1778 dest_x - crtc_x;
1779 dirty->unit_y2 = dirty->fb_y + vclips_ptr->h +
1780 dest_y - crtc_y;
1781 }
1782
1783 dirty->unit_x1 = dirty->fb_x + dest_x - crtc_x;
1784 dirty->unit_y1 = dirty->fb_y + dest_y - crtc_y;
1785
1786 /* Skip this clip if it's outside the crtc region */
1787 if (dirty->unit_x1 >= crtc_width ||
1788 dirty->unit_y1 >= crtc_height ||
1789 dirty->unit_x2 <= 0 || dirty->unit_y2 <= 0)
1790 continue;
1791
1792 /* Clip right and bottom to crtc limits */
1793 dirty->unit_x2 = min_t(s32, dirty->unit_x2,
1794 crtc_width);
1795 dirty->unit_y2 = min_t(s32, dirty->unit_y2,
1796 crtc_height);
1797
1798 /* Clip left and top to crtc limits */
1799 clip_left = min_t(s32, dirty->unit_x1, 0);
1800 clip_top = min_t(s32, dirty->unit_y1, 0);
1801 dirty->unit_x1 -= clip_left;
1802 dirty->unit_y1 -= clip_top;
1803 dirty->fb_x -= clip_left;
1804 dirty->fb_y -= clip_top;
1805
1806 dirty->clip(dirty);
1807 }
1808
1809 dirty->fifo_commit(dirty);
1810 }
1811
1812 return 0;
1813}
1814
1815/**
1816 * vmw_kms_helper_buffer_prepare - Reserve and validate a buffer object before
1817 * command submission.
1818 *
1819 * @dev_priv. Pointer to a device private structure.
1820 * @buf: The buffer object
1821 * @interruptible: Whether to perform waits as interruptible.
1822 * @validate_as_mob: Whether the buffer should be validated as a MOB. If false,
1823 * The buffer will be validated as a GMR. Already pinned buffers will not be
1824 * validated.
1825 *
1826 * Returns 0 on success, negative error code on failure, -ERESTARTSYS if
1827 * interrupted by a signal.
1828 */
1829int vmw_kms_helper_buffer_prepare(struct vmw_private *dev_priv,
1830 struct vmw_dma_buffer *buf,
1831 bool interruptible,
1832 bool validate_as_mob)
1833{
1834 struct ttm_buffer_object *bo = &buf->base;
1835 int ret;
1836
b9eb1a61 1837 ttm_bo_reserve(bo, false, false, interruptible, NULL);
1a4b172a
TH
1838 ret = vmw_validate_single_buffer(dev_priv, bo, interruptible,
1839 validate_as_mob);
1840 if (ret)
1841 ttm_bo_unreserve(bo);
1842
1843 return ret;
1844}
1845
1846/**
1847 * vmw_kms_helper_buffer_revert - Undo the actions of
1848 * vmw_kms_helper_buffer_prepare.
1849 *
1850 * @res: Pointer to the buffer object.
1851 *
1852 * Helper to be used if an error forces the caller to undo the actions of
1853 * vmw_kms_helper_buffer_prepare.
1854 */
1855void vmw_kms_helper_buffer_revert(struct vmw_dma_buffer *buf)
1856{
1857 if (buf)
1858 ttm_bo_unreserve(&buf->base);
1859}
1860
1861/**
1862 * vmw_kms_helper_buffer_finish - Unreserve and fence a buffer object after
1863 * kms command submission.
1864 *
1865 * @dev_priv: Pointer to a device private structure.
1866 * @file_priv: Pointer to a struct drm_file representing the caller's
1867 * connection. Must be set to NULL if @user_fence_rep is NULL, and conversely
1868 * if non-NULL, @user_fence_rep must be non-NULL.
1869 * @buf: The buffer object.
1870 * @out_fence: Optional pointer to a fence pointer. If non-NULL, a
1871 * ref-counted fence pointer is returned here.
1872 * @user_fence_rep: Optional pointer to a user-space provided struct
1873 * drm_vmw_fence_rep. If provided, @file_priv must also be provided and the
1874 * function copies fence data to user-space in a fail-safe manner.
1875 */
1876void vmw_kms_helper_buffer_finish(struct vmw_private *dev_priv,
1877 struct drm_file *file_priv,
1878 struct vmw_dma_buffer *buf,
1879 struct vmw_fence_obj **out_fence,
1880 struct drm_vmw_fence_rep __user *
1881 user_fence_rep)
1882{
1883 struct vmw_fence_obj *fence;
1884 uint32_t handle;
1885 int ret;
1886
1887 ret = vmw_execbuf_fence_commands(file_priv, dev_priv, &fence,
1888 file_priv ? &handle : NULL);
1889 if (buf)
1890 vmw_fence_single_bo(&buf->base, fence);
1891 if (file_priv)
1892 vmw_execbuf_copy_fence_user(dev_priv, vmw_fpriv(file_priv),
1893 ret, user_fence_rep, fence,
1894 handle);
1895 if (out_fence)
1896 *out_fence = fence;
1897 else
1898 vmw_fence_obj_unreference(&fence);
1899
1900 vmw_kms_helper_buffer_revert(buf);
1901}
1902
1903
1904/**
1905 * vmw_kms_helper_resource_revert - Undo the actions of
1906 * vmw_kms_helper_resource_prepare.
1907 *
1908 * @res: Pointer to the resource. Typically a surface.
1909 *
1910 * Helper to be used if an error forces the caller to undo the actions of
1911 * vmw_kms_helper_resource_prepare.
1912 */
1913void vmw_kms_helper_resource_revert(struct vmw_resource *res)
1914{
1915 vmw_kms_helper_buffer_revert(res->backup);
d80efd5c 1916 vmw_resource_unreserve(res, false, NULL, 0);
1a4b172a
TH
1917 mutex_unlock(&res->dev_priv->cmdbuf_mutex);
1918}
1919
1920/**
1921 * vmw_kms_helper_resource_prepare - Reserve and validate a resource before
1922 * command submission.
1923 *
1924 * @res: Pointer to the resource. Typically a surface.
1925 * @interruptible: Whether to perform waits as interruptible.
1926 *
1927 * Reserves and validates also the backup buffer if a guest-backed resource.
1928 * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
1929 * interrupted by a signal.
1930 */
1931int vmw_kms_helper_resource_prepare(struct vmw_resource *res,
1932 bool interruptible)
1933{
1934 int ret = 0;
1935
1936 if (interruptible)
1937 ret = mutex_lock_interruptible(&res->dev_priv->cmdbuf_mutex);
1938 else
1939 mutex_lock(&res->dev_priv->cmdbuf_mutex);
1940
1941 if (unlikely(ret != 0))
1942 return -ERESTARTSYS;
1943
1944 ret = vmw_resource_reserve(res, interruptible, false);
1945 if (ret)
1946 goto out_unlock;
1947
1948 if (res->backup) {
1949 ret = vmw_kms_helper_buffer_prepare(res->dev_priv, res->backup,
1950 interruptible,
1951 res->dev_priv->has_mob);
1952 if (ret)
1953 goto out_unreserve;
1954 }
1955 ret = vmw_resource_validate(res);
1956 if (ret)
1957 goto out_revert;
1958 return 0;
1959
1960out_revert:
1961 vmw_kms_helper_buffer_revert(res->backup);
1962out_unreserve:
d80efd5c 1963 vmw_resource_unreserve(res, false, NULL, 0);
1a4b172a
TH
1964out_unlock:
1965 mutex_unlock(&res->dev_priv->cmdbuf_mutex);
1966 return ret;
1967}
1968
1969/**
1970 * vmw_kms_helper_resource_finish - Unreserve and fence a resource after
1971 * kms command submission.
1972 *
1973 * @res: Pointer to the resource. Typically a surface.
1974 * @out_fence: Optional pointer to a fence pointer. If non-NULL, a
1975 * ref-counted fence pointer is returned here.
1976 */
1977void vmw_kms_helper_resource_finish(struct vmw_resource *res,
1978 struct vmw_fence_obj **out_fence)
1979{
1980 if (res->backup || out_fence)
1981 vmw_kms_helper_buffer_finish(res->dev_priv, NULL, res->backup,
1982 out_fence, NULL);
1983
d80efd5c 1984 vmw_resource_unreserve(res, false, NULL, 0);
1a4b172a
TH
1985 mutex_unlock(&res->dev_priv->cmdbuf_mutex);
1986}
6bf6bf03
TH
1987
1988/**
1989 * vmw_kms_update_proxy - Helper function to update a proxy surface from
1990 * its backing MOB.
1991 *
1992 * @res: Pointer to the surface resource
1993 * @clips: Clip rects in framebuffer (surface) space.
1994 * @num_clips: Number of clips in @clips.
1995 * @increment: Integer with which to increment the clip counter when looping.
1996 * Used to skip a predetermined number of clip rects.
1997 *
1998 * This function makes sure the proxy surface is updated from its backing MOB
1999 * using the region given by @clips. The surface resource @res and its backing
2000 * MOB needs to be reserved and validated on call.
2001 */
2002int vmw_kms_update_proxy(struct vmw_resource *res,
2003 const struct drm_clip_rect *clips,
2004 unsigned num_clips,
2005 int increment)
2006{
2007 struct vmw_private *dev_priv = res->dev_priv;
2008 struct drm_vmw_size *size = &vmw_res_to_srf(res)->base_size;
2009 struct {
2010 SVGA3dCmdHeader header;
2011 SVGA3dCmdUpdateGBImage body;
2012 } *cmd;
2013 SVGA3dBox *box;
2014 size_t copy_size = 0;
2015 int i;
2016
2017 if (!clips)
2018 return 0;
2019
2020 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd) * num_clips);
2021 if (!cmd) {
2022 DRM_ERROR("Couldn't reserve fifo space for proxy surface "
2023 "update.\n");
2024 return -ENOMEM;
2025 }
2026
2027 for (i = 0; i < num_clips; ++i, clips += increment, ++cmd) {
2028 box = &cmd->body.box;
2029
2030 cmd->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE;
2031 cmd->header.size = sizeof(cmd->body);
2032 cmd->body.image.sid = res->id;
2033 cmd->body.image.face = 0;
2034 cmd->body.image.mipmap = 0;
2035
2036 if (clips->x1 > size->width || clips->x2 > size->width ||
2037 clips->y1 > size->height || clips->y2 > size->height) {
2038 DRM_ERROR("Invalid clips outsize of framebuffer.\n");
2039 return -EINVAL;
2040 }
2041
2042 box->x = clips->x1;
2043 box->y = clips->y1;
2044 box->z = 0;
2045 box->w = clips->x2 - clips->x1;
2046 box->h = clips->y2 - clips->y1;
2047 box->d = 1;
2048
2049 copy_size += sizeof(*cmd);
2050 }
2051
2052 vmw_fifo_commit(dev_priv, copy_size);
2053
2054 return 0;
2055}
a278724a
TH
2056
2057int vmw_kms_fbdev_init_data(struct vmw_private *dev_priv,
2058 unsigned unit,
2059 u32 max_width,
2060 u32 max_height,
2061 struct drm_connector **p_con,
2062 struct drm_crtc **p_crtc,
2063 struct drm_display_mode **p_mode)
2064{
2065 struct drm_connector *con;
2066 struct vmw_display_unit *du;
2067 struct drm_display_mode *mode;
2068 int i = 0;
2069
2070 list_for_each_entry(con, &dev_priv->dev->mode_config.connector_list,
2071 head) {
2072 if (i == unit)
2073 break;
2074
2075 ++i;
2076 }
2077
2078 if (i != unit) {
2079 DRM_ERROR("Could not find initial display unit.\n");
2080 return -EINVAL;
2081 }
2082
2083 if (list_empty(&con->modes))
2084 (void) vmw_du_connector_fill_modes(con, max_width, max_height);
2085
2086 if (list_empty(&con->modes)) {
2087 DRM_ERROR("Could not find initial display mode.\n");
2088 return -EINVAL;
2089 }
2090
2091 du = vmw_connector_to_du(con);
2092 *p_con = con;
2093 *p_crtc = &du->crtc;
2094
2095 list_for_each_entry(mode, &con->modes, head) {
2096 if (mode->type & DRM_MODE_TYPE_PREFERRED)
2097 break;
2098 }
2099
2100 if (mode->type & DRM_MODE_TYPE_PREFERRED)
2101 *p_mode = mode;
2102 else {
2103 WARN_ONCE(true, "Could not find initial preferred mode.\n");
2104 *p_mode = list_first_entry(&con->modes,
2105 struct drm_display_mode,
2106 head);
2107 }
2108
2109 return 0;
2110}