[people/ms/u-boot.git] / arch / arm / mach-imx / hab.c

/*
 * Copyright (C) 2010-2015 Freescale Semiconductor, Inc.
 *
 * SPDX-License-Identifier:    GPL-2.0+
 */

#include <common.h>
#include <config.h>
#include <fuse.h>
#include <asm/io.h>
#include <asm/system.h>
#include <asm/arch/clock.h>
#include <asm/arch/sys_proto.h>
#include <asm/mach-imx/hab.h>

/* -------- start of HAB API updates ------------*/

#define hab_rvt_report_event_p					\
(								\
	(is_mx6dqp()) ?						\
	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) :	\
	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?		\
	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) :	\
	(is_mx6sdl() &&	(soc_rev() >= CHIP_REV_1_2)) ?		\
	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) :	\
	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT)	\
)

#define hab_rvt_report_status_p					\
(								\
	(is_mx6dqp()) ?						\
	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?		\
	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
	(is_mx6sdl() &&	(soc_rev() >= CHIP_REV_1_2)) ?		\
	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS)	\
)

#define hab_rvt_authenticate_image_p				\
(								\
	(is_mx6dqp()) ?						\
	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?		\
	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
	(is_mx6sdl() &&	(soc_rev() >= CHIP_REV_1_2)) ?		\
	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE)	\
)

#define hab_rvt_entry_p						\
(								\
	(is_mx6dqp()) ?						\
	((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) :		\
	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?		\
	((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) :		\
	(is_mx6sdl() &&	(soc_rev() >= CHIP_REV_1_2)) ?		\
	((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) :		\
	((hab_rvt_entry_t *)HAB_RVT_ENTRY)			\
)

#define hab_rvt_exit_p						\
(								\
	(is_mx6dqp()) ?						\
	((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) :			\
	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?		\
	((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) :			\
	(is_mx6sdl() &&	(soc_rev() >= CHIP_REV_1_2)) ?		\
	((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) :			\
	((hab_rvt_exit_t *)HAB_RVT_EXIT)			\
)

#define ALIGN_SIZE		0x1000
#define MX6DQ_PU_IROM_MMU_EN_VAR	0x009024a8
#define MX6DLS_PU_IROM_MMU_EN_VAR	0x00901dd0
#define MX6SL_PU_IROM_MMU_EN_VAR	0x00900a18
#define IS_HAB_ENABLED_BIT \
	(is_soc_type(MXC_SOC_MX7ULP) ? 0x80000000 :	\
	 (is_soc_type(MXC_SOC_MX7) ? 0x2000000 : 0x2))

static bool is_hab_enabled(void);

#if !defined(CONFIG_SPL_BUILD)

#define MAX_RECORD_BYTES     (8*1024) /* 4 kbytes */

struct record {
	uint8_t  tag;						/* Tag */
	uint8_t  len[2];					/* Length */
	uint8_t  par;						/* Version */
	uint8_t  contents[MAX_RECORD_BYTES];/* Record Data */
	bool	 any_rec_flag;
};

char *rsn_str[] = {"RSN = HAB_RSN_ANY (0x00)\n",
				   "RSN = HAB_ENG_FAIL (0x30)\n",
				   "RSN = HAB_INV_ADDRESS (0x22)\n",
				   "RSN = HAB_INV_ASSERTION (0x0C)\n",
				   "RSN = HAB_INV_CALL (0x28)\n",
				   "RSN = HAB_INV_CERTIFICATE (0x21)\n",
				   "RSN = HAB_INV_COMMAND (0x06)\n",
				   "RSN = HAB_INV_CSF (0x11)\n",
				   "RSN = HAB_INV_DCD (0x27)\n",
				   "RSN = HAB_INV_INDEX (0x0F)\n",
				   "RSN = HAB_INV_IVT (0x05)\n",
				   "RSN = HAB_INV_KEY (0x1D)\n",
				   "RSN = HAB_INV_RETURN (0x1E)\n",
				   "RSN = HAB_INV_SIGNATURE (0x18)\n",
				   "RSN = HAB_INV_SIZE (0x17)\n",
				   "RSN = HAB_MEM_FAIL (0x2E)\n",
				   "RSN = HAB_OVR_COUNT (0x2B)\n",
				   "RSN = HAB_OVR_STORAGE (0x2D)\n",
				   "RSN = HAB_UNS_ALGORITHM (0x12)\n",
				   "RSN = HAB_UNS_COMMAND (0x03)\n",
				   "RSN = HAB_UNS_ENGINE (0x0A)\n",
				   "RSN = HAB_UNS_ITEM (0x24)\n",
				   "RSN = HAB_UNS_KEY (0x1B)\n",
				   "RSN = HAB_UNS_PROTOCOL (0x14)\n",
				   "RSN = HAB_UNS_STATE (0x09)\n",
				   "RSN = INVALID\n",
				   NULL};

char *sts_str[] = {"STS = HAB_SUCCESS (0xF0)\n",
				   "STS = HAB_FAILURE (0x33)\n",
				   "STS = HAB_WARNING (0x69)\n",
				   "STS = INVALID\n",
				   NULL};

char *eng_str[] = {"ENG = HAB_ENG_ANY (0x00)\n",
				   "ENG = HAB_ENG_SCC (0x03)\n",
				   "ENG = HAB_ENG_RTIC (0x05)\n",
				   "ENG = HAB_ENG_SAHARA (0x06)\n",
				   "ENG = HAB_ENG_CSU (0x0A)\n",
				   "ENG = HAB_ENG_SRTC (0x0C)\n",
				   "ENG = HAB_ENG_DCP (0x1B)\n",
				   "ENG = HAB_ENG_CAAM (0x1D)\n",
				   "ENG = HAB_ENG_SNVS (0x1E)\n",
				   "ENG = HAB_ENG_OCOTP (0x21)\n",
				   "ENG = HAB_ENG_DTCP (0x22)\n",
				   "ENG = HAB_ENG_ROM (0x36)\n",
				   "ENG = HAB_ENG_HDCP (0x24)\n",
				   "ENG = HAB_ENG_RTL (0x77)\n",
				   "ENG = HAB_ENG_SW (0xFF)\n",
				   "ENG = INVALID\n",
				   NULL};

char *ctx_str[] = {"CTX = HAB_CTX_ANY(0x00)\n",
				   "CTX = HAB_CTX_FAB (0xFF)\n",
				   "CTX = HAB_CTX_ENTRY (0xE1)\n",
				   "CTX = HAB_CTX_TARGET (0x33)\n",
				   "CTX = HAB_CTX_AUTHENTICATE (0x0A)\n",
				   "CTX = HAB_CTX_DCD (0xDD)\n",
				   "CTX = HAB_CTX_CSF (0xCF)\n",
				   "CTX = HAB_CTX_COMMAND (0xC0)\n",
				   "CTX = HAB_CTX_AUT_DAT (0xDB)\n",
				   "CTX = HAB_CTX_ASSERT (0xA0)\n",
				   "CTX = HAB_CTX_EXIT (0xEE)\n",
				   "CTX = INVALID\n",
				   NULL};

uint8_t hab_statuses[5] = {
	HAB_STS_ANY,
	HAB_FAILURE,
	HAB_WARNING,
	HAB_SUCCESS,
	-1
};

uint8_t hab_reasons[26] = {
	HAB_RSN_ANY,
	HAB_ENG_FAIL,
	HAB_INV_ADDRESS,
	HAB_INV_ASSERTION,
	HAB_INV_CALL,
	HAB_INV_CERTIFICATE,
	HAB_INV_COMMAND,
	HAB_INV_CSF,
	HAB_INV_DCD,
	HAB_INV_INDEX,
	HAB_INV_IVT,
	HAB_INV_KEY,
	HAB_INV_RETURN,
	HAB_INV_SIGNATURE,
	HAB_INV_SIZE,
	HAB_MEM_FAIL,
	HAB_OVR_COUNT,
	HAB_OVR_STORAGE,
	HAB_UNS_ALGORITHM,
	HAB_UNS_COMMAND,
	HAB_UNS_ENGINE,
	HAB_UNS_ITEM,
	HAB_UNS_KEY,
	HAB_UNS_PROTOCOL,
	HAB_UNS_STATE,
	-1
};

uint8_t hab_contexts[12] = {
	HAB_CTX_ANY,
	HAB_CTX_FAB,
	HAB_CTX_ENTRY,
	HAB_CTX_TARGET,
	HAB_CTX_AUTHENTICATE,
	HAB_CTX_DCD,
	HAB_CTX_CSF,
	HAB_CTX_COMMAND,
	HAB_CTX_AUT_DAT,
	HAB_CTX_ASSERT,
	HAB_CTX_EXIT,
	-1
};

uint8_t hab_engines[16] = {
	HAB_ENG_ANY,
	HAB_ENG_SCC,
	HAB_ENG_RTIC,
	HAB_ENG_SAHARA,
	HAB_ENG_CSU,
	HAB_ENG_SRTC,
	HAB_ENG_DCP,
	HAB_ENG_CAAM,
	HAB_ENG_SNVS,
	HAB_ENG_OCOTP,
	HAB_ENG_DTCP,
	HAB_ENG_ROM,
	HAB_ENG_HDCP,
	HAB_ENG_RTL,
	HAB_ENG_SW,
	-1
};

static inline uint8_t get_idx(uint8_t *list, uint8_t tgt)
{
	uint8_t idx = 0;
	uint8_t element = list[idx];
	while (element != -1) {
		if (element == tgt)
			return idx;
		element = list[++idx];
	}
	return -1;
}

void process_event_record(uint8_t *event_data, size_t bytes)
{
	struct record *rec = (struct record *)event_data;

	printf("\n\n%s", sts_str[get_idx(hab_statuses, rec->contents[0])]);
	printf("%s", rsn_str[get_idx(hab_reasons, rec->contents[1])]);
	printf("%s", ctx_str[get_idx(hab_contexts, rec->contents[2])]);
	printf("%s", eng_str[get_idx(hab_engines, rec->contents[3])]);
}

void display_event(uint8_t *event_data, size_t bytes)
{
	uint32_t i;

	if (!(event_data && bytes > 0))
		return;

	for (i = 0; i < bytes; i++) {
		if (i == 0)
			printf("\t0x%02x", event_data[i]);
		else if ((i % 8) == 0)
			printf("\n\t0x%02x", event_data[i]);
		else
			printf(" 0x%02x", event_data[i]);
	}

	process_event_record(event_data, bytes);
}

int get_hab_status(void)
{
	uint32_t index = 0; /* Loop index */
	uint8_t event_data[128]; /* Event data buffer */
	size_t bytes = sizeof(event_data); /* Event size in bytes */
	enum hab_config config = 0;
	enum hab_state state = 0;
	hab_rvt_report_event_t *hab_rvt_report_event;
	hab_rvt_report_status_t *hab_rvt_report_status;

	hab_rvt_report_event = hab_rvt_report_event_p;
	hab_rvt_report_status = hab_rvt_report_status_p;

	if (is_hab_enabled())
		puts("\nSecure boot enabled\n");
	else
		puts("\nSecure boot disabled\n");

	/* Check HAB status */
	if (hab_rvt_report_status(&config, &state) != HAB_SUCCESS) {
		printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
		       config, state);

		/* Display HAB Error events */
		while (hab_rvt_report_event(HAB_FAILURE, index, event_data,
					&bytes) == HAB_SUCCESS) {
			puts("\n");
			printf("--------- HAB Event %d -----------------\n",
			       index + 1);
			puts("event data:\n");
			display_event(event_data, bytes);
			puts("\n");
			bytes = sizeof(event_data);
			index++;
		}
	}
	/* Display message if no HAB events are found */
	else {
		printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
		       config, state);
		puts("No HAB Events Found!\n\n");
	}
	return 0;
}

int do_hab_status(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	if ((argc != 1)) {
		cmd_usage(cmdtp);
		return 1;
	}

	get_hab_status();

	return 0;
}

static int do_authenticate_image(cmd_tbl_t *cmdtp, int flag, int argc,
				char * const argv[])
{
	ulong	addr, length, ivt_offset;
	int	rcode = 0;

	if (argc < 4)
		return CMD_RET_USAGE;

	addr = simple_strtoul(argv[1], NULL, 16);
	length = simple_strtoul(argv[2], NULL, 16);
	ivt_offset = simple_strtoul(argv[3], NULL, 16);

	rcode = authenticate_image(addr, length, ivt_offset);
	if (rcode == 0)
		rcode = CMD_RET_SUCCESS;
	else
		rcode = CMD_RET_FAILURE;

	return rcode;
}

U_BOOT_CMD(
		hab_status, CONFIG_SYS_MAXARGS, 1, do_hab_status,
		"display HAB status",
		""
	  );

U_BOOT_CMD(
		hab_auth_img, 4, 0, do_authenticate_image,
		"authenticate image via HAB",
		"addr length ivt_offset\n"
		"addr - image hex address\n"
		"length - image hex length\n"
		"ivt_offset - hex offset of IVT in the image"
	  );


#endif /* !defined(CONFIG_SPL_BUILD) */

static bool is_hab_enabled(void)
{
	struct imx_sec_config_fuse_t *fuse =
		(struct imx_sec_config_fuse_t *)&imx_sec_config_fuse;
	uint32_t reg;
	int ret;

	ret = fuse_read(fuse->bank, fuse->word, &reg);
	if (ret) {
		puts("\nSecure boot fuse read error\n");
		return ret;
	}

	return (reg & IS_HAB_ENABLED_BIT) == IS_HAB_ENABLED_BIT;
}

int authenticate_image(uint32_t ddr_start, uint32_t image_size,
		       uint32_t ivt_offset)
{
	uint32_t load_addr = 0;
	size_t bytes;
	uint32_t ivt_addr = 0;
	int result = 1;
	ulong start;
	hab_rvt_authenticate_image_t *hab_rvt_authenticate_image;
	hab_rvt_entry_t *hab_rvt_entry;
	hab_rvt_exit_t *hab_rvt_exit;

	hab_rvt_authenticate_image = hab_rvt_authenticate_image_p;
	hab_rvt_entry = hab_rvt_entry_p;
	hab_rvt_exit = hab_rvt_exit_p;

	if (!is_hab_enabled()) {
		puts("hab fuse not enabled\n");
		return result;
	}

	printf("\nAuthenticate image from DDR location 0x%x...\n",
	       ddr_start);

	hab_caam_clock_enable(1);

	if (hab_rvt_entry() != HAB_SUCCESS) {
		puts("hab entry function fail\n");
		goto hab_caam_clock_disable;
	}

	/* Calculate IVT address header */
	ivt_addr = ddr_start + ivt_offset;
	start = ddr_start;
	bytes = image_size;
#ifdef DEBUG
	printf("\nivt_offset = 0x%x, ivt addr = 0x%x\n", ivt_offset, ivt_addr);
	puts("Dumping IVT\n");
	print_buffer(ivt_addr, (void *)(ivt_addr), 4, 0x8, 0);

	puts("Dumping CSF Header\n");
	print_buffer(ivt_addr + IVT_SIZE, (void *)(ivt_addr + IVT_SIZE), 4,
		     0x10, 0);

#if  !defined(CONFIG_SPL_BUILD)
	get_hab_status();
#endif

	puts("\nCalling authenticate_image in ROM\n");
	printf("\tivt_offset = 0x%x\n", ivt_offset);
	printf("\tstart = 0x%08lx\n", start);
	printf("\tbytes = 0x%x\n", bytes);
#else
	(void)ivt_addr;
#endif
	/*
	 * If the MMU is enabled, we have to notify the ROM
	 * code, or it won't flush the caches when needed.
	 * This is done, by setting the "pu_irom_mmu_enabled"
	 * word to 1. You can find its address by looking in
	 * the ROM map. This is critical for
	 * authenticate_image(). If MMU is enabled, without
	 * setting this bit, authentication will fail and may
	 * crash.
	 */
	/* Check MMU enabled */
	if (is_soc_type(MXC_SOC_MX6) && get_cr() & CR_M) {
		if (is_mx6dq()) {
			/*
			 * This won't work on Rev 1.0.0 of
			 * i.MX6Q/D, since their ROM doesn't
			 * do cache flushes. don't think any
			 * exist, so we ignore them.
			 */
			if (!is_mx6dqp())
				writel(1, MX6DQ_PU_IROM_MMU_EN_VAR);
		} else if (is_mx6sdl()) {
			writel(1, MX6DLS_PU_IROM_MMU_EN_VAR);
		} else if (is_mx6sl()) {
			writel(1, MX6SL_PU_IROM_MMU_EN_VAR);
		}
	}

	load_addr = (uint32_t)hab_rvt_authenticate_image(
			HAB_CID_UBOOT,
			ivt_offset, (void **)&start,
			(size_t *)&bytes, NULL);
	if (hab_rvt_exit() != HAB_SUCCESS) {
		puts("hab exit function fail\n");
		load_addr = 0;
	}

hab_caam_clock_disable:
	hab_caam_clock_enable(0);

#if !defined(CONFIG_SPL_BUILD)
	get_hab_status();
#endif
	if (load_addr != 0)
		result = 0;

	return result;
}
Commit	Line	Data
b83c709e	1	/*
29067abf	2	* Copyright (C) 2010-2015 Freescale Semiconductor, Inc.
b83c709e SB	3	*
	4	* SPDX-License-Identifier: GPL-2.0+
	5	*/
	6
	7	#include <common.h>
fba6f9ef AA	8	#include <config.h>
fba6f9ef AA	9	#include <fuse.h>
b83c709e	10	#include <asm/io.h>
36c1ca4d	11	#include <asm/system.h>
36c1ca4d	12	#include <asm/arch/clock.h>
f2f07e85	13	#include <asm/arch/sys_proto.h>
552a848e	14	#include <asm/mach-imx/hab.h>
b83c709e SB	15
b83c709e SB	16	/* -------- start of HAB API updates ------------*/
f2f07e85 SB	17
	18	#define hab_rvt_report_event_p \
	19	( \
b5437a80 PF	20	(is_mx6dqp()) ? \
b5437a80 PF	21	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
27cd0da4	22	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
f2f07e85	23	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
27cd0da4	24	(is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
f2f07e85 SB	25	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
	26	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT) \
	27	)
	28
	29	#define hab_rvt_report_status_p \
	30	( \
b5437a80 PF	31	(is_mx6dqp()) ? \
b5437a80 PF	32	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
27cd0da4	33	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
f2f07e85	34	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
27cd0da4	35	(is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
f2f07e85 SB	36	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
	37	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS) \
	38	)
	39
	40	#define hab_rvt_authenticate_image_p \
	41	( \
b5437a80 PF	42	(is_mx6dqp()) ? \
b5437a80 PF	43	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
27cd0da4	44	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
f2f07e85	45	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
27cd0da4	46	(is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
f2f07e85 SB	47	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
	48	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE) \
	49	)
	50
	51	#define hab_rvt_entry_p \
	52	( \
b5437a80 PF	53	(is_mx6dqp()) ? \
b5437a80 PF	54	((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
27cd0da4	55	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
f2f07e85	56	((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
27cd0da4	57	(is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
f2f07e85 SB	58	((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
	59	((hab_rvt_entry_t *)HAB_RVT_ENTRY) \
	60	)
	61
	62	#define hab_rvt_exit_p \
	63	( \
b5437a80 PF	64	(is_mx6dqp()) ? \
b5437a80 PF	65	((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
27cd0da4	66	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
f2f07e85	67	((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
27cd0da4	68	(is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
f2f07e85 SB	69	((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
	70	((hab_rvt_exit_t *)HAB_RVT_EXIT) \
	71	)
b83c709e	72
36c1ca4d	73	#define ALIGN_SIZE 0x1000
36c1ca4d NG	74	#define MX6DQ_PU_IROM_MMU_EN_VAR 0x009024a8
	75	#define MX6DLS_PU_IROM_MMU_EN_VAR 0x00901dd0
	76	#define MX6SL_PU_IROM_MMU_EN_VAR 0x00900a18
ee3899aa	77	#define IS_HAB_ENABLED_BIT \
27117b20 PF	78	(is_soc_type(MXC_SOC_MX7ULP) ? 0x80000000 : \
27117b20 PF	79	(is_soc_type(MXC_SOC_MX7) ? 0x2000000 : 0x2))
36c1ca4d	80
15b505b0 SE	81	static bool is_hab_enabled(void);
	82
	83	#if !defined(CONFIG_SPL_BUILD)
	84
29067abf UC	85	#define MAX_RECORD_BYTES (81024) / 4 kbytes */
	86
	87	struct record {
	88	uint8_t tag; /* Tag */
	89	uint8_t len[2]; /* Length */
	90	uint8_t par; /* Version */
	91	uint8_t contents[MAX_RECORD_BYTES];/* Record Data */
	92	bool any_rec_flag;
	93	};
	94
	95	char *rsn_str[] = {"RSN = HAB_RSN_ANY (0x00)\n",
	96	"RSN = HAB_ENG_FAIL (0x30)\n",
	97	"RSN = HAB_INV_ADDRESS (0x22)\n",
	98	"RSN = HAB_INV_ASSERTION (0x0C)\n",
	99	"RSN = HAB_INV_CALL (0x28)\n",
	100	"RSN = HAB_INV_CERTIFICATE (0x21)\n",
	101	"RSN = HAB_INV_COMMAND (0x06)\n",
	102	"RSN = HAB_INV_CSF (0x11)\n",
	103	"RSN = HAB_INV_DCD (0x27)\n",
	104	"RSN = HAB_INV_INDEX (0x0F)\n",
	105	"RSN = HAB_INV_IVT (0x05)\n",
	106	"RSN = HAB_INV_KEY (0x1D)\n",
	107	"RSN = HAB_INV_RETURN (0x1E)\n",
	108	"RSN = HAB_INV_SIGNATURE (0x18)\n",
	109	"RSN = HAB_INV_SIZE (0x17)\n",
	110	"RSN = HAB_MEM_FAIL (0x2E)\n",
	111	"RSN = HAB_OVR_COUNT (0x2B)\n",
	112	"RSN = HAB_OVR_STORAGE (0x2D)\n",
	113	"RSN = HAB_UNS_ALGORITHM (0x12)\n",
	114	"RSN = HAB_UNS_COMMAND (0x03)\n",
	115	"RSN = HAB_UNS_ENGINE (0x0A)\n",
	116	"RSN = HAB_UNS_ITEM (0x24)\n",
	117	"RSN = HAB_UNS_KEY (0x1B)\n",
	118	"RSN = HAB_UNS_PROTOCOL (0x14)\n",
	119	"RSN = HAB_UNS_STATE (0x09)\n",
	120	"RSN = INVALID\n",
	121	NULL};
	122
	123	char *sts_str[] = {"STS = HAB_SUCCESS (0xF0)\n",
	124	"STS = HAB_FAILURE (0x33)\n",
	125	"STS = HAB_WARNING (0x69)\n",
	126	"STS = INVALID\n",
	127	NULL};
	128
	129	char *eng_str[] = {"ENG = HAB_ENG_ANY (0x00)\n",
	130	"ENG = HAB_ENG_SCC (0x03)\n",
	131	"ENG = HAB_ENG_RTIC (0x05)\n",
	132	"ENG = HAB_ENG_SAHARA (0x06)\n",
	133	"ENG = HAB_ENG_CSU (0x0A)\n",
	134	"ENG = HAB_ENG_SRTC (0x0C)\n",
	135	"ENG = HAB_ENG_DCP (0x1B)\n",
	136	"ENG = HAB_ENG_CAAM (0x1D)\n",
	137	"ENG = HAB_ENG_SNVS (0x1E)\n",
	138	"ENG = HAB_ENG_OCOTP (0x21)\n",
	139	"ENG = HAB_ENG_DTCP (0x22)\n",
	140	"ENG = HAB_ENG_ROM (0x36)\n",
	141	"ENG = HAB_ENG_HDCP (0x24)\n",
	142	"ENG = HAB_ENG_RTL (0x77)\n",
	143	"ENG = HAB_ENG_SW (0xFF)\n",
	144	"ENG = INVALID\n",
	145	NULL};
	146
	147	char *ctx_str[] = {"CTX = HAB_CTX_ANY(0x00)\n",
	148	"CTX = HAB_CTX_FAB (0xFF)\n",
149	"CTX = HAB_CTX_ENTRY (0xE1)\n",
150	"CTX = HAB_CTX_TARGET (0x33)\n",
151	"CTX = HAB_CTX_AUTHENTICATE (0x0A)\n",
152	"CTX = HAB_CTX_DCD (0xDD)\n",
153	"CTX = HAB_CTX_CSF (0xCF)\n",
154	"CTX = HAB_CTX_COMMAND (0xC0)\n",
155	"CTX = HAB_CTX_AUT_DAT (0xDB)\n",
156	"CTX = HAB_CTX_ASSERT (0xA0)\n",
157	"CTX = HAB_CTX_EXIT (0xEE)\n",
158	"CTX = INVALID\n",
159	NULL};
160
161	uint8_t hab_statuses[5] = {
162	HAB_STS_ANY,
163	HAB_FAILURE,
164	HAB_WARNING,
165	HAB_SUCCESS,
166	-1
167	};
168
169	uint8_t hab_reasons[26] = {
170	HAB_RSN_ANY,
171	HAB_ENG_FAIL,
172	HAB_INV_ADDRESS,
173	HAB_INV_ASSERTION,
174	HAB_INV_CALL,
175	HAB_INV_CERTIFICATE,
176	HAB_INV_COMMAND,
177	HAB_INV_CSF,
178	HAB_INV_DCD,
179	HAB_INV_INDEX,
180	HAB_INV_IVT,
181	HAB_INV_KEY,
182	HAB_INV_RETURN,
183	HAB_INV_SIGNATURE,
184	HAB_INV_SIZE,
185	HAB_MEM_FAIL,
186	HAB_OVR_COUNT,
187	HAB_OVR_STORAGE,
188	HAB_UNS_ALGORITHM,
189	HAB_UNS_COMMAND,
190	HAB_UNS_ENGINE,
191	HAB_UNS_ITEM,
192	HAB_UNS_KEY,
193	HAB_UNS_PROTOCOL,
194	HAB_UNS_STATE,
195	-1
196	};
197
198	uint8_t hab_contexts[12] = {
199	HAB_CTX_ANY,
200	HAB_CTX_FAB,
201	HAB_CTX_ENTRY,
202	HAB_CTX_TARGET,
203	HAB_CTX_AUTHENTICATE,
204	HAB_CTX_DCD,
205	HAB_CTX_CSF,
206	HAB_CTX_COMMAND,
207	HAB_CTX_AUT_DAT,
208	HAB_CTX_ASSERT,
209	HAB_CTX_EXIT,
210	-1
211	};
212
213	uint8_t hab_engines[16] = {
214	HAB_ENG_ANY,
215	HAB_ENG_SCC,
216	HAB_ENG_RTIC,
217	HAB_ENG_SAHARA,
218	HAB_ENG_CSU,
219	HAB_ENG_SRTC,
220	HAB_ENG_DCP,
221	HAB_ENG_CAAM,
222	HAB_ENG_SNVS,
223	HAB_ENG_OCOTP,
224	HAB_ENG_DTCP,
225	HAB_ENG_ROM,
226	HAB_ENG_HDCP,
227	HAB_ENG_RTL,
228	HAB_ENG_SW,
229	-1
230	};
231
29067abf UC	232	static inline uint8_t get_idx(uint8_t *list, uint8_t tgt)
	233	{
	234	uint8_t idx = 0;
	235	uint8_t element = list[idx];
	236	while (element != -1) {
	237	if (element == tgt)
	238	return idx;
	239	element = list[++idx];
	240	}
	241	return -1;
	242	}
	243
	244	void process_event_record(uint8_t *event_data, size_t bytes)
	245	{
	246	struct record rec = (struct record )event_data;
	247
	248	printf("\n\n%s", sts_str[get_idx(hab_statuses, rec->contents[0])]);
	249	printf("%s", rsn_str[get_idx(hab_reasons, rec->contents[1])]);
	250	printf("%s", ctx_str[get_idx(hab_contexts, rec->contents[2])]);
	251	printf("%s", eng_str[get_idx(hab_engines, rec->contents[3])]);
	252	}
	253
b83c709e SB	254	void display_event(uint8_t *event_data, size_t bytes)
	255	{
	256	uint32_t i;
	257
	258	if (!(event_data && bytes > 0))
	259	return;
	260
	261	for (i = 0; i < bytes; i++) {
	262	if (i == 0)
	263	printf("\t0x%02x", event_data[i]);
	264	else if ((i % 8) == 0)
	265	printf("\n\t0x%02x", event_data[i]);
	266	else
	267	printf(" 0x%02x", event_data[i]);
	268	}
29067abf UC	269
29067abf UC	270	process_event_record(event_data, bytes);
b83c709e SB	271	}
	272
	273	int get_hab_status(void)
	274	{
	275	uint32_t index = 0; /* Loop index */
	276	uint8_t event_data[128]; /* Event data buffer */
	277	size_t bytes = sizeof(event_data); /* Event size in bytes */
	278	enum hab_config config = 0;
	279	enum hab_state state = 0;
f2f07e85 SB	280	hab_rvt_report_event_t *hab_rvt_report_event;
	281	hab_rvt_report_status_t *hab_rvt_report_status;
	282
	283	hab_rvt_report_event = hab_rvt_report_event_p;
	284	hab_rvt_report_status = hab_rvt_report_status_p;
b83c709e SB	285
	286	if (is_hab_enabled())
	287	puts("\nSecure boot enabled\n");
	288	else
	289	puts("\nSecure boot disabled\n");
	290
	291	/* Check HAB status */
	292	if (hab_rvt_report_status(&config, &state) != HAB_SUCCESS) {
	293	printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
	294	config, state);
	295
	296	/* Display HAB Error events */
	297	while (hab_rvt_report_event(HAB_FAILURE, index, event_data,
	298	&bytes) == HAB_SUCCESS) {
	299	puts("\n");
	300	printf("--------- HAB Event %d -----------------\n",
	301	index + 1);
	302	puts("event data:\n");
	303	display_event(event_data, bytes);
	304	puts("\n");
	305	bytes = sizeof(event_data);
	306	index++;
	307	}
	308	}
	309	/* Display message if no HAB events are found */
	310	else {
	311	printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
	312	config, state);
	313	puts("No HAB Events Found!\n\n");
	314	}
	315	return 0;
	316	}
	317
15b505b0 SE	318	int do_hab_status(cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
	319	{
	320	if ((argc != 1)) {
	321	cmd_usage(cmdtp);
	322	return 1;
	323	}
	324
	325	get_hab_status();
	326
	327	return 0;
	328	}
	329
	330	static int do_authenticate_image(cmd_tbl_t *cmdtp, int flag, int argc,
	331	char * const argv[])
	332	{
c5800b25	333	ulong addr, length, ivt_offset;
15b505b0 SE	334	int rcode = 0;
15b505b0 SE	335
c5800b25	336	if (argc < 4)
15b505b0 SE	337	return CMD_RET_USAGE;
	338
	339	addr = simple_strtoul(argv[1], NULL, 16);
c5800b25 BD	340	length = simple_strtoul(argv[2], NULL, 16);
c5800b25 BD	341	ivt_offset = simple_strtoul(argv[3], NULL, 16);
15b505b0	342
c5800b25	343	rcode = authenticate_image(addr, length, ivt_offset);
9535b397 BD	344	if (rcode == 0)
	345	rcode = CMD_RET_SUCCESS;
	346	else
	347	rcode = CMD_RET_FAILURE;
c5800b25	348
15b505b0 SE	349	return rcode;
	350	}
	351
	352	U_BOOT_CMD(
	353	hab_status, CONFIG_SYS_MAXARGS, 1, do_hab_status,
	354	"display HAB status",
	355	""
	356	);
	357
	358	U_BOOT_CMD(
c5800b25	359	hab_auth_img, 4, 0, do_authenticate_image,
15b505b0	360	"authenticate image via HAB",
c5800b25	361	"addr length ivt_offset\n"
15b505b0	362	"addr - image hex address\n"
c5800b25	363	"length - image hex length\n"
15b505b0 SE	364	"ivt_offset - hex offset of IVT in the image"
	365	);
	366
	367
	368	#endif /* !defined(CONFIG_SPL_BUILD) */
	369
	370	static bool is_hab_enabled(void)
	371	{
	372	struct imx_sec_config_fuse_t *fuse =
	373	(struct imx_sec_config_fuse_t *)&imx_sec_config_fuse;
	374	uint32_t reg;
	375	int ret;
	376
	377	ret = fuse_read(fuse->bank, fuse->word, &reg);
	378	if (ret) {
	379	puts("\nSecure boot fuse read error\n");
	380	return ret;
	381	}
	382
	383	return (reg & IS_HAB_ENABLED_BIT) == IS_HAB_ENABLED_BIT;
	384	}
	385
c5800b25 BD	386	int authenticate_image(uint32_t ddr_start, uint32_t image_size,
c5800b25 BD	387	uint32_t ivt_offset)
36c1ca4d NG	388	{
	389	uint32_t load_addr = 0;
	390	size_t bytes;
c5800b25	391	uint32_t ivt_addr = 0;
9535b397	392	int result = 1;
36c1ca4d NG	393	ulong start;
	394	hab_rvt_authenticate_image_t *hab_rvt_authenticate_image;
	395	hab_rvt_entry_t *hab_rvt_entry;
	396	hab_rvt_exit_t *hab_rvt_exit;
	397
	398	hab_rvt_authenticate_image = hab_rvt_authenticate_image_p;
	399	hab_rvt_entry = hab_rvt_entry_p;
	400	hab_rvt_exit = hab_rvt_exit_p;
	401
d2c61800 BD	402	if (!is_hab_enabled()) {
	403	puts("hab fuse not enabled\n");
	404	return result;
	405	}
36c1ca4d	406
d2c61800 BD	407	printf("\nAuthenticate image from DDR location 0x%x...\n",
d2c61800 BD	408	ddr_start);
36c1ca4d	409
d2c61800	410	hab_caam_clock_enable(1);
36c1ca4d	411
53c8a510 BD	412	if (hab_rvt_entry() != HAB_SUCCESS) {
	413	puts("hab entry function fail\n");
	414	goto hab_caam_clock_disable;
	415	}
d2c61800	416
c5800b25 BD	417	/* Calculate IVT address header */
c5800b25 BD	418	ivt_addr = ddr_start + ivt_offset;
53c8a510	419	start = ddr_start;
c5800b25	420	bytes = image_size;
36c1ca4d	421	#ifdef DEBUG
c5800b25	422	printf("\nivt_offset = 0x%x, ivt addr = 0x%x\n", ivt_offset, ivt_addr);
53c8a510	423	puts("Dumping IVT\n");
c5800b25	424	print_buffer(ivt_addr, (void *)(ivt_addr), 4, 0x8, 0);
53c8a510 BD	425
53c8a510 BD	426	puts("Dumping CSF Header\n");
c5800b25 BD	427	print_buffer(ivt_addr + IVT_SIZE, (void *)(ivt_addr + IVT_SIZE), 4,
c5800b25 BD	428	0x10, 0);
36c1ca4d	429
15b505b0	430	#if !defined(CONFIG_SPL_BUILD)
53c8a510	431	get_hab_status();
15b505b0	432	#endif
36c1ca4d	433
53c8a510 BD	434	puts("\nCalling authenticate_image in ROM\n");
	435	printf("\tivt_offset = 0x%x\n", ivt_offset);
	436	printf("\tstart = 0x%08lx\n", start);
	437	printf("\tbytes = 0x%x\n", bytes);
c5800b25 BD	438	#else
c5800b25 BD	439	(void)ivt_addr;
36c1ca4d	440	#endif
53c8a510 BD	441	/*
	442	* If the MMU is enabled, we have to notify the ROM
	443	* code, or it won't flush the caches when needed.
	444	* This is done, by setting the "pu_irom_mmu_enabled"
	445	* word to 1. You can find its address by looking in
	446	* the ROM map. This is critical for
	447	* authenticate_image(). If MMU is enabled, without
	448	* setting this bit, authentication will fail and may
	449	* crash.
	450	*/
	451	/* Check MMU enabled */
	452	if (is_soc_type(MXC_SOC_MX6) && get_cr() & CR_M) {
	453	if (is_mx6dq()) {
	454	/*
	455	* This won't work on Rev 1.0.0 of
	456	* i.MX6Q/D, since their ROM doesn't
	457	* do cache flushes. don't think any
	458	* exist, so we ignore them.
	459	*/
	460	if (!is_mx6dqp())
	461	writel(1, MX6DQ_PU_IROM_MMU_EN_VAR);
	462	} else if (is_mx6sdl()) {
	463	writel(1, MX6DLS_PU_IROM_MMU_EN_VAR);
	464	} else if (is_mx6sl()) {
	465	writel(1, MX6SL_PU_IROM_MMU_EN_VAR);
d2c61800	466	}
53c8a510	467	}
36c1ca4d	468
53c8a510 BD	469	load_addr = (uint32_t)hab_rvt_authenticate_image(
	470	HAB_CID_UBOOT,
	471	ivt_offset, (void **)&start,
	472	(size_t *)&bytes, NULL);
	473	if (hab_rvt_exit() != HAB_SUCCESS) {
	474	puts("hab exit function fail\n");
	475	load_addr = 0;
d2c61800	476	}
36c1ca4d	477
53c8a510	478	hab_caam_clock_disable:
d2c61800	479	hab_caam_clock_enable(0);
36c1ca4d	480
15b505b0	481	#if !defined(CONFIG_SPL_BUILD)
d2c61800	482	get_hab_status();
15b505b0	483	#endif
d2c61800	484	if (load_addr != 0)
9535b397	485	result = 0;
36c1ca4d NG	486
	487	return result;
	488	}