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8bde7f77
WD
1/*
2 * (C) Copyright 2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
1a459660 5 * SPDX-License-Identifier: GPL-2.0+
8bde7f77
WD
6 */
7
8/*
9 * Boot support
10 */
11#include <common.h>
12#include <command.h>
d88af4da 13#include <linux/compiler.h>
8bde7f77 14
d87080b7 15DECLARE_GLOBAL_DATA_PTR;
8bde7f77 16
d88af4da
MF
17__maybe_unused
18static void print_num(const char *name, ulong value)
19{
20 printf("%-12s= 0x%08lX\n", name, value);
21}
8bde7f77 22
5f3dfadc 23__maybe_unused
d88af4da
MF
24static void print_eth(int idx)
25{
26 char name[10], *val;
27 if (idx)
28 sprintf(name, "eth%iaddr", idx);
29 else
30 strcpy(name, "ethaddr");
31 val = getenv(name);
32 if (!val)
33 val = "(not set)";
34 printf("%-12s= %s\n", name, val);
35}
de2dff6f 36
9fc6a06a
MS
37__maybe_unused
38static void print_eths(void)
39{
40 struct eth_device *dev;
41 int i = 0;
42
43 do {
44 dev = eth_get_dev_by_index(i);
45 if (dev) {
46 printf("eth%dname = %s\n", i, dev->name);
47 print_eth(i);
48 i++;
49 }
50 } while (dev);
51
52 printf("current eth = %s\n", eth_get_name());
53 printf("ip_addr = %s\n", getenv("ipaddr"));
54}
55
d88af4da 56__maybe_unused
47708457 57static void print_lnum(const char *name, unsigned long long value)
d88af4da
MF
58{
59 printf("%-12s= 0x%.8llX\n", name, value);
60}
61
62__maybe_unused
63static void print_mhz(const char *name, unsigned long hz)
64{
65 char buf[32];
66
67 printf("%-12s= %6s MHz\n", name, strmhz(buf, hz));
68}
8bde7f77 69
c99ea790 70#if defined(CONFIG_PPC)
e7939464
YS
71void __weak board_detail(void)
72{
73 /* Please define boot_detail() for your platform */
74}
8bde7f77 75
5902e8f7 76int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8bde7f77 77{
8bde7f77 78 bd_t *bd = gd->bd;
8bde7f77
WD
79
80#ifdef DEBUG
5902e8f7
ML
81 print_num("bd address", (ulong)bd);
82#endif
83 print_num("memstart", bd->bi_memstart);
84 print_lnum("memsize", bd->bi_memsize);
85 print_num("flashstart", bd->bi_flashstart);
86 print_num("flashsize", bd->bi_flashsize);
87 print_num("flashoffset", bd->bi_flashoffset);
88 print_num("sramstart", bd->bi_sramstart);
89 print_num("sramsize", bd->bi_sramsize);
90#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || \
91 defined(CONFIG_8260) || defined(CONFIG_E500)
92 print_num("immr_base", bd->bi_immr_base);
93#endif
94 print_num("bootflags", bd->bi_bootflags);
95#if defined(CONFIG_405CR) || defined(CONFIG_405EP) || \
96 defined(CONFIG_405GP) || \
97 defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \
98 defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \
99 defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
100 defined(CONFIG_XILINX_405)
0c277ef9
TT
101 print_mhz("procfreq", bd->bi_procfreq);
102 print_mhz("plb_busfreq", bd->bi_plb_busfreq);
5902e8f7
ML
103#if defined(CONFIG_405EP) || defined(CONFIG_405GP) || \
104 defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \
105 defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \
106 defined(CONFIG_440SPE) || defined(CONFIG_XILINX_405)
0c277ef9 107 print_mhz("pci_busfreq", bd->bi_pci_busfreq);
8bde7f77 108#endif
9fea65a6 109#else /* ! CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */
9c4c5ae3 110#if defined(CONFIG_CPM2)
0c277ef9
TT
111 print_mhz("vco", bd->bi_vco);
112 print_mhz("sccfreq", bd->bi_sccfreq);
113 print_mhz("brgfreq", bd->bi_brgfreq);
8bde7f77 114#endif
0c277ef9 115 print_mhz("intfreq", bd->bi_intfreq);
9c4c5ae3 116#if defined(CONFIG_CPM2)
0c277ef9 117 print_mhz("cpmfreq", bd->bi_cpmfreq);
8bde7f77 118#endif
0c277ef9 119 print_mhz("busfreq", bd->bi_busfreq);
9fea65a6 120#endif /* CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */
03f5c550 121
34e210f5
TT
122#ifdef CONFIG_ENABLE_36BIT_PHYS
123#ifdef CONFIG_PHYS_64BIT
124 puts("addressing = 36-bit\n");
125#else
126 puts("addressing = 32-bit\n");
127#endif
128#endif
129
de2dff6f 130 print_eth(0);
e2ffd59b 131#if defined(CONFIG_HAS_ETH1)
de2dff6f 132 print_eth(1);
03f5c550 133#endif
e2ffd59b 134#if defined(CONFIG_HAS_ETH2)
de2dff6f 135 print_eth(2);
42d1f039 136#endif
e2ffd59b 137#if defined(CONFIG_HAS_ETH3)
de2dff6f 138 print_eth(3);
03f5c550 139#endif
c68a05fe 140#if defined(CONFIG_HAS_ETH4)
de2dff6f 141 print_eth(4);
c68a05fe 142#endif
c68a05fe 143#if defined(CONFIG_HAS_ETH5)
de2dff6f 144 print_eth(5);
c68a05fe 145#endif
146
8bde7f77 147#ifdef CONFIG_HERMES
0c277ef9 148 print_mhz("ethspeed", bd->bi_ethspeed);
8bde7f77 149#endif
50a47d05 150 printf("IP addr = %s\n", getenv("ipaddr"));
a7e5ee9e 151 printf("baudrate = %6u bps\n", bd->bi_baudrate);
5902e8f7 152 print_num("relocaddr", gd->relocaddr);
e7939464 153 board_detail();
8bde7f77
WD
154 return 0;
155}
156
c99ea790 157#elif defined(CONFIG_NIOS2)
5c952cf0 158
5902e8f7 159int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
5c952cf0 160{
5c952cf0
WD
161 bd_t *bd = gd->bd;
162
5902e8f7
ML
163 print_num("mem start", (ulong)bd->bi_memstart);
164 print_lnum("mem size", (u64)bd->bi_memsize);
165 print_num("flash start", (ulong)bd->bi_flashstart);
166 print_num("flash size", (ulong)bd->bi_flashsize);
167 print_num("flash offset", (ulong)bd->bi_flashoffset);
5c952cf0 168
6d0f6bcf 169#if defined(CONFIG_SYS_SRAM_BASE)
5c952cf0
WD
170 print_num ("sram start", (ulong)bd->bi_sramstart);
171 print_num ("sram size", (ulong)bd->bi_sramsize);
172#endif
173
90253178 174#if defined(CONFIG_CMD_NET)
de2dff6f 175 print_eth(0);
50a47d05 176 printf("ip_addr = %s\n", getenv("ipaddr"));
5c952cf0
WD
177#endif
178
7fffe2fa 179 printf("baudrate = %u bps\n", bd->bi_baudrate);
5c952cf0
WD
180
181 return 0;
182}
c99ea790
RM
183
184#elif defined(CONFIG_MICROBLAZE)
cfc67116 185
5902e8f7 186int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
cfc67116 187{
cfc67116 188 bd_t *bd = gd->bd;
5902e8f7
ML
189 print_num("mem start ", (ulong)bd->bi_memstart);
190 print_lnum("mem size ", (u64)bd->bi_memsize);
191 print_num("flash start ", (ulong)bd->bi_flashstart);
192 print_num("flash size ", (ulong)bd->bi_flashsize);
193 print_num("flash offset ", (ulong)bd->bi_flashoffset);
6d0f6bcf 194#if defined(CONFIG_SYS_SRAM_BASE)
5902e8f7
ML
195 print_num("sram start ", (ulong)bd->bi_sramstart);
196 print_num("sram size ", (ulong)bd->bi_sramsize);
cfc67116 197#endif
90253178 198#if defined(CONFIG_CMD_NET)
9fc6a06a 199 print_eths();
cfc67116 200#endif
82b6a476 201 printf("baudrate = %u bps\n", bd->bi_baudrate);
cfc67116
MS
202 return 0;
203}
4a551709 204
c99ea790
RM
205#elif defined(CONFIG_SPARC)
206
54841ab5 207int do_bdinfo(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
00ab32c8
DH
208{
209 bd_t *bd = gd->bd;
00ab32c8
DH
210
211#ifdef DEBUG
212 print_num("bd address ", (ulong) bd);
213#endif
214 print_num("memstart ", bd->bi_memstart);
b57ca3e1 215 print_lnum("memsize ", bd->bi_memsize);
00ab32c8 216 print_num("flashstart ", bd->bi_flashstart);
6d0f6bcf 217 print_num("CONFIG_SYS_MONITOR_BASE ", CONFIG_SYS_MONITOR_BASE);
0e8d1586 218 print_num("CONFIG_ENV_ADDR ", CONFIG_ENV_ADDR);
d97f01a6 219 printf("CONFIG_SYS_RELOC_MONITOR_BASE = 0x%x (%d)\n", CONFIG_SYS_RELOC_MONITOR_BASE,
6d0f6bcf 220 CONFIG_SYS_MONITOR_LEN);
d97f01a6 221 printf("CONFIG_SYS_MALLOC_BASE = 0x%x (%d)\n", CONFIG_SYS_MALLOC_BASE,
6d0f6bcf 222 CONFIG_SYS_MALLOC_LEN);
d97f01a6 223 printf("CONFIG_SYS_INIT_SP_OFFSET = 0x%x (%d)\n", CONFIG_SYS_INIT_SP_OFFSET,
6d0f6bcf 224 CONFIG_SYS_STACK_SIZE);
d97f01a6 225 printf("CONFIG_SYS_PROM_OFFSET = 0x%x (%d)\n", CONFIG_SYS_PROM_OFFSET,
6d0f6bcf 226 CONFIG_SYS_PROM_SIZE);
d97f01a6 227 printf("CONFIG_SYS_GBL_DATA_OFFSET = 0x%x (%d)\n", CONFIG_SYS_GBL_DATA_OFFSET,
25ddd1fb 228 GENERATED_GBL_DATA_SIZE);
00ab32c8
DH
229
230#if defined(CONFIG_CMD_NET)
de2dff6f 231 print_eth(0);
50a47d05 232 printf("ip_addr = %s\n", getenv("ipaddr"));
00ab32c8 233#endif
a8f1f1cd 234 printf("baudrate = %6u bps\n", bd->bi_baudrate);
00ab32c8
DH
235 return 0;
236}
237
c99ea790
RM
238#elif defined(CONFIG_M68K)
239
5902e8f7 240int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8e585f02 241{
8e585f02 242 bd_t *bd = gd->bd;
8ae158cd 243
5902e8f7
ML
244 print_num("memstart", (ulong)bd->bi_memstart);
245 print_lnum("memsize", (u64)bd->bi_memsize);
246 print_num("flashstart", (ulong)bd->bi_flashstart);
247 print_num("flashsize", (ulong)bd->bi_flashsize);
248 print_num("flashoffset", (ulong)bd->bi_flashoffset);
6d0f6bcf 249#if defined(CONFIG_SYS_INIT_RAM_ADDR)
5902e8f7
ML
250 print_num("sramstart", (ulong)bd->bi_sramstart);
251 print_num("sramsize", (ulong)bd->bi_sramsize);
8e585f02 252#endif
6d0f6bcf 253#if defined(CONFIG_SYS_MBAR)
5902e8f7 254 print_num("mbar", bd->bi_mbar_base);
8e585f02 255#endif
0c277ef9
TT
256 print_mhz("cpufreq", bd->bi_intfreq);
257 print_mhz("busfreq", bd->bi_busfreq);
8ae158cd 258#ifdef CONFIG_PCI
0c277ef9 259 print_mhz("pcifreq", bd->bi_pcifreq);
8ae158cd
TL
260#endif
261#ifdef CONFIG_EXTRA_CLOCK
0c277ef9
TT
262 print_mhz("flbfreq", bd->bi_flbfreq);
263 print_mhz("inpfreq", bd->bi_inpfreq);
264 print_mhz("vcofreq", bd->bi_vcofreq);
8ae158cd 265#endif
26667b7f 266#if defined(CONFIG_CMD_NET)
de2dff6f 267 print_eth(0);
8e585f02 268#if defined(CONFIG_HAS_ETH1)
de2dff6f 269 print_eth(1);
8e585f02 270#endif
8e585f02 271#if defined(CONFIG_HAS_ETH2)
de2dff6f 272 print_eth(2);
8e585f02 273#endif
8e585f02 274#if defined(CONFIG_HAS_ETH3)
de2dff6f 275 print_eth(3);
8e585f02
TL
276#endif
277
50a47d05 278 printf("ip_addr = %s\n", getenv("ipaddr"));
26667b7f 279#endif
f5a5b3c5 280 printf("baudrate = %u bps\n", bd->bi_baudrate);
8e585f02
TL
281
282 return 0;
283}
284
8dc48d71 285#elif defined(CONFIG_BLACKFIN)
c99ea790 286
54841ab5 287int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8dc48d71 288{
8dc48d71
MF
289 bd_t *bd = gd->bd;
290
291 printf("U-Boot = %s\n", bd->bi_r_version);
292 printf("CPU = %s\n", bd->bi_cpu);
293 printf("Board = %s\n", bd->bi_board_name);
0c277ef9
TT
294 print_mhz("VCO", bd->bi_vco);
295 print_mhz("CCLK", bd->bi_cclk);
296 print_mhz("SCLK", bd->bi_sclk);
8dc48d71 297
5902e8f7
ML
298 print_num("boot_params", (ulong)bd->bi_boot_params);
299 print_num("memstart", (ulong)bd->bi_memstart);
300 print_lnum("memsize", (u64)bd->bi_memsize);
301 print_num("flashstart", (ulong)bd->bi_flashstart);
302 print_num("flashsize", (ulong)bd->bi_flashsize);
303 print_num("flashoffset", (ulong)bd->bi_flashoffset);
8dc48d71 304
de2dff6f 305 print_eth(0);
50a47d05 306 printf("ip_addr = %s\n", getenv("ipaddr"));
5e84e5a7 307 printf("baudrate = %u bps\n", bd->bi_baudrate);
8dc48d71
MF
308
309 return 0;
310}
311
c99ea790 312#elif defined(CONFIG_MIPS)
8bde7f77 313
5902e8f7 314int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8bde7f77 315{
8bde7f77
WD
316 bd_t *bd = gd->bd;
317
5902e8f7
ML
318 print_num("boot_params", (ulong)bd->bi_boot_params);
319 print_num("memstart", (ulong)bd->bi_memstart);
320 print_lnum("memsize", (u64)bd->bi_memsize);
321 print_num("flashstart", (ulong)bd->bi_flashstart);
322 print_num("flashsize", (ulong)bd->bi_flashsize);
323 print_num("flashoffset", (ulong)bd->bi_flashoffset);
8bde7f77 324
de2dff6f 325 print_eth(0);
50a47d05 326 printf("ip_addr = %s\n", getenv("ipaddr"));
8dc22b00 327 printf("baudrate = %u bps\n", bd->bi_baudrate);
8bde7f77
WD
328
329 return 0;
330}
8bde7f77 331
c99ea790
RM
332#elif defined(CONFIG_AVR32)
333
5902e8f7 334int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
c99ea790
RM
335{
336 bd_t *bd = gd->bd;
337
5902e8f7
ML
338 print_num("boot_params", (ulong)bd->bi_boot_params);
339 print_num("memstart", (ulong)bd->bi_memstart);
340 print_lnum("memsize", (u64)bd->bi_memsize);
341 print_num("flashstart", (ulong)bd->bi_flashstart);
342 print_num("flashsize", (ulong)bd->bi_flashsize);
343 print_num("flashoffset", (ulong)bd->bi_flashoffset);
c99ea790
RM
344
345 print_eth(0);
50a47d05 346 printf("ip_addr = %s\n", getenv("ipaddr"));
15dc95d4 347 printf("baudrate = %u bps\n", bd->bi_baudrate);
c99ea790
RM
348
349 return 0;
350}
351
352#elif defined(CONFIG_ARM)
8bde7f77 353
5902e8f7 354int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8bde7f77 355{
8bde7f77
WD
356 int i;
357 bd_t *bd = gd->bd;
358
5902e8f7
ML
359 print_num("arch_number", bd->bi_arch_number);
360 print_num("boot_params", (ulong)bd->bi_boot_params);
8bde7f77 361
5902e8f7 362 for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
8bde7f77
WD
363 print_num("DRAM bank", i);
364 print_num("-> start", bd->bi_dram[i].start);
365 print_num("-> size", bd->bi_dram[i].size);
366 }
367
a41dbbd9 368#if defined(CONFIG_CMD_NET)
9fc6a06a 369 print_eths();
a41dbbd9 370#endif
e46e31a8 371 printf("baudrate = %u bps\n", bd->bi_baudrate);
e47f2db5 372#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
34fd5d25 373 print_num("TLB addr", gd->arch.tlb_addr);
f1d2b313 374#endif
5902e8f7
ML
375 print_num("relocaddr", gd->relocaddr);
376 print_num("reloc off", gd->reloc_off);
377 print_num("irq_sp", gd->irq_sp); /* irq stack pointer */
378 print_num("sp start ", gd->start_addr_sp);
c8fcd0f2 379#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
5902e8f7 380 print_num("FB base ", gd->fb_base);
c8fcd0f2 381#endif
8f5d4687
HM
382 /*
383 * TODO: Currently only support for davinci SOC's is added.
384 * Remove this check once all the board implement this.
385 */
386#ifdef CONFIG_CLOCKS
387 printf("ARM frequency = %ld MHz\n", gd->bd->bi_arm_freq);
388 printf("DSP frequency = %ld MHz\n", gd->bd->bi_dsp_freq);
389 printf("DDR frequency = %ld MHz\n", gd->bd->bi_ddr_freq);
390#endif
8bde7f77
WD
391 return 0;
392}
393
ebd0d062
NI
394#elif defined(CONFIG_SH)
395
5902e8f7 396int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
ebd0d062
NI
397{
398 bd_t *bd = gd->bd;
5902e8f7
ML
399 print_num("mem start ", (ulong)bd->bi_memstart);
400 print_lnum("mem size ", (u64)bd->bi_memsize);
401 print_num("flash start ", (ulong)bd->bi_flashstart);
402 print_num("flash size ", (ulong)bd->bi_flashsize);
403 print_num("flash offset ", (ulong)bd->bi_flashoffset);
ebd0d062
NI
404
405#if defined(CONFIG_CMD_NET)
406 print_eth(0);
50a47d05 407 printf("ip_addr = %s\n", getenv("ipaddr"));
ebd0d062 408#endif
ecd4551f 409 printf("baudrate = %u bps\n", bd->bi_baudrate);
ebd0d062
NI
410 return 0;
411}
412
a806ee6f
GR
413#elif defined(CONFIG_X86)
414
5902e8f7 415int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
a806ee6f
GR
416{
417 int i;
418 bd_t *bd = gd->bd;
a806ee6f 419
5902e8f7
ML
420 print_num("boot_params", (ulong)bd->bi_boot_params);
421 print_num("bi_memstart", bd->bi_memstart);
422 print_num("bi_memsize", bd->bi_memsize);
423 print_num("bi_flashstart", bd->bi_flashstart);
424 print_num("bi_flashsize", bd->bi_flashsize);
425 print_num("bi_flashoffset", bd->bi_flashoffset);
426 print_num("bi_sramstart", bd->bi_sramstart);
427 print_num("bi_sramsize", bd->bi_sramsize);
428 print_num("bi_bootflags", bd->bi_bootflags);
0c277ef9
TT
429 print_mhz("cpufreq", bd->bi_intfreq);
430 print_mhz("busfreq", bd->bi_busfreq);
5902e8f7
ML
431
432 for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
a806ee6f
GR
433 print_num("DRAM bank", i);
434 print_num("-> start", bd->bi_dram[i].start);
435 print_num("-> size", bd->bi_dram[i].size);
436 }
437
438#if defined(CONFIG_CMD_NET)
439 print_eth(0);
50a47d05 440 printf("ip_addr = %s\n", getenv("ipaddr"));
0c277ef9 441 print_mhz("ethspeed", bd->bi_ethspeed);
a806ee6f 442#endif
55f97c1b 443 printf("baudrate = %u bps\n", bd->bi_baudrate);
a806ee6f
GR
444
445 return 0;
446}
447
6fcc3be4
SG
448#elif defined(CONFIG_SANDBOX)
449
450int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
451{
452 int i;
453 bd_t *bd = gd->bd;
454
455 print_num("boot_params", (ulong)bd->bi_boot_params);
456
457 for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
458 print_num("DRAM bank", i);
459 print_num("-> start", bd->bi_dram[i].start);
460 print_num("-> size", bd->bi_dram[i].size);
461 }
462
463#if defined(CONFIG_CMD_NET)
464 print_eth(0);
50a47d05 465 printf("ip_addr = %s\n", getenv("ipaddr"));
6fcc3be4 466#endif
c8fcd0f2 467#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
6fcc3be4 468 print_num("FB base ", gd->fb_base);
c8fcd0f2 469#endif
6fcc3be4
SG
470 return 0;
471}
472
64d61461
ML
473#elif defined(CONFIG_NDS32)
474
475int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
476{
477 int i;
478 bd_t *bd = gd->bd;
479
480 print_num("arch_number", bd->bi_arch_number);
481 print_num("boot_params", (ulong)bd->bi_boot_params);
482
483 for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
484 print_num("DRAM bank", i);
485 print_num("-> start", bd->bi_dram[i].start);
486 print_num("-> size", bd->bi_dram[i].size);
487 }
488
489#if defined(CONFIG_CMD_NET)
490 print_eth(0);
50a47d05 491 printf("ip_addr = %s\n", getenv("ipaddr"));
64d61461 492#endif
a25356d7 493 printf("baudrate = %u bps\n", bd->bi_baudrate);
64d61461
ML
494
495 return 0;
496}
497
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498#elif defined(CONFIG_OPENRISC)
499
500int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
501{
502 bd_t *bd = gd->bd;
503
504 print_num("mem start", (ulong)bd->bi_memstart);
505 print_lnum("mem size", (u64)bd->bi_memsize);
506 print_num("flash start", (ulong)bd->bi_flashstart);
507 print_num("flash size", (ulong)bd->bi_flashsize);
508 print_num("flash offset", (ulong)bd->bi_flashoffset);
509
510#if defined(CONFIG_CMD_NET)
511 print_eth(0);
50a47d05 512 printf("ip_addr = %s\n", getenv("ipaddr"));
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513#endif
514
7a68e330 515 printf("baudrate = %u bps\n", bd->bi_baudrate);
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516
517 return 0;
518}
519
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520#else
521 #error "a case for this architecture does not exist!"
522#endif
8bde7f77 523
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524/* -------------------------------------------------------------------- */
525
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526U_BOOT_CMD(
527 bdinfo, 1, 1, do_bdinfo,
2fb2604d 528 "print Board Info structure",
a89c33db 529 ""
8bde7f77 530);