[people/ms/u-boot.git] / common / cmd_eeprom.c

/*
 * (C) Copyright 2000, 2001
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

/*
 * Support for read and write access to EEPROM like memory devices. This
 * includes regular EEPROM as well as  FRAM (ferroelectic nonvolaile RAM).
 * FRAM devices read and write data at bus speed. In particular, there is no
 * write delay. Also, there is no limit imposed on the number of bytes that can
 * be transferred with a single read or write.
 *
 * Use the following configuration options to ensure no unneeded performance
 * degradation (typical for EEPROM) is incured for FRAM memory:
 *
 * #define CONFIG_SYS_I2C_FRAM
 * #undef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
 *
 */

#include <common.h>
#include <config.h>
#include <command.h>
#include <i2c.h>

#ifndef	CONFIG_SYS_I2C_SPEED
#define	CONFIG_SYS_I2C_SPEED	50000
#endif

/* Maximum number of times to poll for acknowledge after write */
#if defined(CONFIG_SYS_EEPROM_X40430)
#define MAX_ACKNOWLEDGE_POLLS	10
#endif

/*
 * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
 *   0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
 *
 * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
 *   0x00000nxx for EEPROM address selectors and page number at n.
 */
#if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
#if !defined(CONFIG_SYS_I2C_EEPROM_ADDR_LEN) || \
    (CONFIG_SYS_I2C_EEPROM_ADDR_LEN < 1) || \
    (CONFIG_SYS_I2C_EEPROM_ADDR_LEN > 2)
#error CONFIG_SYS_I2C_EEPROM_ADDR_LEN must be 1 or 2
#endif
#endif

#if defined(CONFIG_SYS_EEPROM_WREN)
extern int eeprom_write_enable (unsigned dev_addr, int state);
#endif

void eeprom_init(void)
{
	/* SPI EEPROM */
#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
	spi_init_f ();
#endif

	/* I2C EEPROM */
#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT)
	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
#endif
}

int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
{
	unsigned end = offset + cnt;
	unsigned blk_off;
	int rcode = 0;

	/*
	 * Read data until done or would cross a page boundary.
	 * We must write the address again when changing pages
	 * because the next page may be in a different device.
	 */
	while (offset < end) {
		unsigned alen, len;
#if !defined(CONFIG_SYS_I2C_FRAM)
		unsigned maxlen;
#endif

#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
		uchar addr[2];

		blk_off = offset & 0xFF;	/* block offset */

		addr[0] = offset >> 8;		/* block number */
		addr[1] = blk_off;		/* block offset */
		alen	= 2;
#else
		uchar addr[3];

		blk_off = offset & 0xFF;	/* block offset */

		addr[0] = offset >> 16;		/* block number */
		addr[1] = offset >>  8;		/* upper address octet */
		addr[2] = blk_off;		/* lower address octet */
		alen	= 3;
#endif	/* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */

		addr[0] |= dev_addr;		/* insert device address */

		len = end - offset;

		/*
		 * For a FRAM device there is no limit on the number of the
		 * bytes that can be ccessed with the single read or write
		 * operation.
		 */
#if !defined(CONFIG_SYS_I2C_FRAM)
		maxlen = 0x100 - blk_off;
		if (maxlen > I2C_RXTX_LEN)
			maxlen = I2C_RXTX_LEN;
		if (len > maxlen)
			len = maxlen;
#endif

#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
		spi_read (addr, alen, buffer, len);
#else
#if defined(CONFIG_SYS_I2C_EEPROM_BUS)
		i2c_set_bus_num(CONFIG_SYS_I2C_EEPROM_BUS);
#endif
		if (i2c_read(addr[0], offset, alen - 1, buffer, len))
			rcode = 1;
#endif
		buffer += len;
		offset += len;
	}

	return rcode;
}

int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
{
	unsigned end = offset + cnt;
	unsigned blk_off;
	int rcode = 0;

#if defined(CONFIG_SYS_EEPROM_X40430)
	uchar	contr_r_addr[2];
	uchar	addr_void[2];
	uchar	contr_reg[2];
	uchar	ctrl_reg_v;
	int	i;
#endif

#if defined(CONFIG_SYS_EEPROM_WREN)
	eeprom_write_enable (dev_addr,1);
#endif
	/*
	 * Write data until done or would cross a write page boundary.
	 * We must write the address again when changing pages
	 * because the address counter only increments within a page.
	 */

	while (offset < end) {
		unsigned alen, len;
#if !defined(CONFIG_SYS_I2C_FRAM)
		unsigned maxlen;
#endif

#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
		uchar addr[2];

		blk_off = offset & 0xFF;	/* block offset */

		addr[0] = offset >> 8;		/* block number */
		addr[1] = blk_off;		/* block offset */
		alen	= 2;
#else
		uchar addr[3];

		blk_off = offset & 0xFF;	/* block offset */

		addr[0] = offset >> 16;		/* block number */
		addr[1] = offset >>  8;		/* upper address octet */
		addr[2] = blk_off;		/* lower address octet */
		alen	= 3;
#endif	/* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */

		addr[0] |= dev_addr;		/* insert device address */

		len = end - offset;

		/*
		 * For a FRAM device there is no limit on the number of the
		 * bytes that can be accessed with the single read or write
		 * operation.
		 */
#if !defined(CONFIG_SYS_I2C_FRAM)

#if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)

#define	EEPROM_PAGE_SIZE	(1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)
#define	EEPROM_PAGE_OFFSET(x)	((x) & (EEPROM_PAGE_SIZE - 1))

		maxlen = EEPROM_PAGE_SIZE - EEPROM_PAGE_OFFSET(blk_off);
#else
		maxlen = 0x100 - blk_off;
#endif
		if (maxlen > I2C_RXTX_LEN)
			maxlen = I2C_RXTX_LEN;

		if (len > maxlen)
			len = maxlen;
#endif

#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
		spi_write (addr, alen, buffer, len);
#else
#if defined(CONFIG_SYS_EEPROM_X40430)
		/* Get the value of the control register.
		 * Set current address (internal pointer in the x40430)
		 * to 0x1ff.
		 */
		contr_r_addr[0] = 9;
		contr_r_addr[1] = 0xff;
		addr_void[0]    = 0;
		addr_void[1]    = addr[1];
#ifdef CONFIG_SYS_I2C_EEPROM_ADDR
		contr_r_addr[0] |= CONFIG_SYS_I2C_EEPROM_ADDR;
		addr_void[0]    |= CONFIG_SYS_I2C_EEPROM_ADDR;
#endif
		contr_reg[0] = 0xff;
		if (i2c_read (contr_r_addr[0], contr_r_addr[1], 1, contr_reg, 1) != 0) {
			rcode = 1;
		}
		ctrl_reg_v = contr_reg[0];

		/* Are any of the eeprom blocks write protected?
		 */
		if (ctrl_reg_v & 0x18) {
			ctrl_reg_v &= ~0x18;   /* reset block protect bits  */
			ctrl_reg_v |=  0x02;   /* set write enable latch    */
			ctrl_reg_v &= ~0x04;   /* clear RWEL                */

			/* Set write enable latch.
			 */
			contr_reg[0] = 0x02;
			if (i2c_write (contr_r_addr[0], 0xff, 1, contr_reg, 1) != 0) {
				rcode = 1;
			}

			/* Set register write enable latch.
			 */
			contr_reg[0] = 0x06;
			if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
				rcode = 1;
			}

			/* Modify ctrl register.
			 */
			contr_reg[0] = ctrl_reg_v;
			if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
				rcode = 1;
			}

			/* The write (above) is an operation on NV memory.
			 * These can take some time (~5ms), and the device
			 * will not respond to further I2C messages till
			 * it's completed the write.
			 * So poll device for an I2C acknowledge.
			 * When we get one we know we can continue with other
			 * operations.
			 */
			contr_reg[0] = 0;
			for (i = 0; i < MAX_ACKNOWLEDGE_POLLS; i++) {
				if (i2c_read (addr_void[0], addr_void[1], 1, contr_reg, 1) == 0)
					break;	/* got ack */
#if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS)
				udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
#endif
			}
			if (i == MAX_ACKNOWLEDGE_POLLS) {
				puts ("EEPROM poll acknowledge failed\n");
				rcode = 1;
			}
		}

		/* Is the write enable latch on?.
		 */
		else if (!(ctrl_reg_v & 0x02)) {
			/* Set write enable latch.
			 */
			contr_reg[0] = 0x02;
			if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
			       rcode = 1;
			}
		}
		/* Write is enabled ... now write eeprom value.
		 */
#endif
#if defined(CONFIG_SYS_I2C_EEPROM_BUS)
		i2c_set_bus_num(CONFIG_SYS_I2C_EEPROM_BUS);
#endif
		if (i2c_write(addr[0], offset, alen - 1, buffer, len))
			rcode = 1;

#endif
		buffer += len;
		offset += len;

#if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS)
		udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
#endif
	}
#if defined(CONFIG_SYS_EEPROM_WREN)
	eeprom_write_enable (dev_addr,0);
#endif
	return rcode;
}

#if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
int eeprom_probe(unsigned dev_addr, unsigned offset)
{
	unsigned char chip;

	/* Probe the chip address
	 */
#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
	chip = offset >> 8;		/* block number */
#else
	chip = offset >> 16;		/* block number */
#endif	/* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */

	chip |= dev_addr;		/* insert device address */

	return (i2c_probe (chip));
}
#endif

static int do_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	const char *const fmt =
		"\nEEPROM @0x%lX %s: addr %08lx  off %04lx  count %ld ... ";

#if defined(CONFIG_SYS_I2C_MULTI_EEPROMS)
	if (argc == 6) {
		ulong dev_addr = simple_strtoul (argv[2], NULL, 16);
		ulong addr = simple_strtoul (argv[3], NULL, 16);
		ulong off  = simple_strtoul (argv[4], NULL, 16);
		ulong cnt  = simple_strtoul (argv[5], NULL, 16);
#else
	if (argc == 5) {
		ulong dev_addr = CONFIG_SYS_DEF_EEPROM_ADDR;
		ulong addr = simple_strtoul (argv[2], NULL, 16);
		ulong off  = simple_strtoul (argv[3], NULL, 16);
		ulong cnt  = simple_strtoul (argv[4], NULL, 16);
#endif /* CONFIG_SYS_I2C_MULTI_EEPROMS */

# if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
		eeprom_init ();
# endif /* !CONFIG_SPI */

		if (strcmp (argv[1], "read") == 0) {
			int rcode;

			printf (fmt, dev_addr, argv[1], addr, off, cnt);

			rcode = eeprom_read (dev_addr, off, (uchar *) addr, cnt);

			puts ("done\n");
			return rcode;
		} else if (strcmp (argv[1], "write") == 0) {
			int rcode;

			printf (fmt, dev_addr, argv[1], addr, off, cnt);

			rcode = eeprom_write (dev_addr, off, (uchar *) addr, cnt);

			puts ("done\n");
			return rcode;
		}
	}

	return CMD_RET_USAGE;
}

#ifdef CONFIG_SYS_I2C_MULTI_EEPROMS
U_BOOT_CMD(
	eeprom,	6,	1,	do_eeprom,
	"EEPROM sub-system",
	"read  devaddr addr off cnt\n"
	"eeprom write devaddr addr off cnt\n"
	"       - read/write `cnt' bytes from `devaddr` EEPROM at offset `off'"
)
#else /* One EEPROM */
U_BOOT_CMD(
	eeprom,	5,	1,	do_eeprom,
	"EEPROM sub-system",
	"read  addr off cnt\n"
	"eeprom write addr off cnt\n"
	"       - read/write `cnt' bytes at EEPROM offset `off'"
)
#endif /* CONFIG_SYS_I2C_MULTI_EEPROMS */
Commit	Line	Data
3863585b WD	1	/*
	2	* (C) Copyright 2000, 2001
	3	* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
	4	*
1a459660	5	* SPDX-License-Identifier: GPL-2.0+
3863585b WD	6	*/
3863585b WD	7
d4f5c728	8	/*
	9	* Support for read and write access to EEPROM like memory devices. This
	10	* includes regular EEPROM as well as FRAM (ferroelectic nonvolaile RAM).
	11	* FRAM devices read and write data at bus speed. In particular, there is no
e506a006	12	* write delay. Also, there is no limit imposed on the number of bytes that can
d4f5c728	13	* be transferred with a single read or write.
6617aae9	14	*
d4f5c728	15	* Use the following configuration options to ensure no unneeded performance
d4f5c728	16	* degradation (typical for EEPROM) is incured for FRAM memory:
6617aae9	17	*
6d0f6bcf JCPV	18	* #define CONFIG_SYS_I2C_FRAM
6d0f6bcf JCPV	19	* #undef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
d4f5c728	20	*
	21	*/
	22
3863585b WD	23	#include <common.h>
	24	#include <config.h>
	25	#include <command.h>
	26	#include <i2c.h>
	27
4f296d09 MV	28	#ifndef CONFIG_SYS_I2C_SPEED
4f296d09 MV	29	#define CONFIG_SYS_I2C_SPEED 50000
98f4a3df	30	#endif
3863585b	31
4f296d09	32	/* Maximum number of times to poll for acknowledge after write */
6d0f6bcf	33	#if defined(CONFIG_SYS_EEPROM_X40430)
3863585b WD	34	#define MAX_ACKNOWLEDGE_POLLS 10
	35	#endif
	36
4f296d09	37	/*
6d0f6bcf	38	* for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
3863585b WD	39	* 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
3863585b WD	40	*
6d0f6bcf	41	* for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
3863585b WD	42	* 0x00000nxx for EEPROM address selectors and page number at n.
3863585b WD	43	*/
548738b4	44	#if !defined(CONFIG_SPI) \|\| defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
4f296d09 MV	45	#if !defined(CONFIG_SYS_I2C_EEPROM_ADDR_LEN) \|\| \
	46	(CONFIG_SYS_I2C_EEPROM_ADDR_LEN < 1) \|\| \
	47	(CONFIG_SYS_I2C_EEPROM_ADDR_LEN > 2)
6d0f6bcf	48	#error CONFIG_SYS_I2C_EEPROM_ADDR_LEN must be 1 or 2
3863585b WD	49	#endif
	50	#endif
	51
4f296d09 MV	52	#if defined(CONFIG_SYS_EEPROM_WREN)
	53	extern int eeprom_write_enable (unsigned dev_addr, int state);
	54	#endif
	55
	56	void eeprom_init(void)
	57	{
	58	/* SPI EEPROM */
	59	#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
	60	spi_init_f ();
	61	#endif
	62
	63	/* I2C EEPROM */
	64	#if defined(CONFIG_HARD_I2C) \|\| defined(CONFIG_SYS_I2C_SOFT)
	65	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
	66	#endif
	67	}
	68
3863585b WD	69	int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
	70	{
	71	unsigned end = offset + cnt;
	72	unsigned blk_off;
	73	int rcode = 0;
	74
4f296d09 MV	75	/*
4f296d09 MV	76	* Read data until done or would cross a page boundary.
3863585b WD	77	* We must write the address again when changing pages
	78	* because the next page may be in a different device.
	79	*/
	80	while (offset < end) {
d4f5c728	81	unsigned alen, len;
6d0f6bcf	82	#if !defined(CONFIG_SYS_I2C_FRAM)
d4f5c728	83	unsigned maxlen;
	84	#endif
	85
6d0f6bcf	86	#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
3863585b WD	87	uchar addr[2];
	88
	89	blk_off = offset & 0xFF; /* block offset */
	90
	91	addr[0] = offset >> 8; /* block number */
	92	addr[1] = blk_off; /* block offset */
	93	alen = 2;
	94	#else
	95	uchar addr[3];
	96
	97	blk_off = offset & 0xFF; /* block offset */
	98
	99	addr[0] = offset >> 16; /* block number */
	100	addr[1] = offset >> 8; /* upper address octet */
	101	addr[2] = blk_off; /* lower address octet */
	102	alen = 3;
6d0f6bcf	103	#endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
3863585b WD	104
	105	addr[0] \|= dev_addr; /* insert device address */
	106
d4f5c728	107	len = end - offset;
	108
	109	/*
	110	* For a FRAM device there is no limit on the number of the
	111	* bytes that can be ccessed with the single read or write
	112	* operation.
	113	*/
6d0f6bcf	114	#if !defined(CONFIG_SYS_I2C_FRAM)
3863585b WD	115	maxlen = 0x100 - blk_off;
	116	if (maxlen > I2C_RXTX_LEN)
	117	maxlen = I2C_RXTX_LEN;
3863585b WD	118	if (len > maxlen)
3863585b WD	119	len = maxlen;
d4f5c728	120	#endif
d4f5c728	121
548738b4	122	#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
3863585b WD	123	spi_read (addr, alen, buffer, len);
3863585b WD	124	#else
189d257b CG	125	#if defined(CONFIG_SYS_I2C_EEPROM_BUS)
	126	i2c_set_bus_num(CONFIG_SYS_I2C_EEPROM_BUS);
	127	#endif
6ca6d080	128	if (i2c_read(addr[0], offset, alen - 1, buffer, len))
3863585b WD	129	rcode = 1;
	130	#endif
	131	buffer += len;
	132	offset += len;
	133	}
d4f5c728	134
3863585b WD	135	return rcode;
	136	}
	137
3863585b WD	138	int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
	139	{
	140	unsigned end = offset + cnt;
	141	unsigned blk_off;
	142	int rcode = 0;
	143
6d0f6bcf	144	#if defined(CONFIG_SYS_EEPROM_X40430)
3863585b WD	145	uchar contr_r_addr[2];
	146	uchar addr_void[2];
	147	uchar contr_reg[2];
	148	uchar ctrl_reg_v;
	149	int i;
	150	#endif
	151
6d0f6bcf	152	#if defined(CONFIG_SYS_EEPROM_WREN)
98f4a3df SR	153	eeprom_write_enable (dev_addr,1);
98f4a3df SR	154	#endif
4f296d09 MV	155	/*
4f296d09 MV	156	* Write data until done or would cross a write page boundary.
3863585b WD	157	* We must write the address again when changing pages
	158	* because the address counter only increments within a page.
	159	*/
	160
	161	while (offset < end) {
d4f5c728	162	unsigned alen, len;
6d0f6bcf	163	#if !defined(CONFIG_SYS_I2C_FRAM)
d4f5c728	164	unsigned maxlen;
	165	#endif
	166
6d0f6bcf	167	#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
3863585b WD	168	uchar addr[2];
	169
	170	blk_off = offset & 0xFF; /* block offset */
	171
	172	addr[0] = offset >> 8; /* block number */
	173	addr[1] = blk_off; /* block offset */
	174	alen = 2;
	175	#else
	176	uchar addr[3];
	177
	178	blk_off = offset & 0xFF; /* block offset */
	179
	180	addr[0] = offset >> 16; /* block number */
	181	addr[1] = offset >> 8; /* upper address octet */
	182	addr[2] = blk_off; /* lower address octet */
	183	alen = 3;
6d0f6bcf	184	#endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
3863585b WD	185
	186	addr[0] \|= dev_addr; /* insert device address */
	187
d4f5c728	188	len = end - offset;
	189
	190	/*
	191	* For a FRAM device there is no limit on the number of the
f9a78b8d	192	* bytes that can be accessed with the single read or write
d4f5c728	193	* operation.
d4f5c728	194	*/
6d0f6bcf	195	#if !defined(CONFIG_SYS_I2C_FRAM)
d4f5c728	196
6d0f6bcf	197	#if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)
3863585b	198
6d0f6bcf	199	#define EEPROM_PAGE_SIZE (1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)
3863585b WD	200	#define EEPROM_PAGE_OFFSET(x) ((x) & (EEPROM_PAGE_SIZE - 1))
	201
	202	maxlen = EEPROM_PAGE_SIZE - EEPROM_PAGE_OFFSET(blk_off);
	203	#else
	204	maxlen = 0x100 - blk_off;
	205	#endif
	206	if (maxlen > I2C_RXTX_LEN)
	207	maxlen = I2C_RXTX_LEN;
	208
3863585b WD	209	if (len > maxlen)
3863585b WD	210	len = maxlen;
d4f5c728	211	#endif
d4f5c728	212
548738b4	213	#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
3863585b WD	214	spi_write (addr, alen, buffer, len);
3863585b WD	215	#else
6d0f6bcf	216	#if defined(CONFIG_SYS_EEPROM_X40430)
3863585b WD	217	/* Get the value of the control register.
	218	* Set current address (internal pointer in the x40430)
	219	* to 0x1ff.
	220	*/
	221	contr_r_addr[0] = 9;
	222	contr_r_addr[1] = 0xff;
	223	addr_void[0] = 0;
	224	addr_void[1] = addr[1];
6d0f6bcf JCPV	225	#ifdef CONFIG_SYS_I2C_EEPROM_ADDR
	226	contr_r_addr[0] \|= CONFIG_SYS_I2C_EEPROM_ADDR;
	227	addr_void[0] \|= CONFIG_SYS_I2C_EEPROM_ADDR;
3863585b WD	228	#endif
	229	contr_reg[0] = 0xff;
	230	if (i2c_read (contr_r_addr[0], contr_r_addr[1], 1, contr_reg, 1) != 0) {
	231	rcode = 1;
	232	}
	233	ctrl_reg_v = contr_reg[0];
	234
	235	/* Are any of the eeprom blocks write protected?
	236	*/
	237	if (ctrl_reg_v & 0x18) {
	238	ctrl_reg_v &= ~0x18; /* reset block protect bits */
	239	ctrl_reg_v \|= 0x02; /* set write enable latch */
	240	ctrl_reg_v &= ~0x04; /* clear RWEL */
	241
	242	/* Set write enable latch.
	243	*/
	244	contr_reg[0] = 0x02;
	245	if (i2c_write (contr_r_addr[0], 0xff, 1, contr_reg, 1) != 0) {
	246	rcode = 1;
	247	}
	248
	249	/* Set register write enable latch.
	250	*/
	251	contr_reg[0] = 0x06;
	252	if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
	253	rcode = 1;
	254	}
	255
	256	/* Modify ctrl register.
	257	*/
	258	contr_reg[0] = ctrl_reg_v;
	259	if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
	260	rcode = 1;
	261	}
	262
	263	/* The write (above) is an operation on NV memory.
	264	* These can take some time (~5ms), and the device
	265	* will not respond to further I2C messages till
	266	* it's completed the write.
	267	* So poll device for an I2C acknowledge.
	268	* When we get one we know we can continue with other
	269	* operations.
	270	*/
	271	contr_reg[0] = 0;
	272	for (i = 0; i < MAX_ACKNOWLEDGE_POLLS; i++) {
aacf9a49	273	if (i2c_read (addr_void[0], addr_void[1], 1, contr_reg, 1) == 0)
3863585b	274	break; /* got ack */
6d0f6bcf JCPV	275	#if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS)
6d0f6bcf JCPV	276	udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
3863585b WD	277	#endif
	278	}
	279	if (i == MAX_ACKNOWLEDGE_POLLS) {
4b9206ed	280	puts ("EEPROM poll acknowledge failed\n");
3863585b WD	281	rcode = 1;
	282	}
	283	}
	284
	285	/* Is the write enable latch on?.
	286	*/
	287	else if (!(ctrl_reg_v & 0x02)) {
	288	/* Set write enable latch.
	289	*/
	290	contr_reg[0] = 0x02;
	291	if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
	292	rcode = 1;
	293	}
	294	}
	295	/* Write is enabled ... now write eeprom value.
	296	*/
189d257b CG	297	#endif
	298	#if defined(CONFIG_SYS_I2C_EEPROM_BUS)
	299	i2c_set_bus_num(CONFIG_SYS_I2C_EEPROM_BUS);
3863585b	300	#endif
6ca6d080	301	if (i2c_write(addr[0], offset, alen - 1, buffer, len))
3863585b WD	302	rcode = 1;
	303
	304	#endif
	305	buffer += len;
	306	offset += len;
	307
6d0f6bcf JCPV	308	#if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS)
6d0f6bcf JCPV	309	udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
3863585b WD	310	#endif
3863585b WD	311	}
6d0f6bcf	312	#if defined(CONFIG_SYS_EEPROM_WREN)
98f4a3df SR	313	eeprom_write_enable (dev_addr,0);
98f4a3df SR	314	#endif
3863585b WD	315	return rcode;
	316	}
	317
548738b4	318	#if !defined(CONFIG_SPI) \|\| defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
4f296d09	319	int eeprom_probe(unsigned dev_addr, unsigned offset)
6dd652fa WD	320	{
	321	unsigned char chip;
	322
	323	/* Probe the chip address
	324	*/
6d0f6bcf	325	#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
6dd652fa WD	326	chip = offset >> 8; /* block number */
	327	#else
	328	chip = offset >> 16; /* block number */
6d0f6bcf	329	#endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
6dd652fa WD	330
	331	chip \|= dev_addr; /* insert device address */
	332
	333	return (i2c_probe (chip));
	334	}
	335	#endif
	336
4f296d09	337	static int do_eeprom(cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
3863585b	338	{
4f296d09 MV	339	const char *const fmt =
4f296d09 MV	340	"\nEEPROM @0x%lX %s: addr %08lx off %04lx count %ld ... ";
548738b4	341
4f296d09 MV	342	#if defined(CONFIG_SYS_I2C_MULTI_EEPROMS)
	343	if (argc == 6) {
	344	ulong dev_addr = simple_strtoul (argv[2], NULL, 16);
	345	ulong addr = simple_strtoul (argv[3], NULL, 16);
	346	ulong off = simple_strtoul (argv[4], NULL, 16);
	347	ulong cnt = simple_strtoul (argv[5], NULL, 16);
	348	#else
	349	if (argc == 5) {
	350	ulong dev_addr = CONFIG_SYS_DEF_EEPROM_ADDR;
	351	ulong addr = simple_strtoul (argv[2], NULL, 16);
	352	ulong off = simple_strtoul (argv[3], NULL, 16);
	353	ulong cnt = simple_strtoul (argv[4], NULL, 16);
	354	#endif /* CONFIG_SYS_I2C_MULTI_EEPROMS */
548738b4	355
4f296d09 MV	356	# if !defined(CONFIG_SPI) \|\| defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
	357	eeprom_init ();
	358	# endif /* !CONFIG_SPI */
90253178	359
4f296d09 MV	360	if (strcmp (argv[1], "read") == 0) {
	361	int rcode;
	362
	363	printf (fmt, dev_addr, argv[1], addr, off, cnt);
8bde7f77	364
4f296d09 MV	365	rcode = eeprom_read (dev_addr, off, (uchar *) addr, cnt);
	366
	367	puts ("done\n");
	368	return rcode;
	369	} else if (strcmp (argv[1], "write") == 0) {
	370	int rcode;
	371
	372	printf (fmt, dev_addr, argv[1], addr, off, cnt);
	373
	374	rcode = eeprom_write (dev_addr, off, (uchar *) addr, cnt);
	375
	376	puts ("done\n");
	377	return rcode;
	378	}
	379	}
	380
	381	return CMD_RET_USAGE;
	382	}
8bde7f77	383
6d0f6bcf	384	#ifdef CONFIG_SYS_I2C_MULTI_EEPROMS
0d498393 WD	385	U_BOOT_CMD(
0d498393 WD	386	eeprom, 6, 1, do_eeprom,
2fb2604d	387	"EEPROM sub-system",
8bde7f77 WD	388	"read devaddr addr off cnt\n"
8bde7f77 WD	389	"eeprom write devaddr addr off cnt\n"
a89c33db	390	" - read/write `cnt' bytes from `devaddr` EEPROM at offset `off'"
0e350f81	391	)
8bde7f77	392	#else /* One EEPROM */
0d498393 WD	393	U_BOOT_CMD(
0d498393 WD	394	eeprom, 5, 1, do_eeprom,
2fb2604d	395	"EEPROM sub-system",
8bde7f77 WD	396	"read addr off cnt\n"
8bde7f77 WD	397	"eeprom write addr off cnt\n"
a89c33db	398	" - read/write `cnt' bytes at EEPROM offset `off'"
0e350f81	399	)
6d0f6bcf	400	#endif /* CONFIG_SYS_I2C_MULTI_EEPROMS */