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[people/ms/u-boot.git] / drivers / mmc / mmc.c
CommitLineData
272cc70b
AF
1/*
2 * Copyright 2008, Freescale Semiconductor, Inc
3 * Andy Fleming
4 *
5 * Based vaguely on the Linux code
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <config.h>
27#include <common.h>
28#include <command.h>
29#include <mmc.h>
30#include <part.h>
31#include <malloc.h>
32#include <linux/list.h>
9b1f942c 33#include <div64.h>
272cc70b 34
ce0fbcd2
MW
35/* Set block count limit because of 16 bit register limit on some hardware*/
36#ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT
37#define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535
38#endif
39
272cc70b
AF
40static struct list_head mmc_devices;
41static int cur_dev_num = -1;
42
11fdade2
SB
43int __board_mmc_getcd(u8 *cd, struct mmc *mmc) {
44 return -1;
45}
46
47int board_mmc_getcd(u8 *cd, struct mmc *mmc)__attribute__((weak,
48 alias("__board_mmc_getcd")));
49
272cc70b
AF
50int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
51{
5db2fe3a
RR
52#ifdef CONFIG_MMC_TRACE
53 int ret;
54 int i;
55 u8 *ptr;
56
57 printf("CMD_SEND:%d\n", cmd->cmdidx);
58 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
59 printf("\t\tFLAG\t\t\t %d\n", cmd->flags);
60 ret = mmc->send_cmd(mmc, cmd, data);
61 switch (cmd->resp_type) {
62 case MMC_RSP_NONE:
63 printf("\t\tMMC_RSP_NONE\n");
64 break;
65 case MMC_RSP_R1:
66 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
67 cmd->response[0]);
68 break;
69 case MMC_RSP_R1b:
70 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
71 cmd->response[0]);
72 break;
73 case MMC_RSP_R2:
74 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
75 cmd->response[0]);
76 printf("\t\t \t\t 0x%08X \n",
77 cmd->response[1]);
78 printf("\t\t \t\t 0x%08X \n",
79 cmd->response[2]);
80 printf("\t\t \t\t 0x%08X \n",
81 cmd->response[3]);
82 printf("\n");
83 printf("\t\t\t\t\tDUMPING DATA\n");
84 for (i = 0; i < 4; i++) {
85 int j;
86 printf("\t\t\t\t\t%03d - ", i*4);
87 ptr = &cmd->response[i];
88 ptr += 3;
89 for (j = 0; j < 4; j++)
90 printf("%02X ", *ptr--);
91 printf("\n");
92 }
93 break;
94 case MMC_RSP_R3:
95 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
96 cmd->response[0]);
97 break;
98 default:
99 printf("\t\tERROR MMC rsp not supported\n");
100 break;
101 }
102 return ret;
103#else
272cc70b 104 return mmc->send_cmd(mmc, cmd, data);
5db2fe3a 105#endif
272cc70b
AF
106}
107
5d4fc8d9
RR
108int mmc_send_status(struct mmc *mmc, int timeout)
109{
110 struct mmc_cmd cmd;
111 int err;
112#ifdef CONFIG_MMC_TRACE
113 int status;
114#endif
115
116 cmd.cmdidx = MMC_CMD_SEND_STATUS;
117 cmd.resp_type = MMC_RSP_R1;
aaf3d41a
MV
118 if (!mmc_host_is_spi(mmc))
119 cmd.cmdarg = mmc->rca << 16;
5d4fc8d9
RR
120 cmd.flags = 0;
121
122 do {
123 err = mmc_send_cmd(mmc, &cmd, NULL);
124 if (err)
125 return err;
126 else if (cmd.response[0] & MMC_STATUS_RDY_FOR_DATA)
127 break;
128
129 udelay(1000);
130
131 if (cmd.response[0] & MMC_STATUS_MASK) {
132 printf("Status Error: 0x%08X\n", cmd.response[0]);
133 return COMM_ERR;
134 }
135 } while (timeout--);
136
5db2fe3a
RR
137#ifdef CONFIG_MMC_TRACE
138 status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
139 printf("CURR STATE:%d\n", status);
140#endif
5d4fc8d9
RR
141 if (!timeout) {
142 printf("Timeout waiting card ready\n");
143 return TIMEOUT;
144 }
145
146 return 0;
147}
148
272cc70b
AF
149int mmc_set_blocklen(struct mmc *mmc, int len)
150{
151 struct mmc_cmd cmd;
152
153 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
154 cmd.resp_type = MMC_RSP_R1;
155 cmd.cmdarg = len;
156 cmd.flags = 0;
157
158 return mmc_send_cmd(mmc, &cmd, NULL);
159}
160
161struct mmc *find_mmc_device(int dev_num)
162{
163 struct mmc *m;
164 struct list_head *entry;
165
166 list_for_each(entry, &mmc_devices) {
167 m = list_entry(entry, struct mmc, link);
168
169 if (m->block_dev.dev == dev_num)
170 return m;
171 }
172
173 printf("MMC Device %d not found\n", dev_num);
174
175 return NULL;
176}
177
e6f99a56
LW
178static ulong mmc_erase_t(struct mmc *mmc, ulong start, lbaint_t blkcnt)
179{
180 struct mmc_cmd cmd;
181 ulong end;
182 int err, start_cmd, end_cmd;
183
184 if (mmc->high_capacity)
185 end = start + blkcnt - 1;
186 else {
187 end = (start + blkcnt - 1) * mmc->write_bl_len;
188 start *= mmc->write_bl_len;
189 }
190
191 if (IS_SD(mmc)) {
192 start_cmd = SD_CMD_ERASE_WR_BLK_START;
193 end_cmd = SD_CMD_ERASE_WR_BLK_END;
194 } else {
195 start_cmd = MMC_CMD_ERASE_GROUP_START;
196 end_cmd = MMC_CMD_ERASE_GROUP_END;
197 }
198
199 cmd.cmdidx = start_cmd;
200 cmd.cmdarg = start;
201 cmd.resp_type = MMC_RSP_R1;
202 cmd.flags = 0;
203
204 err = mmc_send_cmd(mmc, &cmd, NULL);
205 if (err)
206 goto err_out;
207
208 cmd.cmdidx = end_cmd;
209 cmd.cmdarg = end;
210
211 err = mmc_send_cmd(mmc, &cmd, NULL);
212 if (err)
213 goto err_out;
214
215 cmd.cmdidx = MMC_CMD_ERASE;
216 cmd.cmdarg = SECURE_ERASE;
217 cmd.resp_type = MMC_RSP_R1b;
218
219 err = mmc_send_cmd(mmc, &cmd, NULL);
220 if (err)
221 goto err_out;
222
223 return 0;
224
225err_out:
226 puts("mmc erase failed\n");
227 return err;
228}
229
230static unsigned long
231mmc_berase(int dev_num, unsigned long start, lbaint_t blkcnt)
232{
233 int err = 0;
234 struct mmc *mmc = find_mmc_device(dev_num);
235 lbaint_t blk = 0, blk_r = 0;
236
237 if (!mmc)
238 return -1;
239
240 if ((start % mmc->erase_grp_size) || (blkcnt % mmc->erase_grp_size))
241 printf("\n\nCaution! Your devices Erase group is 0x%x\n"
242 "The erase range would be change to 0x%lx~0x%lx\n\n",
243 mmc->erase_grp_size, start & ~(mmc->erase_grp_size - 1),
244 ((start + blkcnt + mmc->erase_grp_size)
245 & ~(mmc->erase_grp_size - 1)) - 1);
246
247 while (blk < blkcnt) {
248 blk_r = ((blkcnt - blk) > mmc->erase_grp_size) ?
249 mmc->erase_grp_size : (blkcnt - blk);
250 err = mmc_erase_t(mmc, start + blk, blk_r);
251 if (err)
252 break;
253
254 blk += blk_r;
255 }
256
257 return blk;
258}
259
272cc70b 260static ulong
0158126e 261mmc_write_blocks(struct mmc *mmc, ulong start, lbaint_t blkcnt, const void*src)
272cc70b
AF
262{
263 struct mmc_cmd cmd;
264 struct mmc_data data;
5d4fc8d9 265 int timeout = 1000;
272cc70b 266
d2bf29e3 267 if ((start + blkcnt) > mmc->block_dev.lba) {
def412b6 268 printf("MMC: block number 0x%lx exceeds max(0x%lx)\n",
d2bf29e3
LW
269 start + blkcnt, mmc->block_dev.lba);
270 return 0;
271 }
272cc70b
AF
272
273 if (blkcnt > 1)
274 cmd.cmdidx = MMC_CMD_WRITE_MULTIPLE_BLOCK;
275 else
276 cmd.cmdidx = MMC_CMD_WRITE_SINGLE_BLOCK;
277
278 if (mmc->high_capacity)
279 cmd.cmdarg = start;
280 else
def412b6 281 cmd.cmdarg = start * mmc->write_bl_len;
272cc70b
AF
282
283 cmd.resp_type = MMC_RSP_R1;
284 cmd.flags = 0;
285
286 data.src = src;
287 data.blocks = blkcnt;
def412b6 288 data.blocksize = mmc->write_bl_len;
272cc70b
AF
289 data.flags = MMC_DATA_WRITE;
290
def412b6
SS
291 if (mmc_send_cmd(mmc, &cmd, &data)) {
292 printf("mmc write failed\n");
293 return 0;
272cc70b
AF
294 }
295
d52ebf10
TC
296 /* SPI multiblock writes terminate using a special
297 * token, not a STOP_TRANSMISSION request.
298 */
299 if (!mmc_host_is_spi(mmc) && blkcnt > 1) {
272cc70b
AF
300 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
301 cmd.cmdarg = 0;
302 cmd.resp_type = MMC_RSP_R1b;
303 cmd.flags = 0;
def412b6
SS
304 if (mmc_send_cmd(mmc, &cmd, NULL)) {
305 printf("mmc fail to send stop cmd\n");
306 return 0;
0158126e 307 }
5d4fc8d9
RR
308
309 /* Waiting for the ready status */
310 mmc_send_status(mmc, timeout);
272cc70b
AF
311 }
312
313 return blkcnt;
314}
315
0158126e
LW
316static ulong
317mmc_bwrite(int dev_num, ulong start, lbaint_t blkcnt, const void*src)
318{
0158126e
LW
319 lbaint_t cur, blocks_todo = blkcnt;
320
def412b6 321 struct mmc *mmc = find_mmc_device(dev_num);
0158126e 322 if (!mmc)
def412b6 323 return 0;
0158126e 324
def412b6
SS
325 if (mmc_set_blocklen(mmc, mmc->write_bl_len))
326 return 0;
0158126e
LW
327
328 do {
8feafcc4 329 cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo;
0158126e 330 if(mmc_write_blocks(mmc, start, cur, src) != cur)
def412b6 331 return 0;
0158126e
LW
332 blocks_todo -= cur;
333 start += cur;
334 src += cur * mmc->write_bl_len;
335 } while (blocks_todo > 0);
336
337 return blkcnt;
338}
339
4a1a06bc 340int mmc_read_blocks(struct mmc *mmc, void *dst, ulong start, lbaint_t blkcnt)
272cc70b
AF
341{
342 struct mmc_cmd cmd;
343 struct mmc_data data;
5d4fc8d9 344 int timeout = 1000;
272cc70b 345
4a1a06bc
AS
346 if (blkcnt > 1)
347 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
348 else
349 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
272cc70b
AF
350
351 if (mmc->high_capacity)
4a1a06bc 352 cmd.cmdarg = start;
272cc70b 353 else
4a1a06bc 354 cmd.cmdarg = start * mmc->read_bl_len;
272cc70b
AF
355
356 cmd.resp_type = MMC_RSP_R1;
357 cmd.flags = 0;
358
359 data.dest = dst;
4a1a06bc 360 data.blocks = blkcnt;
272cc70b
AF
361 data.blocksize = mmc->read_bl_len;
362 data.flags = MMC_DATA_READ;
363
4a1a06bc
AS
364 if (mmc_send_cmd(mmc, &cmd, &data))
365 return 0;
272cc70b 366
4a1a06bc
AS
367 if (blkcnt > 1) {
368 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
369 cmd.cmdarg = 0;
370 cmd.resp_type = MMC_RSP_R1b;
371 cmd.flags = 0;
372 if (mmc_send_cmd(mmc, &cmd, NULL)) {
373 printf("mmc fail to send stop cmd\n");
374 return 0;
375 }
5d4fc8d9
RR
376
377 /* Waiting for the ready status */
378 mmc_send_status(mmc, timeout);
272cc70b
AF
379 }
380
4a1a06bc 381 return blkcnt;
272cc70b
AF
382}
383
384static ulong mmc_bread(int dev_num, ulong start, lbaint_t blkcnt, void *dst)
385{
4a1a06bc
AS
386 lbaint_t cur, blocks_todo = blkcnt;
387
388 if (blkcnt == 0)
389 return 0;
272cc70b 390
4a1a06bc 391 struct mmc *mmc = find_mmc_device(dev_num);
272cc70b
AF
392 if (!mmc)
393 return 0;
394
d2bf29e3 395 if ((start + blkcnt) > mmc->block_dev.lba) {
4a1a06bc 396 printf("MMC: block number 0x%lx exceeds max(0x%lx)\n",
d2bf29e3
LW
397 start + blkcnt, mmc->block_dev.lba);
398 return 0;
399 }
272cc70b 400
4a1a06bc 401 if (mmc_set_blocklen(mmc, mmc->read_bl_len))
272cc70b 402 return 0;
272cc70b 403
4a1a06bc 404 do {
8feafcc4 405 cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo;
4a1a06bc
AS
406 if(mmc_read_blocks(mmc, dst, start, cur) != cur)
407 return 0;
408 blocks_todo -= cur;
409 start += cur;
410 dst += cur * mmc->read_bl_len;
411 } while (blocks_todo > 0);
272cc70b
AF
412
413 return blkcnt;
414}
415
416int mmc_go_idle(struct mmc* mmc)
417{
418 struct mmc_cmd cmd;
419 int err;
420
421 udelay(1000);
422
423 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
424 cmd.cmdarg = 0;
425 cmd.resp_type = MMC_RSP_NONE;
426 cmd.flags = 0;
427
428 err = mmc_send_cmd(mmc, &cmd, NULL);
429
430 if (err)
431 return err;
432
433 udelay(2000);
434
435 return 0;
436}
437
438int
439sd_send_op_cond(struct mmc *mmc)
440{
441 int timeout = 1000;
442 int err;
443 struct mmc_cmd cmd;
444
445 do {
446 cmd.cmdidx = MMC_CMD_APP_CMD;
447 cmd.resp_type = MMC_RSP_R1;
448 cmd.cmdarg = 0;
449 cmd.flags = 0;
450
451 err = mmc_send_cmd(mmc, &cmd, NULL);
452
453 if (err)
454 return err;
455
456 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
457 cmd.resp_type = MMC_RSP_R3;
250de12b
SB
458
459 /*
460 * Most cards do not answer if some reserved bits
461 * in the ocr are set. However, Some controller
462 * can set bit 7 (reserved for low voltages), but
463 * how to manage low voltages SD card is not yet
464 * specified.
465 */
d52ebf10
TC
466 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
467 (mmc->voltages & 0xff8000);
272cc70b
AF
468
469 if (mmc->version == SD_VERSION_2)
470 cmd.cmdarg |= OCR_HCS;
471
472 err = mmc_send_cmd(mmc, &cmd, NULL);
473
474 if (err)
475 return err;
476
477 udelay(1000);
478 } while ((!(cmd.response[0] & OCR_BUSY)) && timeout--);
479
480 if (timeout <= 0)
481 return UNUSABLE_ERR;
482
483 if (mmc->version != SD_VERSION_2)
484 mmc->version = SD_VERSION_1_0;
485
d52ebf10
TC
486 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
487 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
488 cmd.resp_type = MMC_RSP_R3;
489 cmd.cmdarg = 0;
490 cmd.flags = 0;
491
492 err = mmc_send_cmd(mmc, &cmd, NULL);
493
494 if (err)
495 return err;
496 }
497
998be3dd 498 mmc->ocr = cmd.response[0];
272cc70b
AF
499
500 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
501 mmc->rca = 0;
502
503 return 0;
504}
505
506int mmc_send_op_cond(struct mmc *mmc)
507{
31cacbab 508 int timeout = 10000;
272cc70b
AF
509 struct mmc_cmd cmd;
510 int err;
511
512 /* Some cards seem to need this */
513 mmc_go_idle(mmc);
514
31cacbab
RR
515 /* Asking to the card its capabilities */
516 cmd.cmdidx = MMC_CMD_SEND_OP_COND;
517 cmd.resp_type = MMC_RSP_R3;
518 cmd.cmdarg = 0;
519 cmd.flags = 0;
cd6881b5 520
31cacbab 521 err = mmc_send_cmd(mmc, &cmd, NULL);
cd6881b5 522
31cacbab
RR
523 if (err)
524 return err;
cd6881b5 525
31cacbab 526 udelay(1000);
cd6881b5 527
272cc70b
AF
528 do {
529 cmd.cmdidx = MMC_CMD_SEND_OP_COND;
530 cmd.resp_type = MMC_RSP_R3;
31cacbab
RR
531 cmd.cmdarg = (mmc_host_is_spi(mmc) ? 0 :
532 (mmc->voltages &
533 (cmd.response[0] & OCR_VOLTAGE_MASK)) |
534 (cmd.response[0] & OCR_ACCESS_MODE));
b1f1e821
ŁM
535
536 if (mmc->host_caps & MMC_MODE_HC)
537 cmd.cmdarg |= OCR_HCS;
538
272cc70b
AF
539 cmd.flags = 0;
540
541 err = mmc_send_cmd(mmc, &cmd, NULL);
542
543 if (err)
544 return err;
545
546 udelay(1000);
547 } while (!(cmd.response[0] & OCR_BUSY) && timeout--);
548
549 if (timeout <= 0)
550 return UNUSABLE_ERR;
551
d52ebf10
TC
552 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
553 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
554 cmd.resp_type = MMC_RSP_R3;
555 cmd.cmdarg = 0;
556 cmd.flags = 0;
557
558 err = mmc_send_cmd(mmc, &cmd, NULL);
559
560 if (err)
561 return err;
562 }
563
272cc70b 564 mmc->version = MMC_VERSION_UNKNOWN;
998be3dd 565 mmc->ocr = cmd.response[0];
272cc70b
AF
566
567 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
568 mmc->rca = 0;
569
570 return 0;
571}
572
573
574int mmc_send_ext_csd(struct mmc *mmc, char *ext_csd)
575{
576 struct mmc_cmd cmd;
577 struct mmc_data data;
578 int err;
579
580 /* Get the Card Status Register */
581 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
582 cmd.resp_type = MMC_RSP_R1;
583 cmd.cmdarg = 0;
584 cmd.flags = 0;
585
586 data.dest = ext_csd;
587 data.blocks = 1;
588 data.blocksize = 512;
589 data.flags = MMC_DATA_READ;
590
591 err = mmc_send_cmd(mmc, &cmd, &data);
592
593 return err;
594}
595
596
597int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
598{
599 struct mmc_cmd cmd;
5d4fc8d9
RR
600 int timeout = 1000;
601 int ret;
272cc70b
AF
602
603 cmd.cmdidx = MMC_CMD_SWITCH;
604 cmd.resp_type = MMC_RSP_R1b;
605 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
5d4fc8d9
RR
606 (index << 16) |
607 (value << 8);
272cc70b
AF
608 cmd.flags = 0;
609
5d4fc8d9
RR
610 ret = mmc_send_cmd(mmc, &cmd, NULL);
611
612 /* Waiting for the ready status */
613 mmc_send_status(mmc, timeout);
614
615 return ret;
616
272cc70b
AF
617}
618
619int mmc_change_freq(struct mmc *mmc)
620{
a1969923 621 ALLOC_CACHE_ALIGN_BUFFER(char, ext_csd, 512);
272cc70b
AF
622 char cardtype;
623 int err;
624
625 mmc->card_caps = 0;
626
d52ebf10
TC
627 if (mmc_host_is_spi(mmc))
628 return 0;
629
272cc70b
AF
630 /* Only version 4 supports high-speed */
631 if (mmc->version < MMC_VERSION_4)
632 return 0;
633
634 mmc->card_caps |= MMC_MODE_4BIT;
635
636 err = mmc_send_ext_csd(mmc, ext_csd);
637
638 if (err)
639 return err;
640
272cc70b
AF
641 cardtype = ext_csd[196] & 0xf;
642
643 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
644
645 if (err)
646 return err;
647
648 /* Now check to see that it worked */
649 err = mmc_send_ext_csd(mmc, ext_csd);
650
651 if (err)
652 return err;
653
654 /* No high-speed support */
655 if (!ext_csd[185])
656 return 0;
657
658 /* High Speed is set, there are two types: 52MHz and 26MHz */
659 if (cardtype & MMC_HS_52MHZ)
660 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
661 else
662 mmc->card_caps |= MMC_MODE_HS;
663
664 return 0;
665}
666
bc897b1d
LW
667int mmc_switch_part(int dev_num, unsigned int part_num)
668{
669 struct mmc *mmc = find_mmc_device(dev_num);
670
671 if (!mmc)
672 return -1;
673
674 return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
675 (mmc->part_config & ~PART_ACCESS_MASK)
676 | (part_num & PART_ACCESS_MASK));
677}
678
272cc70b
AF
679int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
680{
681 struct mmc_cmd cmd;
682 struct mmc_data data;
683
684 /* Switch the frequency */
685 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
686 cmd.resp_type = MMC_RSP_R1;
687 cmd.cmdarg = (mode << 31) | 0xffffff;
688 cmd.cmdarg &= ~(0xf << (group * 4));
689 cmd.cmdarg |= value << (group * 4);
690 cmd.flags = 0;
691
692 data.dest = (char *)resp;
693 data.blocksize = 64;
694 data.blocks = 1;
695 data.flags = MMC_DATA_READ;
696
697 return mmc_send_cmd(mmc, &cmd, &data);
698}
699
700
701int sd_change_freq(struct mmc *mmc)
702{
703 int err;
704 struct mmc_cmd cmd;
f781dd38
A
705 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
706 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
272cc70b
AF
707 struct mmc_data data;
708 int timeout;
709
710 mmc->card_caps = 0;
711
d52ebf10
TC
712 if (mmc_host_is_spi(mmc))
713 return 0;
714
272cc70b
AF
715 /* Read the SCR to find out if this card supports higher speeds */
716 cmd.cmdidx = MMC_CMD_APP_CMD;
717 cmd.resp_type = MMC_RSP_R1;
718 cmd.cmdarg = mmc->rca << 16;
719 cmd.flags = 0;
720
721 err = mmc_send_cmd(mmc, &cmd, NULL);
722
723 if (err)
724 return err;
725
726 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
727 cmd.resp_type = MMC_RSP_R1;
728 cmd.cmdarg = 0;
729 cmd.flags = 0;
730
731 timeout = 3;
732
733retry_scr:
f781dd38 734 data.dest = (char *)scr;
272cc70b
AF
735 data.blocksize = 8;
736 data.blocks = 1;
737 data.flags = MMC_DATA_READ;
738
739 err = mmc_send_cmd(mmc, &cmd, &data);
740
741 if (err) {
742 if (timeout--)
743 goto retry_scr;
744
745 return err;
746 }
747
4e3d89ba
YK
748 mmc->scr[0] = __be32_to_cpu(scr[0]);
749 mmc->scr[1] = __be32_to_cpu(scr[1]);
272cc70b
AF
750
751 switch ((mmc->scr[0] >> 24) & 0xf) {
752 case 0:
753 mmc->version = SD_VERSION_1_0;
754 break;
755 case 1:
756 mmc->version = SD_VERSION_1_10;
757 break;
758 case 2:
759 mmc->version = SD_VERSION_2;
760 break;
761 default:
762 mmc->version = SD_VERSION_1_0;
763 break;
764 }
765
b44c7083
AS
766 if (mmc->scr[0] & SD_DATA_4BIT)
767 mmc->card_caps |= MMC_MODE_4BIT;
768
272cc70b
AF
769 /* Version 1.0 doesn't support switching */
770 if (mmc->version == SD_VERSION_1_0)
771 return 0;
772
773 timeout = 4;
774 while (timeout--) {
775 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
f781dd38 776 (u8 *)switch_status);
272cc70b
AF
777
778 if (err)
779 return err;
780
781 /* The high-speed function is busy. Try again */
4e3d89ba 782 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
272cc70b
AF
783 break;
784 }
785
272cc70b 786 /* If high-speed isn't supported, we return */
4e3d89ba 787 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
272cc70b
AF
788 return 0;
789
f781dd38 790 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
272cc70b
AF
791
792 if (err)
793 return err;
794
4e3d89ba 795 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
272cc70b
AF
796 mmc->card_caps |= MMC_MODE_HS;
797
798 return 0;
799}
800
801/* frequency bases */
802/* divided by 10 to be nice to platforms without floating point */
5f837c2c 803static const int fbase[] = {
272cc70b
AF
804 10000,
805 100000,
806 1000000,
807 10000000,
808};
809
810/* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
811 * to platforms without floating point.
812 */
5f837c2c 813static const int multipliers[] = {
272cc70b
AF
814 0, /* reserved */
815 10,
816 12,
817 13,
818 15,
819 20,
820 25,
821 30,
822 35,
823 40,
824 45,
825 50,
826 55,
827 60,
828 70,
829 80,
830};
831
832void mmc_set_ios(struct mmc *mmc)
833{
834 mmc->set_ios(mmc);
835}
836
837void mmc_set_clock(struct mmc *mmc, uint clock)
838{
839 if (clock > mmc->f_max)
840 clock = mmc->f_max;
841
842 if (clock < mmc->f_min)
843 clock = mmc->f_min;
844
845 mmc->clock = clock;
846
847 mmc_set_ios(mmc);
848}
849
850void mmc_set_bus_width(struct mmc *mmc, uint width)
851{
852 mmc->bus_width = width;
853
854 mmc_set_ios(mmc);
855}
856
857int mmc_startup(struct mmc *mmc)
858{
859 int err;
860 uint mult, freq;
639b7827 861 u64 cmult, csize, capacity;
272cc70b 862 struct mmc_cmd cmd;
a1969923 863 ALLOC_CACHE_ALIGN_BUFFER(char, ext_csd, 512);
5d4fc8d9 864 int timeout = 1000;
272cc70b 865
d52ebf10
TC
866#ifdef CONFIG_MMC_SPI_CRC_ON
867 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
868 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
869 cmd.resp_type = MMC_RSP_R1;
870 cmd.cmdarg = 1;
871 cmd.flags = 0;
872 err = mmc_send_cmd(mmc, &cmd, NULL);
873
874 if (err)
875 return err;
876 }
877#endif
878
272cc70b 879 /* Put the Card in Identify Mode */
d52ebf10
TC
880 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
881 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
272cc70b
AF
882 cmd.resp_type = MMC_RSP_R2;
883 cmd.cmdarg = 0;
884 cmd.flags = 0;
885
886 err = mmc_send_cmd(mmc, &cmd, NULL);
887
888 if (err)
889 return err;
890
891 memcpy(mmc->cid, cmd.response, 16);
892
893 /*
894 * For MMC cards, set the Relative Address.
895 * For SD cards, get the Relatvie Address.
896 * This also puts the cards into Standby State
897 */
d52ebf10
TC
898 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
899 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
900 cmd.cmdarg = mmc->rca << 16;
901 cmd.resp_type = MMC_RSP_R6;
902 cmd.flags = 0;
272cc70b 903
d52ebf10 904 err = mmc_send_cmd(mmc, &cmd, NULL);
272cc70b 905
d52ebf10
TC
906 if (err)
907 return err;
272cc70b 908
d52ebf10
TC
909 if (IS_SD(mmc))
910 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
911 }
272cc70b
AF
912
913 /* Get the Card-Specific Data */
914 cmd.cmdidx = MMC_CMD_SEND_CSD;
915 cmd.resp_type = MMC_RSP_R2;
916 cmd.cmdarg = mmc->rca << 16;
917 cmd.flags = 0;
918
919 err = mmc_send_cmd(mmc, &cmd, NULL);
920
5d4fc8d9
RR
921 /* Waiting for the ready status */
922 mmc_send_status(mmc, timeout);
923
272cc70b
AF
924 if (err)
925 return err;
926
998be3dd
RV
927 mmc->csd[0] = cmd.response[0];
928 mmc->csd[1] = cmd.response[1];
929 mmc->csd[2] = cmd.response[2];
930 mmc->csd[3] = cmd.response[3];
272cc70b
AF
931
932 if (mmc->version == MMC_VERSION_UNKNOWN) {
0b453ffe 933 int version = (cmd.response[0] >> 26) & 0xf;
272cc70b
AF
934
935 switch (version) {
936 case 0:
937 mmc->version = MMC_VERSION_1_2;
938 break;
939 case 1:
940 mmc->version = MMC_VERSION_1_4;
941 break;
942 case 2:
943 mmc->version = MMC_VERSION_2_2;
944 break;
945 case 3:
946 mmc->version = MMC_VERSION_3;
947 break;
948 case 4:
949 mmc->version = MMC_VERSION_4;
950 break;
951 default:
952 mmc->version = MMC_VERSION_1_2;
953 break;
954 }
955 }
956
957 /* divide frequency by 10, since the mults are 10x bigger */
0b453ffe
RV
958 freq = fbase[(cmd.response[0] & 0x7)];
959 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
272cc70b
AF
960
961 mmc->tran_speed = freq * mult;
962
998be3dd 963 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
272cc70b
AF
964
965 if (IS_SD(mmc))
966 mmc->write_bl_len = mmc->read_bl_len;
967 else
998be3dd 968 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
272cc70b
AF
969
970 if (mmc->high_capacity) {
971 csize = (mmc->csd[1] & 0x3f) << 16
972 | (mmc->csd[2] & 0xffff0000) >> 16;
973 cmult = 8;
974 } else {
975 csize = (mmc->csd[1] & 0x3ff) << 2
976 | (mmc->csd[2] & 0xc0000000) >> 30;
977 cmult = (mmc->csd[2] & 0x00038000) >> 15;
978 }
979
980 mmc->capacity = (csize + 1) << (cmult + 2);
981 mmc->capacity *= mmc->read_bl_len;
982
983 if (mmc->read_bl_len > 512)
984 mmc->read_bl_len = 512;
985
986 if (mmc->write_bl_len > 512)
987 mmc->write_bl_len = 512;
988
989 /* Select the card, and put it into Transfer Mode */
d52ebf10
TC
990 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
991 cmd.cmdidx = MMC_CMD_SELECT_CARD;
992 cmd.resp_type = MMC_RSP_R1b;
993 cmd.cmdarg = mmc->rca << 16;
994 cmd.flags = 0;
995 err = mmc_send_cmd(mmc, &cmd, NULL);
272cc70b 996
d52ebf10
TC
997 if (err)
998 return err;
999 }
272cc70b 1000
e6f99a56
LW
1001 /*
1002 * For SD, its erase group is always one sector
1003 */
1004 mmc->erase_grp_size = 1;
bc897b1d 1005 mmc->part_config = MMCPART_NOAVAILABLE;
d23e2c09
SG
1006 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
1007 /* check ext_csd version and capacity */
1008 err = mmc_send_ext_csd(mmc, ext_csd);
1009 if (!err & (ext_csd[192] >= 2)) {
639b7827
YS
1010 /*
1011 * According to the JEDEC Standard, the value of
1012 * ext_csd's capacity is valid if the value is more
1013 * than 2GB
1014 */
1015 capacity = ext_csd[212] << 0 | ext_csd[213] << 8 |
1016 ext_csd[214] << 16 | ext_csd[215] << 24;
1017 capacity *= 512;
b1f1e821 1018 if ((capacity >> 20) > 2 * 1024)
639b7827 1019 mmc->capacity = capacity;
d23e2c09 1020 }
bc897b1d 1021
e6f99a56
LW
1022 /*
1023 * Check whether GROUP_DEF is set, if yes, read out
1024 * group size from ext_csd directly, or calculate
1025 * the group size from the csd value.
1026 */
1027 if (ext_csd[175])
1028 mmc->erase_grp_size = ext_csd[224] * 512 * 1024;
1029 else {
1030 int erase_gsz, erase_gmul;
1031 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1032 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1033 mmc->erase_grp_size = (erase_gsz + 1)
1034 * (erase_gmul + 1);
1035 }
1036
bc897b1d
LW
1037 /* store the partition info of emmc */
1038 if (ext_csd[160] & PART_SUPPORT)
1039 mmc->part_config = ext_csd[179];
d23e2c09
SG
1040 }
1041
272cc70b
AF
1042 if (IS_SD(mmc))
1043 err = sd_change_freq(mmc);
1044 else
1045 err = mmc_change_freq(mmc);
1046
1047 if (err)
1048 return err;
1049
1050 /* Restrict card's capabilities by what the host can do */
1051 mmc->card_caps &= mmc->host_caps;
1052
1053 if (IS_SD(mmc)) {
1054 if (mmc->card_caps & MMC_MODE_4BIT) {
1055 cmd.cmdidx = MMC_CMD_APP_CMD;
1056 cmd.resp_type = MMC_RSP_R1;
1057 cmd.cmdarg = mmc->rca << 16;
1058 cmd.flags = 0;
1059
1060 err = mmc_send_cmd(mmc, &cmd, NULL);
1061 if (err)
1062 return err;
1063
1064 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1065 cmd.resp_type = MMC_RSP_R1;
1066 cmd.cmdarg = 2;
1067 cmd.flags = 0;
1068 err = mmc_send_cmd(mmc, &cmd, NULL);
1069 if (err)
1070 return err;
1071
1072 mmc_set_bus_width(mmc, 4);
1073 }
1074
1075 if (mmc->card_caps & MMC_MODE_HS)
1076 mmc_set_clock(mmc, 50000000);
1077 else
1078 mmc_set_clock(mmc, 25000000);
1079 } else {
1080 if (mmc->card_caps & MMC_MODE_4BIT) {
1081 /* Set the card to use 4 bit*/
1082 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1083 EXT_CSD_BUS_WIDTH,
1084 EXT_CSD_BUS_WIDTH_4);
1085
1086 if (err)
1087 return err;
1088
1089 mmc_set_bus_width(mmc, 4);
1090 } else if (mmc->card_caps & MMC_MODE_8BIT) {
1091 /* Set the card to use 8 bit*/
1092 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1093 EXT_CSD_BUS_WIDTH,
1094 EXT_CSD_BUS_WIDTH_8);
1095
1096 if (err)
1097 return err;
1098
1099 mmc_set_bus_width(mmc, 8);
1100 }
1101
1102 if (mmc->card_caps & MMC_MODE_HS) {
1103 if (mmc->card_caps & MMC_MODE_HS_52MHz)
1104 mmc_set_clock(mmc, 52000000);
1105 else
1106 mmc_set_clock(mmc, 26000000);
1107 } else
1108 mmc_set_clock(mmc, 20000000);
1109 }
1110
1111 /* fill in device description */
1112 mmc->block_dev.lun = 0;
1113 mmc->block_dev.type = 0;
1114 mmc->block_dev.blksz = mmc->read_bl_len;
9b1f942c 1115 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
0b453ffe
RV
1116 sprintf(mmc->block_dev.vendor, "Man %06x Snr %08x", mmc->cid[0] >> 8,
1117 (mmc->cid[2] << 8) | (mmc->cid[3] >> 24));
1118 sprintf(mmc->block_dev.product, "%c%c%c%c%c", mmc->cid[0] & 0xff,
1119 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1120 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff);
1121 sprintf(mmc->block_dev.revision, "%d.%d", mmc->cid[2] >> 28,
1122 (mmc->cid[2] >> 24) & 0xf);
272cc70b
AF
1123 init_part(&mmc->block_dev);
1124
1125 return 0;
1126}
1127
1128int mmc_send_if_cond(struct mmc *mmc)
1129{
1130 struct mmc_cmd cmd;
1131 int err;
1132
1133 cmd.cmdidx = SD_CMD_SEND_IF_COND;
1134 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
1135 cmd.cmdarg = ((mmc->voltages & 0xff8000) != 0) << 8 | 0xaa;
1136 cmd.resp_type = MMC_RSP_R7;
1137 cmd.flags = 0;
1138
1139 err = mmc_send_cmd(mmc, &cmd, NULL);
1140
1141 if (err)
1142 return err;
1143
998be3dd 1144 if ((cmd.response[0] & 0xff) != 0xaa)
272cc70b
AF
1145 return UNUSABLE_ERR;
1146 else
1147 mmc->version = SD_VERSION_2;
1148
1149 return 0;
1150}
1151
1152int mmc_register(struct mmc *mmc)
1153{
1154 /* Setup the universal parts of the block interface just once */
1155 mmc->block_dev.if_type = IF_TYPE_MMC;
1156 mmc->block_dev.dev = cur_dev_num++;
1157 mmc->block_dev.removable = 1;
1158 mmc->block_dev.block_read = mmc_bread;
1159 mmc->block_dev.block_write = mmc_bwrite;
e6f99a56 1160 mmc->block_dev.block_erase = mmc_berase;
8feafcc4
JR
1161 if (!mmc->b_max)
1162 mmc->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
272cc70b
AF
1163
1164 INIT_LIST_HEAD (&mmc->link);
1165
1166 list_add_tail (&mmc->link, &mmc_devices);
1167
1168 return 0;
1169}
1170
df3fc526 1171#ifdef CONFIG_PARTITIONS
272cc70b
AF
1172block_dev_desc_t *mmc_get_dev(int dev)
1173{
1174 struct mmc *mmc = find_mmc_device(dev);
1175
e85649c7 1176 return mmc ? &mmc->block_dev : NULL;
272cc70b 1177}
df3fc526 1178#endif
272cc70b
AF
1179
1180int mmc_init(struct mmc *mmc)
1181{
02f3029f 1182 int err, retry = 3;
272cc70b 1183
bc897b1d
LW
1184 if (mmc->has_init)
1185 return 0;
1186
272cc70b
AF
1187 err = mmc->init(mmc);
1188
1189 if (err)
1190 return err;
1191
b86b85e2
IY
1192 mmc_set_bus_width(mmc, 1);
1193 mmc_set_clock(mmc, 1);
1194
272cc70b
AF
1195 /* Reset the Card */
1196 err = mmc_go_idle(mmc);
1197
1198 if (err)
1199 return err;
1200
bc897b1d
LW
1201 /* The internal partition reset to user partition(0) at every CMD0*/
1202 mmc->part_num = 0;
1203
272cc70b 1204 /* Test for SD version 2 */
02f3029f
LW
1205 /*
1206 * retry here for 3 times, as for some controller it has dynamic
1207 * clock gating, and only toggle out clk when the first cmd0 send
1208 * out, while some card strictly obey the 74 clocks rule, the interval
1209 * may not be sufficient between the cmd0 and this cmd8, retry to
1210 * fulfil the clock requirement
1211 */
1212 do {
1213 err = mmc_send_if_cond(mmc);
1214 } while (--retry > 0 && err);
1215
1216 if (err)
1217 return err;
272cc70b 1218
272cc70b
AF
1219 /* Now try to get the SD card's operating condition */
1220 err = sd_send_op_cond(mmc);
1221
1222 /* If the command timed out, we check for an MMC card */
1223 if (err == TIMEOUT) {
1224 err = mmc_send_op_cond(mmc);
1225
1226 if (err) {
1227 printf("Card did not respond to voltage select!\n");
1228 return UNUSABLE_ERR;
1229 }
1230 }
1231
bc897b1d
LW
1232 err = mmc_startup(mmc);
1233 if (err)
1234 mmc->has_init = 0;
1235 else
1236 mmc->has_init = 1;
1237 return err;
272cc70b
AF
1238}
1239
1240/*
1241 * CPU and board-specific MMC initializations. Aliased function
1242 * signals caller to move on
1243 */
1244static int __def_mmc_init(bd_t *bis)
1245{
1246 return -1;
1247}
1248
f9a109b3
PT
1249int cpu_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init")));
1250int board_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init")));
272cc70b
AF
1251
1252void print_mmc_devices(char separator)
1253{
1254 struct mmc *m;
1255 struct list_head *entry;
1256
1257 list_for_each(entry, &mmc_devices) {
1258 m = list_entry(entry, struct mmc, link);
1259
1260 printf("%s: %d", m->name, m->block_dev.dev);
1261
1262 if (entry->next != &mmc_devices)
1263 printf("%c ", separator);
1264 }
1265
1266 printf("\n");
1267}
1268
ea6ebe21
LW
1269int get_mmc_num(void)
1270{
1271 return cur_dev_num;
1272}
1273
272cc70b
AF
1274int mmc_initialize(bd_t *bis)
1275{
1276 INIT_LIST_HEAD (&mmc_devices);
1277 cur_dev_num = 0;
1278
1279 if (board_mmc_init(bis) < 0)
1280 cpu_mmc_init(bis);
1281
1282 print_mmc_devices(',');
1283
1284 return 0;
1285}