[people/ms/u-boot.git] / drivers / serial / ns16550.c

/*
 * COM1 NS16550 support
 * originally from linux source (arch/powerpc/boot/ns16550.c)
 * modified to use CONFIG_SYS_ISA_MEM and new defines
 */

#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
#include <mapmem.h>
#include <ns16550.h>
#include <serial.h>
#include <watchdog.h>
#include <linux/types.h>
#include <asm/io.h>

DECLARE_GLOBAL_DATA_PTR;

#define UART_LCRVAL UART_LCR_8N1		/* 8 data, 1 stop, no parity */
#define UART_MCRVAL (UART_MCR_DTR | \
		     UART_MCR_RTS)		/* RTS/DTR */
#define UART_FCRVAL (UART_FCR_FIFO_EN |	\
		     UART_FCR_RXSR |	\
		     UART_FCR_TXSR)		/* Clear & enable FIFOs */

#ifndef CONFIG_DM_SERIAL
#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
#define serial_out(x, y)	outb(x, (ulong)y)
#define serial_in(y)		inb((ulong)y)
#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
#define serial_out(x, y)	out_be32(y, x)
#define serial_in(y)		in_be32(y)
#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
#define serial_out(x, y)	out_le32(y, x)
#define serial_in(y)		in_le32(y)
#else
#define serial_out(x, y)	writeb(x, y)
#define serial_in(y)		readb(y)
#endif
#endif /* !CONFIG_DM_SERIAL */

#if defined(CONFIG_SOC_KEYSTONE)
#define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE   0
#define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0))
#undef UART_MCRVAL
#ifdef CONFIG_SERIAL_HW_FLOW_CONTROL
#define UART_MCRVAL             (UART_MCR_RTS | UART_MCR_AFE)
#else
#define UART_MCRVAL             (UART_MCR_RTS)
#endif
#endif

#ifndef CONFIG_SYS_NS16550_IER
#define CONFIG_SYS_NS16550_IER  0x00
#endif /* CONFIG_SYS_NS16550_IER */

#ifdef CONFIG_DM_SERIAL

static inline void serial_out_shift(void *addr, int shift, int value)
{
#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
	outb(value, (ulong)addr);
#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
	out_le32(addr, value);
#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
	out_be32(addr, value);
#elif defined(CONFIG_SYS_NS16550_MEM32)
	writel(value, addr);
#elif defined(CONFIG_SYS_BIG_ENDIAN)
	writeb(value, addr + (1 << shift) - 1);
#else
	writeb(value, addr);
#endif
}

static inline int serial_in_shift(void *addr, int shift)
{
#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
	return inb((ulong)addr);
#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
	return in_le32(addr);
#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
	return in_be32(addr);
#elif defined(CONFIG_SYS_NS16550_MEM32)
	return readl(addr);
#elif defined(CONFIG_SYS_BIG_ENDIAN)
	return readb(addr + (1 << shift) - 1);
#else
	return readb(addr);
#endif
}

static void ns16550_writeb(NS16550_t port, int offset, int value)
{
	struct ns16550_platdata *plat = port->plat;
	unsigned char *addr;

	offset *= 1 << plat->reg_shift;
	addr = map_sysmem(plat->base, 0) + offset;
	/*
	 * As far as we know it doesn't make sense to support selection of
	 * these options at run-time, so use the existing CONFIG options.
	 */
	serial_out_shift(addr, plat->reg_shift, value);
}

static int ns16550_readb(NS16550_t port, int offset)
{
	struct ns16550_platdata *plat = port->plat;
	unsigned char *addr;

	offset *= 1 << plat->reg_shift;
	addr = map_sysmem(plat->base, 0) + offset;

	return serial_in_shift(addr, plat->reg_shift);
}

/* We can clean these up once everything is moved to driver model */
#define serial_out(value, addr)	\
	ns16550_writeb(com_port, \
		(unsigned char *)addr - (unsigned char *)com_port, value)
#define serial_in(addr) \
	ns16550_readb(com_port, \
		(unsigned char *)addr - (unsigned char *)com_port)
#endif

static inline int calc_divisor(NS16550_t port, int clock, int baudrate)
{
	const unsigned int mode_x_div = 16;

	return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate);
}

int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate)
{
#ifdef CONFIG_OMAP1510
	/* If can't cleanly clock 115200 set div to 1 */
	if ((clock == 12000000) && (baudrate == 115200)) {
		port->osc_12m_sel = OSC_12M_SEL;  /* enable 6.5 * divisor */
		return 1;			/* return 1 for base divisor */
	}
	port->osc_12m_sel = 0;			/* clear if previsouly set */
#endif

	return calc_divisor(port, clock, baudrate);
}

static void NS16550_setbrg(NS16550_t com_port, int baud_divisor)
{
	serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr);
	serial_out(baud_divisor & 0xff, &com_port->dll);
	serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
	serial_out(UART_LCRVAL, &com_port->lcr);
}

void NS16550_init(NS16550_t com_port, int baud_divisor)
{
#if (defined(CONFIG_SPL_BUILD) && \
		(defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX)))
	/*
	 * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
	 * before SPL starts only THRE bit is set. We have to empty the
	 * transmitter before initialization starts.
	 */
	if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE))
	     == UART_LSR_THRE) {
		if (baud_divisor != -1)
			NS16550_setbrg(com_port, baud_divisor);
		serial_out(0, &com_port->mdr1);
	}
#endif

	while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT))
		;

	serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
#if defined(CONFIG_OMAP) || defined(CONFIG_AM33XX) || \
			defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX)
	serial_out(0x7, &com_port->mdr1);	/* mode select reset TL16C750*/
#endif
	serial_out(UART_MCRVAL, &com_port->mcr);
	serial_out(UART_FCRVAL, &com_port->fcr);
	if (baud_divisor != -1)
		NS16550_setbrg(com_port, baud_divisor);
#if defined(CONFIG_OMAP) || \
	defined(CONFIG_AM33XX) || defined(CONFIG_SOC_DA8XX) || \
	defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX)

	/* /16 is proper to hit 115200 with 48MHz */
	serial_out(0, &com_port->mdr1);
#endif /* CONFIG_OMAP */
#if defined(CONFIG_SOC_KEYSTONE)
	serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC);
#endif
}

#ifndef CONFIG_NS16550_MIN_FUNCTIONS
void NS16550_reinit(NS16550_t com_port, int baud_divisor)
{
	serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
	NS16550_setbrg(com_port, 0);
	serial_out(UART_MCRVAL, &com_port->mcr);
	serial_out(UART_FCRVAL, &com_port->fcr);
	NS16550_setbrg(com_port, baud_divisor);
}
#endif /* CONFIG_NS16550_MIN_FUNCTIONS */

void NS16550_putc(NS16550_t com_port, char c)
{
	while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0)
		;
	serial_out(c, &com_port->thr);

	/*
	 * Call watchdog_reset() upon newline. This is done here in putc
	 * since the environment code uses a single puts() to print the complete
	 * environment upon "printenv". So we can't put this watchdog call
	 * in puts().
	 */
	if (c == '\n')
		WATCHDOG_RESET();
}

#ifndef CONFIG_NS16550_MIN_FUNCTIONS
char NS16550_getc(NS16550_t com_port)
{
	while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) {
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY)
		extern void usbtty_poll(void);
		usbtty_poll();
#endif
		WATCHDOG_RESET();
	}
	return serial_in(&com_port->rbr);
}

int NS16550_tstc(NS16550_t com_port)
{
	return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0;
}

#endif /* CONFIG_NS16550_MIN_FUNCTIONS */

#ifdef CONFIG_DEBUG_UART_NS16550

#include <debug_uart.h>

#define serial_dout(reg, value)	\
	serial_out_shift((char *)com_port + \
		((char *)reg - (char *)com_port) * \
			(1 << CONFIG_DEBUG_UART_SHIFT), \
		CONFIG_DEBUG_UART_SHIFT, value)
#define serial_din(reg) \
	serial_in_shift((char *)com_port + \
		((char *)reg - (char *)com_port) * \
			(1 << CONFIG_DEBUG_UART_SHIFT), \
		CONFIG_DEBUG_UART_SHIFT)

void debug_uart_init(void)
{
	struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
	int baud_divisor;

	/*
	 * We copy the code from above because it is already horribly messy.
	 * Trying to refactor to nicely remove the duplication doesn't seem
	 * feasible. The better fix is to move all users of this driver to
	 * driver model.
	 */
	baud_divisor = calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
				    CONFIG_BAUDRATE);
	serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
	serial_dout(&com_port->mcr, UART_MCRVAL);
	serial_dout(&com_port->fcr, UART_FCRVAL);

	serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
	serial_dout(&com_port->dll, baud_divisor & 0xff);
	serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
	serial_dout(&com_port->lcr, UART_LCRVAL);
}

static inline void _debug_uart_putc(int ch)
{
	struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;

	while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
		;
	serial_dout(&com_port->thr, ch);
}

DEBUG_UART_FUNCS

#endif

#ifdef CONFIG_DM_SERIAL
static int ns16550_serial_putc(struct udevice *dev, const char ch)
{
	struct NS16550 *const com_port = dev_get_priv(dev);

	if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
		return -EAGAIN;
	serial_out(ch, &com_port->thr);

	/*
	 * Call watchdog_reset() upon newline. This is done here in putc
	 * since the environment code uses a single puts() to print the complete
	 * environment upon "printenv". So we can't put this watchdog call
	 * in puts().
	 */
	if (ch == '\n')
		WATCHDOG_RESET();

	return 0;
}

static int ns16550_serial_pending(struct udevice *dev, bool input)
{
	struct NS16550 *const com_port = dev_get_priv(dev);

	if (input)
		return serial_in(&com_port->lsr) & UART_LSR_DR ? 1 : 0;
	else
		return serial_in(&com_port->lsr) & UART_LSR_THRE ? 0 : 1;
}

static int ns16550_serial_getc(struct udevice *dev)
{
	struct NS16550 *const com_port = dev_get_priv(dev);

	if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
		return -EAGAIN;

	return serial_in(&com_port->rbr);
}

static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
{
	struct NS16550 *const com_port = dev_get_priv(dev);
	struct ns16550_platdata *plat = com_port->plat;
	int clock_divisor;

	clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);

	NS16550_setbrg(com_port, clock_divisor);

	return 0;
}

int ns16550_serial_probe(struct udevice *dev)
{
	struct NS16550 *const com_port = dev_get_priv(dev);

	com_port->plat = dev_get_platdata(dev);
	NS16550_init(com_port, -1);

	return 0;
}

#if CONFIG_IS_ENABLED(OF_CONTROL)
int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
{
	struct ns16550_platdata *plat = dev->platdata;
	fdt_addr_t addr;

	/* try Processor Local Bus device first */
	addr = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg");
#ifdef CONFIG_PCI
	if (addr == FDT_ADDR_T_NONE) {
		/* then try pci device */
		struct fdt_pci_addr pci_addr;
		u32 bar;
		int ret;

		/* we prefer to use a memory-mapped register */
		ret = fdtdec_get_pci_addr(gd->fdt_blob, dev->of_offset,
					  FDT_PCI_SPACE_MEM32, "reg",
					  &pci_addr);
		if (ret) {
			/* try if there is any i/o-mapped register */
			ret = fdtdec_get_pci_addr(gd->fdt_blob,
						  dev->of_offset,
						  FDT_PCI_SPACE_IO,
						  "reg", &pci_addr);
			if (ret)
				return ret;
		}

		ret = fdtdec_get_pci_bar32(gd->fdt_blob, dev->of_offset,
					   &pci_addr, &bar);
		if (ret)
			return ret;

		addr = bar;
	}
#endif

	if (addr == FDT_ADDR_T_NONE)
		return -EINVAL;

	plat->base = addr;
	plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
					 "reg-shift", 1);

	return 0;
}
#endif

const struct dm_serial_ops ns16550_serial_ops = {
	.putc = ns16550_serial_putc,
	.pending = ns16550_serial_pending,
	.getc = ns16550_serial_getc,
	.setbrg = ns16550_serial_setbrg,
};
#endif /* CONFIG_DM_SERIAL */
Commit	Line	Data
e85390dc WD	1	/*
e85390dc WD	2	* COM1 NS16550 support
a47a12be	3	* originally from linux source (arch/powerpc/boot/ns16550.c)
6d0f6bcf	4	* modified to use CONFIG_SYS_ISA_MEM and new defines
e85390dc WD	5	*/
e85390dc WD	6
fa54eb12	7	#include <common.h>
12e431b2 SG	8	#include <dm.h>
	9	#include <errno.h>
	10	#include <fdtdec.h>
0eb25b61	11	#include <mapmem.h>
e85390dc	12	#include <ns16550.h>
12e431b2	13	#include <serial.h>
a1b322a9	14	#include <watchdog.h>
167cdad1 GR	15	#include <linux/types.h>
167cdad1 GR	16	#include <asm/io.h>
e85390dc	17
12e431b2 SG	18	DECLARE_GLOBAL_DATA_PTR;
12e431b2 SG	19
200779e3 DZ	20	#define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */
	21	#define UART_MCRVAL (UART_MCR_DTR \| \
	22	UART_MCR_RTS) /* RTS/DTR */
	23	#define UART_FCRVAL (UART_FCR_FIFO_EN \| \
	24	UART_FCR_RXSR \| \
	25	UART_FCR_TXSR) /* Clear & enable FIFOs */
12e431b2 SG	26
12e431b2 SG	27	#ifndef CONFIG_DM_SERIAL
167cdad1	28	#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
f8df9d0d SG	29	#define serial_out(x, y) outb(x, (ulong)y)
f8df9d0d SG	30	#define serial_in(y) inb((ulong)y)
79df1208	31	#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
f8df9d0d SG	32	#define serial_out(x, y) out_be32(y, x)
f8df9d0d SG	33	#define serial_in(y) in_be32(y)
79df1208	34	#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
f8df9d0d SG	35	#define serial_out(x, y) out_le32(y, x)
f8df9d0d SG	36	#define serial_in(y) in_le32(y)
167cdad1	37	#else
f8df9d0d SG	38	#define serial_out(x, y) writeb(x, y)
f8df9d0d SG	39	#define serial_in(y) readb(y)
167cdad1	40	#endif
12e431b2	41	#endif /* !CONFIG_DM_SERIAL */
e85390dc	42
7c387646	43	#if defined(CONFIG_SOC_KEYSTONE)
ef509b90 VA	44	#define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0
ef509b90 VA	45	#define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) \| (1 << 13) \| (1 << 0))
d57dee57 KM	46	#undef UART_MCRVAL
	47	#ifdef CONFIG_SERIAL_HW_FLOW_CONTROL
	48	#define UART_MCRVAL (UART_MCR_RTS \| UART_MCR_AFE)
	49	#else
	50	#define UART_MCRVAL (UART_MCR_RTS)
	51	#endif
ef509b90 VA	52	#endif
ef509b90 VA	53
a160ea0b PW	54	#ifndef CONFIG_SYS_NS16550_IER
	55	#define CONFIG_SYS_NS16550_IER 0x00
	56	#endif /* CONFIG_SYS_NS16550_IER */
	57
12e431b2	58	#ifdef CONFIG_DM_SERIAL
12e431b2	59
363e6da1	60	static inline void serial_out_shift(void *addr, int shift, int value)
76571674	61	{
12e431b2	62	#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
1f77690e	63	outb(value, (ulong)addr);
12e431b2 SG	64	#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
	65	out_le32(addr, value);
	66	#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
	67	out_be32(addr, value);
90914008 SG	68	#elif defined(CONFIG_SYS_NS16550_MEM32)
90914008 SG	69	writel(value, addr);
12e431b2	70	#elif defined(CONFIG_SYS_BIG_ENDIAN)
76571674	71	writeb(value, addr + (1 << shift) - 1);
12e431b2 SG	72	#else
	73	writeb(value, addr);
	74	#endif
	75	}
	76
363e6da1	77	static inline int serial_in_shift(void *addr, int shift)
12e431b2	78	{
12e431b2	79	#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
1f77690e	80	return inb((ulong)addr);
12e431b2 SG	81	#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
	82	return in_le32(addr);
	83	#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
	84	return in_be32(addr);
90914008 SG	85	#elif defined(CONFIG_SYS_NS16550_MEM32)
90914008 SG	86	return readl(addr);
12e431b2	87	#elif defined(CONFIG_SYS_BIG_ENDIAN)
20379c11	88	return readb(addr + (1 << shift) - 1);
12e431b2 SG	89	#else
	90	return readb(addr);
	91	#endif
	92	}
	93
76571674 SG	94	static void ns16550_writeb(NS16550_t port, int offset, int value)
	95	{
	96	struct ns16550_platdata *plat = port->plat;
	97	unsigned char *addr;
	98
	99	offset *= 1 << plat->reg_shift;
	100	addr = map_sysmem(plat->base, 0) + offset;
	101	/*
	102	* As far as we know it doesn't make sense to support selection of
	103	* these options at run-time, so use the existing CONFIG options.
	104	*/
	105	serial_out_shift(addr, plat->reg_shift, value);
	106	}
	107
	108	static int ns16550_readb(NS16550_t port, int offset)
	109	{
	110	struct ns16550_platdata *plat = port->plat;
	111	unsigned char *addr;
	112
	113	offset *= 1 << plat->reg_shift;
	114	addr = map_sysmem(plat->base, 0) + offset;
	115
	116	return serial_in_shift(addr, plat->reg_shift);
	117	}
	118
12e431b2 SG	119	/* We can clean these up once everything is moved to driver model */
12e431b2 SG	120	#define serial_out(value, addr) \
363e6da1 SG	121	ns16550_writeb(com_port, \
363e6da1 SG	122	(unsigned char )addr - (unsigned char )com_port, value)
12e431b2	123	#define serial_in(addr) \
363e6da1 SG	124	ns16550_readb(com_port, \
363e6da1 SG	125	(unsigned char )addr - (unsigned char )com_port)
12e431b2 SG	126	#endif
12e431b2 SG	127
21d00436	128	static inline int calc_divisor(NS16550_t port, int clock, int baudrate)
fa54eb12 SG	129	{
	130	const unsigned int mode_x_div = 16;
	131
21d00436 SG	132	return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate);
	133	}
	134
	135	int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate)
	136	{
fa54eb12 SG	137	#ifdef CONFIG_OMAP1510
	138	/* If can't cleanly clock 115200 set div to 1 */
	139	if ((clock == 12000000) && (baudrate == 115200)) {
	140	port->osc_12m_sel = OSC_12M_SEL; /* enable 6.5 * divisor */
	141	return 1; /* return 1 for base divisor */
	142	}
	143	port->osc_12m_sel = 0; /* clear if previsouly set */
	144	#endif
	145
21d00436	146	return calc_divisor(port, clock, baudrate);
fa54eb12 SG	147	}
fa54eb12 SG	148
8bbe33c8 SG	149	static void NS16550_setbrg(NS16550_t com_port, int baud_divisor)
	150	{
	151	serial_out(UART_LCR_BKSE \| UART_LCRVAL, &com_port->lcr);
	152	serial_out(baud_divisor & 0xff, &com_port->dll);
	153	serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
	154	serial_out(UART_LCRVAL, &com_port->lcr);
	155	}
	156
f8df9d0d	157	void NS16550_init(NS16550_t com_port, int baud_divisor)
e85390dc	158	{
956a8bae GG	159	#if (defined(CONFIG_SPL_BUILD) && \
956a8bae GG	160	(defined(CONFIG_OMAP34XX) \|\| defined(CONFIG_OMAP44XX)))
fd2aeac5	161	/*
956a8bae GG	162	* On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
	163	* before SPL starts only THRE bit is set. We have to empty the
	164	* transmitter before initialization starts.
fd2aeac5 MH	165	*/
	166	if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT \| UART_LSR_THRE))
	167	== UART_LSR_THRE) {
12e431b2 SG	168	if (baud_divisor != -1)
12e431b2 SG	169	NS16550_setbrg(com_port, baud_divisor);
fd2aeac5 MH	170	serial_out(0, &com_port->mdr1);
	171	}
	172	#endif
	173
cb55b332 SW	174	while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT))
	175	;
	176
a160ea0b	177	serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
456ccfdf TR	178	#if defined(CONFIG_OMAP) \|\| defined(CONFIG_AM33XX) \|\| \
456ccfdf TR	179	defined(CONFIG_TI81XX) \|\| defined(CONFIG_AM43XX)
167cdad1	180	serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/
945af8d7	181	#endif
167cdad1 GR	182	serial_out(UART_MCRVAL, &com_port->mcr);
167cdad1 GR	183	serial_out(UART_FCRVAL, &com_port->fcr);
12e431b2 SG	184	if (baud_divisor != -1)
12e431b2 SG	185	NS16550_setbrg(com_port, baud_divisor);
8ac22a60	186	#if defined(CONFIG_OMAP) \|\| \
6213a68f	187	defined(CONFIG_AM33XX) \|\| defined(CONFIG_SOC_DA8XX) \|\| \
9ed6e412	188	defined(CONFIG_TI81XX) \|\| defined(CONFIG_AM43XX)
5289e83a	189
f8df9d0d SG	190	/* /16 is proper to hit 115200 with 48MHz */
f8df9d0d SG	191	serial_out(0, &com_port->mdr1);
b4746d8b	192	#endif /* CONFIG_OMAP */
7c387646	193	#if defined(CONFIG_SOC_KEYSTONE)
ef509b90 VA	194	serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC);
ef509b90 VA	195	#endif
e85390dc WD	196	}
e85390dc WD	197
f5675aa5	198	#ifndef CONFIG_NS16550_MIN_FUNCTIONS
f8df9d0d	199	void NS16550_reinit(NS16550_t com_port, int baud_divisor)
e85390dc	200	{
a160ea0b	201	serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
8bbe33c8	202	NS16550_setbrg(com_port, 0);
167cdad1 GR	203	serial_out(UART_MCRVAL, &com_port->mcr);
167cdad1 GR	204	serial_out(UART_FCRVAL, &com_port->fcr);
8bbe33c8	205	NS16550_setbrg(com_port, baud_divisor);
e85390dc	206	}
f5675aa5	207	#endif /* CONFIG_NS16550_MIN_FUNCTIONS */
e85390dc	208
f8df9d0d	209	void NS16550_putc(NS16550_t com_port, char c)
e85390dc	210	{
f8df9d0d SG	211	while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0)
f8df9d0d SG	212	;
167cdad1	213	serial_out(c, &com_port->thr);
1a2d9b30 SR	214
	215	/*
	216	* Call watchdog_reset() upon newline. This is done here in putc
	217	* since the environment code uses a single puts() to print the complete
	218	* environment upon "printenv". So we can't put this watchdog call
	219	* in puts().
	220	*/
	221	if (c == '\n')
	222	WATCHDOG_RESET();
e85390dc WD	223	}
e85390dc WD	224
f5675aa5	225	#ifndef CONFIG_NS16550_MIN_FUNCTIONS
f8df9d0d	226	char NS16550_getc(NS16550_t com_port)
e85390dc	227	{
167cdad1	228	while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) {
f2041388	229	#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY)
232c150a WD	230	extern void usbtty_poll(void);
	231	usbtty_poll();
	232	#endif
a1b322a9	233	WATCHDOG_RESET();
232c150a	234	}
167cdad1	235	return serial_in(&com_port->rbr);
e85390dc WD	236	}
e85390dc WD	237
f8df9d0d	238	int NS16550_tstc(NS16550_t com_port)
e85390dc	239	{
f8df9d0d	240	return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0;
e85390dc WD	241	}
e85390dc WD	242
f5675aa5	243	#endif /* CONFIG_NS16550_MIN_FUNCTIONS */
12e431b2	244
21d00436 SG	245	#ifdef CONFIG_DEBUG_UART_NS16550
	246
	247	#include <debug_uart.h>
	248
6e780c7a SG	249	#define serial_dout(reg, value) \
	250	serial_out_shift((char *)com_port + \
	251	((char )reg - (char )com_port) * \
	252	(1 << CONFIG_DEBUG_UART_SHIFT), \
	253	CONFIG_DEBUG_UART_SHIFT, value)
	254	#define serial_din(reg) \
	255	serial_in_shift((char *)com_port + \
	256	((char )reg - (char )com_port) * \
	257	(1 << CONFIG_DEBUG_UART_SHIFT), \
	258	CONFIG_DEBUG_UART_SHIFT)
	259
21d00436 SG	260	void debug_uart_init(void)
	261	{
	262	struct NS16550 com_port = (struct NS16550 )CONFIG_DEBUG_UART_BASE;
	263	int baud_divisor;
	264
	265	/*
	266	* We copy the code from above because it is already horribly messy.
	267	* Trying to refactor to nicely remove the duplication doesn't seem
	268	* feasible. The better fix is to move all users of this driver to
	269	* driver model.
	270	*/
	271	baud_divisor = calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
	272	CONFIG_BAUDRATE);
6e780c7a SG	273	serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
	274	serial_dout(&com_port->mcr, UART_MCRVAL);
	275	serial_dout(&com_port->fcr, UART_FCRVAL);
	276
	277	serial_dout(&com_port->lcr, UART_LCR_BKSE \| UART_LCRVAL);
	278	serial_dout(&com_port->dll, baud_divisor & 0xff);
	279	serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
	280	serial_dout(&com_port->lcr, UART_LCRVAL);
21d00436 SG	281	}
	282
	283	static inline void _debug_uart_putc(int ch)
	284	{
	285	struct NS16550 com_port = (struct NS16550 )CONFIG_DEBUG_UART_BASE;
	286
6e780c7a	287	while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
21d00436	288	;
6e780c7a	289	serial_dout(&com_port->thr, ch);
21d00436 SG	290	}
	291
	292	DEBUG_UART_FUNCS
	293
	294	#endif
	295
12e431b2 SG	296	#ifdef CONFIG_DM_SERIAL
	297	static int ns16550_serial_putc(struct udevice *dev, const char ch)
	298	{
	299	struct NS16550 *const com_port = dev_get_priv(dev);
	300
	301	if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
	302	return -EAGAIN;
	303	serial_out(ch, &com_port->thr);
	304
	305	/*
	306	* Call watchdog_reset() upon newline. This is done here in putc
	307	* since the environment code uses a single puts() to print the complete
	308	* environment upon "printenv". So we can't put this watchdog call
	309	* in puts().
	310	*/
	311	if (ch == '\n')
	312	WATCHDOG_RESET();
	313
	314	return 0;
	315	}
	316
	317	static int ns16550_serial_pending(struct udevice *dev, bool input)
	318	{
	319	struct NS16550 *const com_port = dev_get_priv(dev);
	320
	321	if (input)
	322	return serial_in(&com_port->lsr) & UART_LSR_DR ? 1 : 0;
	323	else
	324	return serial_in(&com_port->lsr) & UART_LSR_THRE ? 0 : 1;
	325	}
	326
	327	static int ns16550_serial_getc(struct udevice *dev)
	328	{
	329	struct NS16550 *const com_port = dev_get_priv(dev);
	330
aea2be20	331	if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
12e431b2 SG	332	return -EAGAIN;
	333
	334	return serial_in(&com_port->rbr);
	335	}
	336
	337	static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
	338	{
	339	struct NS16550 *const com_port = dev_get_priv(dev);
	340	struct ns16550_platdata *plat = com_port->plat;
	341	int clock_divisor;
	342
	343	clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);
	344
	345	NS16550_setbrg(com_port, clock_divisor);
	346
	347	return 0;
	348	}
	349
	350	int ns16550_serial_probe(struct udevice *dev)
	351	{
	352	struct NS16550 *const com_port = dev_get_priv(dev);
	353
11c1a878	354	com_port->plat = dev_get_platdata(dev);
12e431b2 SG	355	NS16550_init(com_port, -1);
	356
	357	return 0;
	358	}
	359
0f925822	360	#if CONFIG_IS_ENABLED(OF_CONTROL)
12e431b2 SG	361	int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
12e431b2 SG	362	{
12e431b2 SG	363	struct ns16550_platdata *plat = dev->platdata;
	364	fdt_addr_t addr;
	365
3db886a5	366	/* try Processor Local Bus device first */
12e431b2	367	addr = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg");
3db886a5 BM	368	#ifdef CONFIG_PCI
	369	if (addr == FDT_ADDR_T_NONE) {
	370	/* then try pci device */
	371	struct fdt_pci_addr pci_addr;
	372	u32 bar;
	373	int ret;
	374
	375	/* we prefer to use a memory-mapped register */
	376	ret = fdtdec_get_pci_addr(gd->fdt_blob, dev->of_offset,
	377	FDT_PCI_SPACE_MEM32, "reg",
	378	&pci_addr);
	379	if (ret) {
	380	/* try if there is any i/o-mapped register */
	381	ret = fdtdec_get_pci_addr(gd->fdt_blob,
	382	dev->of_offset,
	383	FDT_PCI_SPACE_IO,
	384	"reg", &pci_addr);
	385	if (ret)
	386	return ret;
	387	}
	388
	389	ret = fdtdec_get_pci_bar32(gd->fdt_blob, dev->of_offset,
	390	&pci_addr, &bar);
	391	if (ret)
	392	return ret;
	393
	394	addr = bar;
	395	}
	396	#endif
	397
12e431b2 SG	398	if (addr == FDT_ADDR_T_NONE)
	399	return -EINVAL;
	400
167efe01	401	plat->base = addr;
12e431b2 SG	402	plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
12e431b2 SG	403	"reg-shift", 1);
12e431b2 SG	404
	405	return 0;
	406	}
11c1a878	407	#endif
12e431b2 SG	408
	409	const struct dm_serial_ops ns16550_serial_ops = {
	410	.putc = ns16550_serial_putc,
	411	.pending = ns16550_serial_pending,
	412	.getc = ns16550_serial_getc,
	413	.setbrg = ns16550_serial_setbrg,
	414	};
	415	#endif /* CONFIG_DM_SERIAL */