[people/ms/u-boot.git] / drivers / serial / ns16550.c

/*
 * COM1 NS16550 support
 * originally from linux source (arch/powerpc/boot/ns16550.c)
 * modified to use CONFIG_SYS_ISA_MEM and new defines
 */

#include <common.h>
#include <dm.h>
#include <errno.h>
#include <fdtdec.h>
#include <ns16550.h>
#include <serial.h>
#include <watchdog.h>
#include <linux/types.h>
#include <asm/io.h>

DECLARE_GLOBAL_DATA_PTR;

#define UART_LCRVAL UART_LCR_8N1		/* 8 data, 1 stop, no parity */
#define UART_MCRVAL (UART_MCR_DTR | \
		     UART_MCR_RTS)		/* RTS/DTR */
#define UART_FCRVAL (UART_FCR_FIFO_EN |	\
		     UART_FCR_RXSR |	\
		     UART_FCR_TXSR)		/* Clear & enable FIFOs */

#ifndef CONFIG_DM_SERIAL
#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
#define serial_out(x, y)	outb(x, (ulong)y)
#define serial_in(y)		inb((ulong)y)
#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
#define serial_out(x, y)	out_be32(y, x)
#define serial_in(y)		in_be32(y)
#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
#define serial_out(x, y)	out_le32(y, x)
#define serial_in(y)		in_le32(y)
#else
#define serial_out(x, y)	writeb(x, y)
#define serial_in(y)		readb(y)
#endif
#endif /* !CONFIG_DM_SERIAL */

#if defined(CONFIG_SOC_KEYSTONE)
#define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE   0
#define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0))
#undef UART_MCRVAL
#ifdef CONFIG_SERIAL_HW_FLOW_CONTROL
#define UART_MCRVAL             (UART_MCR_RTS | UART_MCR_AFE)
#else
#define UART_MCRVAL             (UART_MCR_RTS)
#endif
#endif

#ifndef CONFIG_SYS_NS16550_IER
#define CONFIG_SYS_NS16550_IER  0x00
#endif /* CONFIG_SYS_NS16550_IER */

#ifdef CONFIG_DM_SERIAL

#ifndef CONFIG_SYS_NS16550_CLK
#define CONFIG_SYS_NS16550_CLK  0
#endif

static inline void serial_out_shift(void *addr, int shift, int value)
{
#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
	outb(value, (ulong)addr);
#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
	out_le32(addr, value);
#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
	out_be32(addr, value);
#elif defined(CONFIG_SYS_NS16550_MEM32)
	writel(value, addr);
#elif defined(CONFIG_SYS_BIG_ENDIAN)
	writeb(value, addr + (1 << shift) - 1);
#else
	writeb(value, addr);
#endif
}

static inline int serial_in_shift(void *addr, int shift)
{
#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
	return inb((ulong)addr);
#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
	return in_le32(addr);
#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
	return in_be32(addr);
#elif defined(CONFIG_SYS_NS16550_MEM32)
	return readl(addr);
#elif defined(CONFIG_SYS_BIG_ENDIAN)
	return readb(addr + (1 << shift) - 1);
#else
	return readb(addr);
#endif
}

static void ns16550_writeb(NS16550_t port, int offset, int value)
{
	struct ns16550_platdata *plat = port->plat;
	unsigned char *addr;

	offset *= 1 << plat->reg_shift;
	addr = map_physmem(plat->base, 0, MAP_NOCACHE) + offset;
	/*
	 * As far as we know it doesn't make sense to support selection of
	 * these options at run-time, so use the existing CONFIG options.
	 */
	serial_out_shift(addr + plat->reg_offset, plat->reg_shift, value);
}

static int ns16550_readb(NS16550_t port, int offset)
{
	struct ns16550_platdata *plat = port->plat;
	unsigned char *addr;

	offset *= 1 << plat->reg_shift;
	addr = map_physmem(plat->base, 0, MAP_NOCACHE) + offset;

	return serial_in_shift(addr + plat->reg_offset, plat->reg_shift);
}

/* We can clean these up once everything is moved to driver model */
#define serial_out(value, addr)	\
	ns16550_writeb(com_port, \
		(unsigned char *)addr - (unsigned char *)com_port, value)
#define serial_in(addr) \
	ns16550_readb(com_port, \
		(unsigned char *)addr - (unsigned char *)com_port)
#endif

static inline int calc_divisor(NS16550_t port, int clock, int baudrate)
{
	const unsigned int mode_x_div = 16;

	return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate);
}

int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate)
{
#ifdef CONFIG_OMAP1510
	/* If can't cleanly clock 115200 set div to 1 */
	if ((clock == 12000000) && (baudrate == 115200)) {
		port->osc_12m_sel = OSC_12M_SEL;  /* enable 6.5 * divisor */
		return 1;			/* return 1 for base divisor */
	}
	port->osc_12m_sel = 0;			/* clear if previsouly set */
#endif

	return calc_divisor(port, clock, baudrate);
}

static void NS16550_setbrg(NS16550_t com_port, int baud_divisor)
{
	serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr);
	serial_out(baud_divisor & 0xff, &com_port->dll);
	serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
	serial_out(UART_LCRVAL, &com_port->lcr);
}

void NS16550_init(NS16550_t com_port, int baud_divisor)
{
#if (defined(CONFIG_SPL_BUILD) && \
		(defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX)))
	/*
	 * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
	 * before SPL starts only THRE bit is set. We have to empty the
	 * transmitter before initialization starts.
	 */
	if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE))
	     == UART_LSR_THRE) {
		if (baud_divisor != -1)
			NS16550_setbrg(com_port, baud_divisor);
		serial_out(0, &com_port->mdr1);
	}
#endif

	while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT))
		;

	serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
#if defined(CONFIG_OMAP) || defined(CONFIG_AM33XX) || \
			defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX)
	serial_out(0x7, &com_port->mdr1);	/* mode select reset TL16C750*/
#endif
	serial_out(UART_MCRVAL, &com_port->mcr);
	serial_out(UART_FCRVAL, &com_port->fcr);
	if (baud_divisor != -1)
		NS16550_setbrg(com_port, baud_divisor);
#if defined(CONFIG_OMAP) || \
	defined(CONFIG_AM33XX) || defined(CONFIG_SOC_DA8XX) || \
	defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX)

	/* /16 is proper to hit 115200 with 48MHz */
	serial_out(0, &com_port->mdr1);
#endif /* CONFIG_OMAP */
#if defined(CONFIG_SOC_KEYSTONE)
	serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC);
#endif
}

#ifndef CONFIG_NS16550_MIN_FUNCTIONS
void NS16550_reinit(NS16550_t com_port, int baud_divisor)
{
	serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
	NS16550_setbrg(com_port, 0);
	serial_out(UART_MCRVAL, &com_port->mcr);
	serial_out(UART_FCRVAL, &com_port->fcr);
	NS16550_setbrg(com_port, baud_divisor);
}
#endif /* CONFIG_NS16550_MIN_FUNCTIONS */

void NS16550_putc(NS16550_t com_port, char c)
{
	while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0)
		;
	serial_out(c, &com_port->thr);

	/*
	 * Call watchdog_reset() upon newline. This is done here in putc
	 * since the environment code uses a single puts() to print the complete
	 * environment upon "printenv". So we can't put this watchdog call
	 * in puts().
	 */
	if (c == '\n')
		WATCHDOG_RESET();
}

#ifndef CONFIG_NS16550_MIN_FUNCTIONS
char NS16550_getc(NS16550_t com_port)
{
	while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) {
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY)
		extern void usbtty_poll(void);
		usbtty_poll();
#endif
		WATCHDOG_RESET();
	}
	return serial_in(&com_port->rbr);
}

int NS16550_tstc(NS16550_t com_port)
{
	return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0;
}

#endif /* CONFIG_NS16550_MIN_FUNCTIONS */

#ifdef CONFIG_DEBUG_UART_NS16550

#include <debug_uart.h>

#define serial_dout(reg, value)	\
	serial_out_shift((char *)com_port + \
		((char *)reg - (char *)com_port) * \
			(1 << CONFIG_DEBUG_UART_SHIFT), \
		CONFIG_DEBUG_UART_SHIFT, value)
#define serial_din(reg) \
	serial_in_shift((char *)com_port + \
		((char *)reg - (char *)com_port) * \
			(1 << CONFIG_DEBUG_UART_SHIFT), \
		CONFIG_DEBUG_UART_SHIFT)

static inline void _debug_uart_init(void)
{
	struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;
	int baud_divisor;

	/*
	 * We copy the code from above because it is already horribly messy.
	 * Trying to refactor to nicely remove the duplication doesn't seem
	 * feasible. The better fix is to move all users of this driver to
	 * driver model.
	 */
	baud_divisor = calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
				    CONFIG_BAUDRATE);
	serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
	serial_dout(&com_port->mcr, UART_MCRVAL);
	serial_dout(&com_port->fcr, UART_FCRVAL);

	serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
	serial_dout(&com_port->dll, baud_divisor & 0xff);
	serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
	serial_dout(&com_port->lcr, UART_LCRVAL);
}

static inline void _debug_uart_putc(int ch)
{
	struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE;

	while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
		;
	serial_dout(&com_port->thr, ch);
}

DEBUG_UART_FUNCS

#endif

#ifdef CONFIG_DM_SERIAL
static int ns16550_serial_putc(struct udevice *dev, const char ch)
{
	struct NS16550 *const com_port = dev_get_priv(dev);

	if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
		return -EAGAIN;
	serial_out(ch, &com_port->thr);

	/*
	 * Call watchdog_reset() upon newline. This is done here in putc
	 * since the environment code uses a single puts() to print the complete
	 * environment upon "printenv". So we can't put this watchdog call
	 * in puts().
	 */
	if (ch == '\n')
		WATCHDOG_RESET();

	return 0;
}

static int ns16550_serial_pending(struct udevice *dev, bool input)
{
	struct NS16550 *const com_port = dev_get_priv(dev);

	if (input)
		return serial_in(&com_port->lsr) & UART_LSR_DR ? 1 : 0;
	else
		return serial_in(&com_port->lsr) & UART_LSR_THRE ? 0 : 1;
}

static int ns16550_serial_getc(struct udevice *dev)
{
	struct NS16550 *const com_port = dev_get_priv(dev);

	if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
		return -EAGAIN;

	return serial_in(&com_port->rbr);
}

static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
{
	struct NS16550 *const com_port = dev_get_priv(dev);
	struct ns16550_platdata *plat = com_port->plat;
	int clock_divisor;

	clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);

	NS16550_setbrg(com_port, clock_divisor);

	return 0;
}

int ns16550_serial_probe(struct udevice *dev)
{
	struct NS16550 *const com_port = dev_get_priv(dev);

	com_port->plat = dev_get_platdata(dev);
	NS16550_init(com_port, -1);

	return 0;
}

#if CONFIG_IS_ENABLED(OF_CONTROL)
int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
{
	struct ns16550_platdata *plat = dev->platdata;
	fdt_addr_t addr;

	/* try Processor Local Bus device first */
	addr = dev_get_addr(dev);
#if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
	if (addr == FDT_ADDR_T_NONE) {
		/* then try pci device */
		struct fdt_pci_addr pci_addr;
		u32 bar;
		int ret;

		/* we prefer to use a memory-mapped register */
		ret = fdtdec_get_pci_addr(gd->fdt_blob, dev->of_offset,
					  FDT_PCI_SPACE_MEM32, "reg",
					  &pci_addr);
		if (ret) {
			/* try if there is any i/o-mapped register */
			ret = fdtdec_get_pci_addr(gd->fdt_blob,
						  dev->of_offset,
						  FDT_PCI_SPACE_IO,
						  "reg", &pci_addr);
			if (ret)
				return ret;
		}

		ret = fdtdec_get_pci_bar32(dev, &pci_addr, &bar);
		if (ret)
			return ret;

		addr = bar;
	}
#endif

	if (addr == FDT_ADDR_T_NONE)
		return -EINVAL;

	plat->base = addr;
	plat->reg_offset = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
				     "reg-offset", 0);
	plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
					 "reg-shift", 0);
	plat->clock = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
				     "clock-frequency",
				     CONFIG_SYS_NS16550_CLK);
	if (!plat->clock) {
		debug("ns16550 clock not defined\n");
		return -EINVAL;
	}

	return 0;
}
#endif

const struct dm_serial_ops ns16550_serial_ops = {
	.putc = ns16550_serial_putc,
	.pending = ns16550_serial_pending,
	.getc = ns16550_serial_getc,
	.setbrg = ns16550_serial_setbrg,
};

#if CONFIG_IS_ENABLED(OF_CONTROL)
/*
 * Please consider existing compatible strings before adding a new
 * one to keep this table compact. Or you may add a generic "ns16550"
 * compatible string to your dts.
 */
static const struct udevice_id ns16550_serial_ids[] = {
	{ .compatible = "ns16550" },
	{ .compatible = "ns16550a" },
	{ .compatible = "nvidia,tegra20-uart" },
	{ .compatible = "snps,dw-apb-uart" },
	{ .compatible = "ti,omap2-uart" },
	{ .compatible = "ti,omap3-uart" },
	{ .compatible = "ti,omap4-uart" },
	{ .compatible = "ti,am3352-uart" },
	{ .compatible = "ti,am4372-uart" },
	{ .compatible = "ti,dra742-uart" },
	{}
};
#endif

#if CONFIG_IS_ENABLED(SERIAL_PRESENT)
U_BOOT_DRIVER(ns16550_serial) = {
	.name	= "ns16550_serial",
	.id	= UCLASS_SERIAL,
#if CONFIG_IS_ENABLED(OF_CONTROL)
	.of_match = ns16550_serial_ids,
	.ofdata_to_platdata = ns16550_serial_ofdata_to_platdata,
	.platdata_auto_alloc_size = sizeof(struct ns16550_platdata),
#endif
	.priv_auto_alloc_size = sizeof(struct NS16550),
	.probe = ns16550_serial_probe,
	.ops	= &ns16550_serial_ops,
	.flags	= DM_FLAG_PRE_RELOC,
};
#endif
#endif /* CONFIG_DM_SERIAL */
Commit	Line	Data
e85390dc WD	1	/*
e85390dc WD	2	* COM1 NS16550 support
a47a12be	3	* originally from linux source (arch/powerpc/boot/ns16550.c)
6d0f6bcf	4	* modified to use CONFIG_SYS_ISA_MEM and new defines
e85390dc WD	5	*/
e85390dc WD	6
fa54eb12	7	#include <common.h>
12e431b2 SG	8	#include <dm.h>
	9	#include <errno.h>
	10	#include <fdtdec.h>
e85390dc	11	#include <ns16550.h>
12e431b2	12	#include <serial.h>
a1b322a9	13	#include <watchdog.h>
167cdad1 GR	14	#include <linux/types.h>
167cdad1 GR	15	#include <asm/io.h>
e85390dc	16
12e431b2 SG	17	DECLARE_GLOBAL_DATA_PTR;
12e431b2 SG	18
200779e3 DZ	19	#define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */
	20	#define UART_MCRVAL (UART_MCR_DTR \| \
	21	UART_MCR_RTS) /* RTS/DTR */
	22	#define UART_FCRVAL (UART_FCR_FIFO_EN \| \
	23	UART_FCR_RXSR \| \
	24	UART_FCR_TXSR) /* Clear & enable FIFOs */
12e431b2 SG	25
12e431b2 SG	26	#ifndef CONFIG_DM_SERIAL
167cdad1	27	#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
f8df9d0d SG	28	#define serial_out(x, y) outb(x, (ulong)y)
f8df9d0d SG	29	#define serial_in(y) inb((ulong)y)
79df1208	30	#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
f8df9d0d SG	31	#define serial_out(x, y) out_be32(y, x)
f8df9d0d SG	32	#define serial_in(y) in_be32(y)
79df1208	33	#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
f8df9d0d SG	34	#define serial_out(x, y) out_le32(y, x)
f8df9d0d SG	35	#define serial_in(y) in_le32(y)
167cdad1	36	#else
f8df9d0d SG	37	#define serial_out(x, y) writeb(x, y)
f8df9d0d SG	38	#define serial_in(y) readb(y)
167cdad1	39	#endif
12e431b2	40	#endif /* !CONFIG_DM_SERIAL */
e85390dc	41
7c387646	42	#if defined(CONFIG_SOC_KEYSTONE)
ef509b90 VA	43	#define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0
ef509b90 VA	44	#define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) \| (1 << 13) \| (1 << 0))
d57dee57 KM	45	#undef UART_MCRVAL
	46	#ifdef CONFIG_SERIAL_HW_FLOW_CONTROL
	47	#define UART_MCRVAL (UART_MCR_RTS \| UART_MCR_AFE)
	48	#else
	49	#define UART_MCRVAL (UART_MCR_RTS)
	50	#endif
ef509b90 VA	51	#endif
ef509b90 VA	52
a160ea0b PW	53	#ifndef CONFIG_SYS_NS16550_IER
	54	#define CONFIG_SYS_NS16550_IER 0x00
	55	#endif /* CONFIG_SYS_NS16550_IER */
	56
12e431b2	57	#ifdef CONFIG_DM_SERIAL
12e431b2	58
8e62d32e TC	59	#ifndef CONFIG_SYS_NS16550_CLK
	60	#define CONFIG_SYS_NS16550_CLK 0
	61	#endif
	62
363e6da1	63	static inline void serial_out_shift(void *addr, int shift, int value)
76571674	64	{
12e431b2	65	#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
1f77690e	66	outb(value, (ulong)addr);
12e431b2 SG	67	#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
	68	out_le32(addr, value);
	69	#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
	70	out_be32(addr, value);
90914008 SG	71	#elif defined(CONFIG_SYS_NS16550_MEM32)
90914008 SG	72	writel(value, addr);
12e431b2	73	#elif defined(CONFIG_SYS_BIG_ENDIAN)
76571674	74	writeb(value, addr + (1 << shift) - 1);
12e431b2 SG	75	#else
	76	writeb(value, addr);
	77	#endif
	78	}
	79
363e6da1	80	static inline int serial_in_shift(void *addr, int shift)
12e431b2	81	{
12e431b2	82	#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
1f77690e	83	return inb((ulong)addr);
12e431b2 SG	84	#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN)
	85	return in_le32(addr);
	86	#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
	87	return in_be32(addr);
90914008 SG	88	#elif defined(CONFIG_SYS_NS16550_MEM32)
90914008 SG	89	return readl(addr);
12e431b2	90	#elif defined(CONFIG_SYS_BIG_ENDIAN)
20379c11	91	return readb(addr + (1 << shift) - 1);
12e431b2 SG	92	#else
	93	return readb(addr);
	94	#endif
	95	}
	96
76571674 SG	97	static void ns16550_writeb(NS16550_t port, int offset, int value)
	98	{
	99	struct ns16550_platdata *plat = port->plat;
	100	unsigned char *addr;
	101
	102	offset *= 1 << plat->reg_shift;
77d7b5cd	103	addr = map_physmem(plat->base, 0, MAP_NOCACHE) + offset;
76571674 SG	104	/*
	105	* As far as we know it doesn't make sense to support selection of
	106	* these options at run-time, so use the existing CONFIG options.
	107	*/
59b35ddd	108	serial_out_shift(addr + plat->reg_offset, plat->reg_shift, value);
76571674 SG	109	}
	110
	111	static int ns16550_readb(NS16550_t port, int offset)
	112	{
	113	struct ns16550_platdata *plat = port->plat;
	114	unsigned char *addr;
	115
	116	offset *= 1 << plat->reg_shift;
77d7b5cd	117	addr = map_physmem(plat->base, 0, MAP_NOCACHE) + offset;
76571674	118
59b35ddd	119	return serial_in_shift(addr + plat->reg_offset, plat->reg_shift);
76571674 SG	120	}
76571674 SG	121
12e431b2 SG	122	/* We can clean these up once everything is moved to driver model */
12e431b2 SG	123	#define serial_out(value, addr) \
363e6da1 SG	124	ns16550_writeb(com_port, \
363e6da1 SG	125	(unsigned char )addr - (unsigned char )com_port, value)
12e431b2	126	#define serial_in(addr) \
363e6da1 SG	127	ns16550_readb(com_port, \
363e6da1 SG	128	(unsigned char )addr - (unsigned char )com_port)
12e431b2 SG	129	#endif
12e431b2 SG	130
21d00436	131	static inline int calc_divisor(NS16550_t port, int clock, int baudrate)
fa54eb12 SG	132	{
	133	const unsigned int mode_x_div = 16;
	134
21d00436 SG	135	return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate);
	136	}
	137
	138	int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate)
	139	{
fa54eb12 SG	140	#ifdef CONFIG_OMAP1510
	141	/* If can't cleanly clock 115200 set div to 1 */
	142	if ((clock == 12000000) && (baudrate == 115200)) {
	143	port->osc_12m_sel = OSC_12M_SEL; /* enable 6.5 * divisor */
	144	return 1; /* return 1 for base divisor */
	145	}
	146	port->osc_12m_sel = 0; /* clear if previsouly set */
	147	#endif
	148
21d00436	149	return calc_divisor(port, clock, baudrate);
fa54eb12 SG	150	}
fa54eb12 SG	151
8bbe33c8 SG	152	static void NS16550_setbrg(NS16550_t com_port, int baud_divisor)
	153	{
	154	serial_out(UART_LCR_BKSE \| UART_LCRVAL, &com_port->lcr);
	155	serial_out(baud_divisor & 0xff, &com_port->dll);
	156	serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
	157	serial_out(UART_LCRVAL, &com_port->lcr);
	158	}
	159
f8df9d0d	160	void NS16550_init(NS16550_t com_port, int baud_divisor)
e85390dc	161	{
956a8bae GG	162	#if (defined(CONFIG_SPL_BUILD) && \
956a8bae GG	163	(defined(CONFIG_OMAP34XX) \|\| defined(CONFIG_OMAP44XX)))
fd2aeac5	164	/*
956a8bae GG	165	* On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
	166	* before SPL starts only THRE bit is set. We have to empty the
	167	* transmitter before initialization starts.
fd2aeac5 MH	168	*/
	169	if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT \| UART_LSR_THRE))
	170	== UART_LSR_THRE) {
12e431b2 SG	171	if (baud_divisor != -1)
12e431b2 SG	172	NS16550_setbrg(com_port, baud_divisor);
fd2aeac5 MH	173	serial_out(0, &com_port->mdr1);
	174	}
	175	#endif
	176
cb55b332 SW	177	while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT))
	178	;
	179
a160ea0b	180	serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
456ccfdf TR	181	#if defined(CONFIG_OMAP) \|\| defined(CONFIG_AM33XX) \|\| \
456ccfdf TR	182	defined(CONFIG_TI81XX) \|\| defined(CONFIG_AM43XX)
167cdad1	183	serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/
945af8d7	184	#endif
167cdad1 GR	185	serial_out(UART_MCRVAL, &com_port->mcr);
167cdad1 GR	186	serial_out(UART_FCRVAL, &com_port->fcr);
12e431b2 SG	187	if (baud_divisor != -1)
12e431b2 SG	188	NS16550_setbrg(com_port, baud_divisor);
8ac22a60	189	#if defined(CONFIG_OMAP) \|\| \
6213a68f	190	defined(CONFIG_AM33XX) \|\| defined(CONFIG_SOC_DA8XX) \|\| \
9ed6e412	191	defined(CONFIG_TI81XX) \|\| defined(CONFIG_AM43XX)
5289e83a	192
f8df9d0d SG	193	/* /16 is proper to hit 115200 with 48MHz */
f8df9d0d SG	194	serial_out(0, &com_port->mdr1);
b4746d8b	195	#endif /* CONFIG_OMAP */
7c387646	196	#if defined(CONFIG_SOC_KEYSTONE)
ef509b90 VA	197	serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC);
ef509b90 VA	198	#endif
e85390dc WD	199	}
e85390dc WD	200
f5675aa5	201	#ifndef CONFIG_NS16550_MIN_FUNCTIONS
f8df9d0d	202	void NS16550_reinit(NS16550_t com_port, int baud_divisor)
e85390dc	203	{
a160ea0b	204	serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
8bbe33c8	205	NS16550_setbrg(com_port, 0);
167cdad1 GR	206	serial_out(UART_MCRVAL, &com_port->mcr);
167cdad1 GR	207	serial_out(UART_FCRVAL, &com_port->fcr);
8bbe33c8	208	NS16550_setbrg(com_port, baud_divisor);
e85390dc	209	}
f5675aa5	210	#endif /* CONFIG_NS16550_MIN_FUNCTIONS */
e85390dc	211
f8df9d0d	212	void NS16550_putc(NS16550_t com_port, char c)
e85390dc	213	{
f8df9d0d SG	214	while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0)
f8df9d0d SG	215	;
167cdad1	216	serial_out(c, &com_port->thr);
1a2d9b30 SR	217
	218	/*
	219	* Call watchdog_reset() upon newline. This is done here in putc
	220	* since the environment code uses a single puts() to print the complete
	221	* environment upon "printenv". So we can't put this watchdog call
	222	* in puts().
	223	*/
	224	if (c == '\n')
	225	WATCHDOG_RESET();
e85390dc WD	226	}
e85390dc WD	227
f5675aa5	228	#ifndef CONFIG_NS16550_MIN_FUNCTIONS
f8df9d0d	229	char NS16550_getc(NS16550_t com_port)
e85390dc	230	{
167cdad1	231	while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) {
f2041388	232	#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY)
232c150a WD	233	extern void usbtty_poll(void);
	234	usbtty_poll();
	235	#endif
a1b322a9	236	WATCHDOG_RESET();
232c150a	237	}
167cdad1	238	return serial_in(&com_port->rbr);
e85390dc WD	239	}
e85390dc WD	240
f8df9d0d	241	int NS16550_tstc(NS16550_t com_port)
e85390dc	242	{
f8df9d0d	243	return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0;
e85390dc WD	244	}
e85390dc WD	245
f5675aa5	246	#endif /* CONFIG_NS16550_MIN_FUNCTIONS */
12e431b2	247
21d00436 SG	248	#ifdef CONFIG_DEBUG_UART_NS16550
	249
	250	#include <debug_uart.h>
	251
6e780c7a SG	252	#define serial_dout(reg, value) \
	253	serial_out_shift((char *)com_port + \
	254	((char )reg - (char )com_port) * \
	255	(1 << CONFIG_DEBUG_UART_SHIFT), \
	256	CONFIG_DEBUG_UART_SHIFT, value)
	257	#define serial_din(reg) \
	258	serial_in_shift((char *)com_port + \
	259	((char )reg - (char )com_port) * \
	260	(1 << CONFIG_DEBUG_UART_SHIFT), \
	261	CONFIG_DEBUG_UART_SHIFT)
	262
97b05973	263	static inline void _debug_uart_init(void)
21d00436 SG	264	{
	265	struct NS16550 com_port = (struct NS16550 )CONFIG_DEBUG_UART_BASE;
	266	int baud_divisor;
	267
	268	/*
	269	* We copy the code from above because it is already horribly messy.
	270	* Trying to refactor to nicely remove the duplication doesn't seem
	271	* feasible. The better fix is to move all users of this driver to
	272	* driver model.
	273	*/
	274	baud_divisor = calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
	275	CONFIG_BAUDRATE);
6e780c7a SG	276	serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
	277	serial_dout(&com_port->mcr, UART_MCRVAL);
	278	serial_dout(&com_port->fcr, UART_FCRVAL);
	279
	280	serial_dout(&com_port->lcr, UART_LCR_BKSE \| UART_LCRVAL);
	281	serial_dout(&com_port->dll, baud_divisor & 0xff);
	282	serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
	283	serial_dout(&com_port->lcr, UART_LCRVAL);
21d00436 SG	284	}
	285
	286	static inline void _debug_uart_putc(int ch)
	287	{
	288	struct NS16550 com_port = (struct NS16550 )CONFIG_DEBUG_UART_BASE;
	289
6e780c7a	290	while (!(serial_din(&com_port->lsr) & UART_LSR_THRE))
21d00436	291	;
6e780c7a	292	serial_dout(&com_port->thr, ch);
21d00436 SG	293	}
	294
	295	DEBUG_UART_FUNCS
	296
	297	#endif
	298
12e431b2 SG	299	#ifdef CONFIG_DM_SERIAL
	300	static int ns16550_serial_putc(struct udevice *dev, const char ch)
	301	{
	302	struct NS16550 *const com_port = dev_get_priv(dev);
	303
	304	if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
	305	return -EAGAIN;
	306	serial_out(ch, &com_port->thr);
	307
	308	/*
	309	* Call watchdog_reset() upon newline. This is done here in putc
	310	* since the environment code uses a single puts() to print the complete
	311	* environment upon "printenv". So we can't put this watchdog call
	312	* in puts().
	313	*/
	314	if (ch == '\n')
	315	WATCHDOG_RESET();
	316
	317	return 0;
	318	}
	319
	320	static int ns16550_serial_pending(struct udevice *dev, bool input)
	321	{
	322	struct NS16550 *const com_port = dev_get_priv(dev);
	323
	324	if (input)
	325	return serial_in(&com_port->lsr) & UART_LSR_DR ? 1 : 0;
	326	else
	327	return serial_in(&com_port->lsr) & UART_LSR_THRE ? 0 : 1;
	328	}
	329
	330	static int ns16550_serial_getc(struct udevice *dev)
	331	{
	332	struct NS16550 *const com_port = dev_get_priv(dev);
	333
aea2be20	334	if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
12e431b2 SG	335	return -EAGAIN;
	336
	337	return serial_in(&com_port->rbr);
	338	}
	339
	340	static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
	341	{
	342	struct NS16550 *const com_port = dev_get_priv(dev);
	343	struct ns16550_platdata *plat = com_port->plat;
	344	int clock_divisor;
	345
	346	clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);
	347
	348	NS16550_setbrg(com_port, clock_divisor);
	349
	350	return 0;
	351	}
	352
	353	int ns16550_serial_probe(struct udevice *dev)
	354	{
	355	struct NS16550 *const com_port = dev_get_priv(dev);
	356
11c1a878	357	com_port->plat = dev_get_platdata(dev);
12e431b2 SG	358	NS16550_init(com_port, -1);
	359
	360	return 0;
	361	}
	362
0f925822	363	#if CONFIG_IS_ENABLED(OF_CONTROL)
12e431b2 SG	364	int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
12e431b2 SG	365	{
12e431b2 SG	366	struct ns16550_platdata *plat = dev->platdata;
	367	fdt_addr_t addr;
	368
3db886a5	369	/* try Processor Local Bus device first */
4e9838c1	370	addr = dev_get_addr(dev);
fcc0a877	371	#if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
3db886a5 BM	372	if (addr == FDT_ADDR_T_NONE) {
	373	/* then try pci device */
	374	struct fdt_pci_addr pci_addr;
	375	u32 bar;
	376	int ret;
	377
	378	/* we prefer to use a memory-mapped register */
	379	ret = fdtdec_get_pci_addr(gd->fdt_blob, dev->of_offset,
	380	FDT_PCI_SPACE_MEM32, "reg",
	381	&pci_addr);
	382	if (ret) {
	383	/* try if there is any i/o-mapped register */
	384	ret = fdtdec_get_pci_addr(gd->fdt_blob,
	385	dev->of_offset,
	386	FDT_PCI_SPACE_IO,
	387	"reg", &pci_addr);
	388	if (ret)
	389	return ret;
	390	}
	391
fcc0a877	392	ret = fdtdec_get_pci_bar32(dev, &pci_addr, &bar);
3db886a5 BM	393	if (ret)
	394	return ret;
	395
	396	addr = bar;
	397	}
	398	#endif
	399
12e431b2 SG	400	if (addr == FDT_ADDR_T_NONE)
	401	return -EINVAL;
	402
167efe01	403	plat->base = addr;
59b35ddd MS	404	plat->reg_offset = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
59b35ddd MS	405	"reg-offset", 0);
12e431b2	406	plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
80e06146	407	"reg-shift", 0);
8e62d32e TC	408	plat->clock = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
	409	"clock-frequency",
	410	CONFIG_SYS_NS16550_CLK);
	411	if (!plat->clock) {
	412	debug("ns16550 clock not defined\n");
	413	return -EINVAL;
	414	}
12e431b2 SG	415
	416	return 0;
	417	}
11c1a878	418	#endif
12e431b2 SG	419
	420	const struct dm_serial_ops ns16550_serial_ops = {
	421	.putc = ns16550_serial_putc,
	422	.pending = ns16550_serial_pending,
	423	.getc = ns16550_serial_getc,
	424	.setbrg = ns16550_serial_setbrg,
	425	};
8e62d32e	426
8e62d32e	427	#if CONFIG_IS_ENABLED(OF_CONTROL)
cc4228f9 TC	428	/*
	429	* Please consider existing compatible strings before adding a new
	430	* one to keep this table compact. Or you may add a generic "ns16550"
	431	* compatible string to your dts.
	432	*/
8e62d32e TC	433	static const struct udevice_id ns16550_serial_ids[] = {
	434	{ .compatible = "ns16550" },
	435	{ .compatible = "ns16550a" },
	436	{ .compatible = "nvidia,tegra20-uart" },
	437	{ .compatible = "snps,dw-apb-uart" },
	438	{ .compatible = "ti,omap2-uart" },
	439	{ .compatible = "ti,omap3-uart" },
	440	{ .compatible = "ti,omap4-uart" },
	441	{ .compatible = "ti,am3352-uart" },
	442	{ .compatible = "ti,am4372-uart" },
	443	{ .compatible = "ti,dra742-uart" },
	444	{}
	445	};
	446	#endif
	447
b7e29834	448	#if CONFIG_IS_ENABLED(SERIAL_PRESENT)
8e62d32e TC	449	U_BOOT_DRIVER(ns16550_serial) = {
	450	.name = "ns16550_serial",
	451	.id = UCLASS_SERIAL,
	452	#if CONFIG_IS_ENABLED(OF_CONTROL)
	453	.of_match = ns16550_serial_ids,
	454	.ofdata_to_platdata = ns16550_serial_ofdata_to_platdata,
	455	.platdata_auto_alloc_size = sizeof(struct ns16550_platdata),
	456	#endif
	457	.priv_auto_alloc_size = sizeof(struct NS16550),
	458	.probe = ns16550_serial_probe,
	459	.ops = &ns16550_serial_ops,
b7e5a643	460	.flags = DM_FLAG_PRE_RELOC,
8e62d32e	461	};
b7e29834	462	#endif
12e431b2	463	#endif /* CONFIG_DM_SERIAL */