[people/ms/u-boot.git] / include / configs / actux2.h

/*
 * (C) Copyright 2007
 * Michael Schwingen, michael@schwingen.org
 *
 * Configuration settings for the AcTux-2 board.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#define CONFIG_IXP425			1
#define CONFIG_ACTUX2			1

#define	CONFIG_MACH_TYPE		1480

#define CONFIG_DISPLAY_CPUINFO		1
#define CONFIG_DISPLAY_BOARDINFO	1

#define CONFIG_IXP_SERIAL
#define CONFIG_SYS_IXP425_CONSOLE		IXP425_UART2
#define CONFIG_BAUDRATE			115200
#define CONFIG_BOOTDELAY		5
#define CONFIG_ZERO_BOOTDELAY_CHECK	/* check for keypress on bootdelay==0 */
#define CONFIG_BOARD_EARLY_INIT_F	1
#define CONFIG_SYS_LDSCRIPT	"board/actux2/u-boot.lds"

/***************************************************************
 * U-boot generic defines start here.
 ***************************************************************/
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN			(CONFIG_ENV_SIZE + 128*1024)

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE

/* Command line configuration. */
#include <config_cmd_default.h>

#define CONFIG_CMD_ELF
#undef CONFIG_CMD_PCI
#undef CONFIG_PCI

#define CONFIG_BOOTCOMMAND		"run boot_flash"
/* enable passing of ATAGs */
#define CONFIG_CMDLINE_TAG		1
#define CONFIG_SETUP_MEMORY_TAGS	1
#define CONFIG_INITRD_TAG		1
#define CONFIG_REVISION_TAG		1

#if defined(CONFIG_CMD_KGDB)
# define CONFIG_KGDB_BAUDRATE		230400
/* which serial port to use */
# define CONFIG_KGDB_SER_INDEX		1
#endif

/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP
/* Console I/O Buffer Size */
#define CONFIG_SYS_CBSIZE			256
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE			(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
/* max number of command args */
#define CONFIG_SYS_MAXARGS			16
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE			CONFIG_SYS_CBSIZE

#define CONFIG_SYS_MEMTEST_START		0x00400000
#define CONFIG_SYS_MEMTEST_END			0x00800000

/* timer clock - 2* OSC_IN system clock */
#define CONFIG_IXP425_TIMER_CLK                 66666666

/* default load address */
#define CONFIG_SYS_LOAD_ADDR			0x00010000

/* valid baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE		{ 9600, 19200, 38400, 57600, \
					  115200, 230400 }
#define CONFIG_SERIAL_RTS_ACTIVE	1

/* Expansion bus settings */
#define CONFIG_SYS_EXP_CS0			0xbd113042

/* SDRAM settings */
#define CONFIG_NR_DRAM_BANKS		1
#define PHYS_SDRAM_1			0x00000000
#define CONFIG_SYS_SDRAM_BASE			0x00000000

/* 16MB SDRAM */
#define CONFIG_SYS_SDR_CONFIG			0x3A
#define PHYS_SDRAM_1_SIZE		0x01000000
#define CONFIG_SYS_SDRAM_REFRESH_CNT		0x81a
#define CONFIG_SYS_SDR_MODE_CONFIG		0x1
#define CONFIG_SYS_DRAM_SIZE			0x01000000

/* FLASH organization */
#define CONFIG_SYS_TEXT_BASE		0x50000000
#define CONFIG_SYS_MAX_FLASH_BANKS		1
/* max number of sectors on one chip */
#define CONFIG_SYS_MAX_FLASH_SECT		140
#define PHYS_FLASH_1			0x50000000
#define CONFIG_SYS_FLASH_BANKS_LIST		{ PHYS_FLASH_1 }

#define CONFIG_SYS_FLASH_BASE			PHYS_FLASH_1
#define CONFIG_SYS_MONITOR_BASE		PHYS_FLASH_1
#define CONFIG_SYS_MONITOR_LEN			(256 << 10)
#define CONFIG_BOARD_SIZE_LIMIT			262144

/* Use common CFI driver */
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_FLASH_CFI_DRIVER
/* no byte writes on IXP4xx */
#define CONFIG_SYS_FLASH_CFI_WIDTH		FLASH_CFI_16BIT

/* print 'E' for empty sector on flinfo */
#define CONFIG_SYS_FLASH_EMPTY_INFO

/* Ethernet */

/* include IXP4xx NPE support */
#define CONFIG_IXP4XX_NPE		1
/* NPE0 PHY address */
#define	CONFIG_PHY_ADDR			0x00
/* MII PHY management */
#define CONFIG_MII			1
/* fixed-speed switch without standard PHY registers on MII */
#define CONFIG_MII_NPE0_FIXEDLINK       1
#define CONFIG_MII_NPE0_SPEED           100
#define CONFIG_MII_NPE0_FULLDUPLEX      1

/* Number of ethernet rx buffers & descriptors */
#define CONFIG_SYS_RX_ETH_BUFFER		16
#define CONFIG_RESET_PHY_R		1
/* ethernet switch connected to MII port */
#define CONFIG_MII_ETHSWITCH		1

#define CONFIG_CMD_DHCP
#define CONFIG_CMD_NET
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
#undef  CONFIG_CMD_NFS

/* BOOTP options */
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME

/* Cache Configuration */
#define CONFIG_SYS_CACHELINE_SIZE		32

/*
 * environment organization:
 * one flash sector, embedded in uboot area (bottom bootblock flash)
 */
#define	CONFIG_ENV_IS_IN_FLASH		1
#define CONFIG_ENV_SIZE			0x2000
#define CONFIG_ENV_ADDR			(PHYS_FLASH_1 + 0x4000)
#define CONFIG_SYS_USE_PPCENV			1

#define CONFIG_EXTRA_ENV_SETTINGS					\
	"npe_ucode=50040000\0"						\
	"mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \
	"kerneladdr=50050000\0"						\
	"kernelfile=actux2/uImage\0"					\
	"rootfile=actux2/rootfs\0"					\
	"rootaddr=50170000\0"						\
	"loadaddr=10000\0"						\
	"updateboot_ser=mw.b 10000 ff 40000;"				\
	" loady ${loadaddr};"						\
	" run eraseboot writeboot\0"					\
	"updateboot_net=mw.b 10000 ff 40000;"				\
	" tftp ${loadaddr} actux2/u-boot.bin;"				\
	" run eraseboot writeboot\0"					\
	"eraseboot=protect off 50000000 50003fff;"			\
	" protect off 50006000 5003ffff;"				\
	" erase 50000000 50003fff;"					\
	" erase 50006000 5003ffff\0"					\
	"writeboot=cp.b 10000 50000000 4000;"				\
	" cp.b 16000 50006000 3a000\0"					\
	"updateucode=loady;"						\
	" era ${npe_ucode} +${filesize};"				\
	" cp.b ${loadaddr} ${npe_ucode} ${filesize}\0"			\
	"updateroot=tftp ${loadaddr} ${rootfile};"			\
	" era ${rootaddr} +${filesize};"				\
	" cp.b ${loadaddr} ${rootaddr} ${filesize}\0"			\
	"updatekern=tftp ${loadaddr} ${kernelfile};"			\
	" era ${kerneladdr} +${filesize};"				\
	" cp.b ${loadaddr} ${kerneladdr} ${filesize}\0"			\
	"flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3"	\
	" rootfstype=squashfs,jffs2 init=/etc/preinit\0"		\
	"netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3"	\
	" rootfstype=squashfs,jffs2 init=/etc/preinit\0"		\
	"addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \
	"addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0"	\
	"boot_flash=run flashargs addtty addeth;"			\
	" bootm ${kerneladdr}\0"					\
	"boot_net=run netargs addtty addeth;"				\
	" tftpboot ${loadaddr} ${kernelfile};"				\
	" bootm\0"

/* additions for new relocation code, must be added to all boards */
#define CONFIG_SYS_INIT_SP_ADDR						\
	(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)

#endif /* __CONFIG_H */
Commit	Line	Data
aebf00fc MS	1	/*
	2	* (C) Copyright 2007
	3	* Michael Schwingen, michael@schwingen.org
	4	*
	5	* Configuration settings for the AcTux-2 board.
	6	*
1a459660	7	* SPDX-License-Identifier: GPL-2.0+
aebf00fc MS	8	*/
	9
	10	#ifndef __CONFIG_H
	11	#define __CONFIG_H
	12
	13	#define CONFIG_IXP425 1
	14	#define CONFIG_ACTUX2 1
	15
8e807ec3 MV	16	#define CONFIG_MACH_TYPE 1480
8e807ec3 MV	17
aebf00fc MS	18	#define CONFIG_DISPLAY_CPUINFO 1
	19	#define CONFIG_DISPLAY_BOARDINFO 1
	20
930590f3	21	#define CONFIG_IXP_SERIAL
6d0f6bcf	22	#define CONFIG_SYS_IXP425_CONSOLE IXP425_UART2
aebf00fc MS	23	#define CONFIG_BAUDRATE 115200
	24	#define CONFIG_BOOTDELAY 5
	25	#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
af050485 MS	26	#define CONFIG_BOARD_EARLY_INIT_F 1
af050485 MS	27	#define CONFIG_SYS_LDSCRIPT "board/actux2/u-boot.lds"
aebf00fc MS	28
	29	/***************************************************************
	30	* U-boot generic defines start here.
	31	***************************************************************/
aebf00fc	32	/* Size of malloc() pool */
6d0f6bcf	33	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
aebf00fc MS	34
	35	/* allow to overwrite serial and ethaddr */
	36	#define CONFIG_ENV_OVERWRITE
	37
	38	/* Command line configuration. */
	39	#include <config_cmd_default.h>
	40
	41	#define CONFIG_CMD_ELF
	42	#undef CONFIG_CMD_PCI
	43	#undef CONFIG_PCI
	44
	45	#define CONFIG_BOOTCOMMAND "run boot_flash"
	46	/* enable passing of ATAGs */
	47	#define CONFIG_CMDLINE_TAG 1
	48	#define CONFIG_SETUP_MEMORY_TAGS 1
	49	#define CONFIG_INITRD_TAG 1
	50	#define CONFIG_REVISION_TAG 1
	51
	52	#if defined(CONFIG_CMD_KGDB)
	53	# define CONFIG_KGDB_BAUDRATE 230400
	54	/* which serial port to use */
	55	# define CONFIG_KGDB_SER_INDEX 1
	56	#endif
	57
	58	/* Miscellaneous configurable options */
6d0f6bcf	59	#define CONFIG_SYS_LONGHELP
aebf00fc	60	/* Console I/O Buffer Size */
6d0f6bcf	61	#define CONFIG_SYS_CBSIZE 256
aebf00fc	62	/* Print Buffer Size */
6d0f6bcf	63	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
aebf00fc	64	/* max number of command args */
6d0f6bcf	65	#define CONFIG_SYS_MAXARGS 16
aebf00fc	66	/* Boot Argument Buffer Size */
6d0f6bcf	67	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
aebf00fc	68
6d0f6bcf JCPV	69	#define CONFIG_SYS_MEMTEST_START 0x00400000
6d0f6bcf JCPV	70	#define CONFIG_SYS_MEMTEST_END 0x00800000
aebf00fc	71
af050485 MS	72	/* timer clock - 2* OSC_IN system clock */
af050485 MS	73	#define CONFIG_IXP425_TIMER_CLK 66666666
aebf00fc MS	74
aebf00fc MS	75	/* default load address */
6d0f6bcf	76	#define CONFIG_SYS_LOAD_ADDR 0x00010000
aebf00fc MS	77
aebf00fc MS	78	/* valid baudrates */
6d0f6bcf	79	#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
aebf00fc MS	80	115200, 230400 }
	81	#define CONFIG_SERIAL_RTS_ACTIVE 1
	82
aebf00fc	83	/* Expansion bus settings */
6d0f6bcf	84	#define CONFIG_SYS_EXP_CS0 0xbd113042
aebf00fc MS	85
	86	/* SDRAM settings */
	87	#define CONFIG_NR_DRAM_BANKS 1
	88	#define PHYS_SDRAM_1 0x00000000
af050485	89	#define CONFIG_SYS_SDRAM_BASE 0x00000000
aebf00fc MS	90
aebf00fc MS	91	/* 16MB SDRAM */
6d0f6bcf	92	#define CONFIG_SYS_SDR_CONFIG 0x3A
aebf00fc	93	#define PHYS_SDRAM_1_SIZE 0x01000000
6d0f6bcf JCPV	94	#define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a
	95	#define CONFIG_SYS_SDR_MODE_CONFIG 0x1
	96	#define CONFIG_SYS_DRAM_SIZE 0x01000000
aebf00fc MS	97
aebf00fc MS	98	/* FLASH organization */
af050485	99	#define CONFIG_SYS_TEXT_BASE 0x50000000
6d0f6bcf	100	#define CONFIG_SYS_MAX_FLASH_BANKS 1
aebf00fc	101	/* max number of sectors on one chip */
6d0f6bcf	102	#define CONFIG_SYS_MAX_FLASH_SECT 140
aebf00fc	103	#define PHYS_FLASH_1 0x50000000
6d0f6bcf	104	#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1 }
aebf00fc	105
6d0f6bcf JCPV	106	#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
	107	#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
	108	#define CONFIG_SYS_MONITOR_LEN (256 << 10)
af050485	109	#define CONFIG_BOARD_SIZE_LIMIT 262144
aebf00fc MS	110
aebf00fc MS	111	/* Use common CFI driver */
6d0f6bcf	112	#define CONFIG_SYS_FLASH_CFI
00b1883a	113	#define CONFIG_FLASH_CFI_DRIVER
aebf00fc	114	/* no byte writes on IXP4xx */
6d0f6bcf	115	#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
aebf00fc MS	116
aebf00fc MS	117	/* print 'E' for empty sector on flinfo */
6d0f6bcf	118	#define CONFIG_SYS_FLASH_EMPTY_INFO
aebf00fc MS	119
	120	/* Ethernet */
	121
	122	/* include IXP4xx NPE support */
	123	#define CONFIG_IXP4XX_NPE 1
aebf00fc MS	124	/* NPE0 PHY address */
	125	#define CONFIG_PHY_ADDR 0x00
	126	/* MII PHY management */
	127	#define CONFIG_MII 1
af050485 MS	128	/* fixed-speed switch without standard PHY registers on MII */
	129	#define CONFIG_MII_NPE0_FIXEDLINK 1
	130	#define CONFIG_MII_NPE0_SPEED 100
	131	#define CONFIG_MII_NPE0_FULLDUPLEX 1
	132
aebf00fc	133	/* Number of ethernet rx buffers & descriptors */
6d0f6bcf	134	#define CONFIG_SYS_RX_ETH_BUFFER 16
aebf00fc MS	135	#define CONFIG_RESET_PHY_R 1
	136	/* ethernet switch connected to MII port */
	137	#define CONFIG_MII_ETHSWITCH 1
	138
	139	#define CONFIG_CMD_DHCP
	140	#define CONFIG_CMD_NET
	141	#define CONFIG_CMD_MII
	142	#define CONFIG_CMD_PING
	143	#undef CONFIG_CMD_NFS
	144
	145	/* BOOTP options */
	146	#define CONFIG_BOOTP_BOOTFILESIZE
	147	#define CONFIG_BOOTP_BOOTPATH
	148	#define CONFIG_BOOTP_GATEWAY
	149	#define CONFIG_BOOTP_HOSTNAME
	150
	151	/* Cache Configuration */
6d0f6bcf	152	#define CONFIG_SYS_CACHELINE_SIZE 32
aebf00fc MS	153
	154	/*
	155	* environment organization:
	156	* one flash sector, embedded in uboot area (bottom bootblock flash)
	157	*/
5a1aceb0	158	#define CONFIG_ENV_IS_IN_FLASH 1
0e8d1586 JCPV	159	#define CONFIG_ENV_SIZE 0x2000
0e8d1586 JCPV	160	#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x4000)
6d0f6bcf	161	#define CONFIG_SYS_USE_PPCENV 1
aebf00fc MS	162
aebf00fc MS	163	#define CONFIG_EXTRA_ENV_SETTINGS \
b4e2f89d	164	"npe_ucode=50040000\0" \
aebf00fc MS	165	"mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \
aebf00fc MS	166	"kerneladdr=50050000\0" \
af050485 MS	167	"kernelfile=actux2/uImage\0" \
af050485 MS	168	"rootfile=actux2/rootfs\0" \
aebf00fc MS	169	"rootaddr=50170000\0" \
	170	"loadaddr=10000\0" \
	171	"updateboot_ser=mw.b 10000 ff 40000;" \
	172	" loady ${loadaddr};" \
	173	" run eraseboot writeboot\0" \
	174	"updateboot_net=mw.b 10000 ff 40000;" \
af050485	175	" tftp ${loadaddr} actux2/u-boot.bin;" \
aebf00fc MS	176	" run eraseboot writeboot\0" \
	177	"eraseboot=protect off 50000000 50003fff;" \
	178	" protect off 50006000 5003ffff;" \
	179	" erase 50000000 50003fff;" \
	180	" erase 50006000 5003ffff\0" \
	181	"writeboot=cp.b 10000 50000000 4000;" \
	182	" cp.b 16000 50006000 3a000\0" \
af050485 MS	183	"updateucode=loady;" \
	184	" era ${npe_ucode} +${filesize};" \
	185	" cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \
aebf00fc MS	186	"updateroot=tftp ${loadaddr} ${rootfile};" \
	187	" era ${rootaddr} +${filesize};" \
	188	" cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \
	189	"updatekern=tftp ${loadaddr} ${kernelfile};" \
	190	" era ${kerneladdr} +${filesize};" \
	191	" cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \
	192	"flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
	193	" rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
	194	"netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
	195	" rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
	196	"addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \
	197	"addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
	198	"boot_flash=run flashargs addtty addeth;" \
	199	" bootm ${kerneladdr}\0" \
	200	"boot_net=run netargs addtty addeth;" \
	201	" tftpboot ${loadaddr} ${kernelfile};" \
	202	" bootm\0"
	203
af050485 MS	204	/* additions for new relocation code, must be added to all boards */
	205	#define CONFIG_SYS_INIT_SP_ADDR \
	206	(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
	207
aebf00fc	208	#endif /* __CONFIG_H */