]> git.ipfire.org Git - people/ms/u-boot.git/blame - include/configs/afeb9260.h
config: remove platform CONFIG_SYS_HZ definition part 2/2
[people/ms/u-boot.git] / include / configs / afeb9260.h
CommitLineData
1079432e
SL
1/*
2 * (C) Copyright 2008 Sergey Lapin <slapin@ossfans.org>
3 *
4 * Configuation settings for the AFEB9260 board.
5 * Based on configuration for AT91SAM9260-EK
6 *
1a459660 7 * SPDX-License-Identifier: GPL-2.0+
1079432e
SL
8 */
9
10#ifndef __CONFIG_H
11#define __CONFIG_H
282e27c0
SL
12#define CONFIG_AT91SAM9260 /* Atmel AT91SAM9260 SoC*/
13#include <asm/arch/hardware.h>
1079432e 14
282e27c0 15#define CONFIG_SYS_TEXT_BASE 0x21f00000
425de62d 16
1079432e 17/* ARM asynchronous clock */
7c966a8b 18#define CONFIG_SYS_AT91_MAIN_CLOCK 18429952 /* from 18.432 MHz crystal */
282e27c0 19#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
1079432e 20
282e27c0
SL
21#define CONFIG_BOARD_EARLY_INIT_F
22#define CONFIG_DISPLAY_CPUINFO
23
24#define CONFIG_AFEB9260 /* AFEB9260 Board */
dc39ae95 25#define CONFIG_ARCH_CPU_INIT
1079432e
SL
26
27#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
28#define CONFIG_SETUP_MEMORY_TAGS 1
29#define CONFIG_INITRD_TAG 1
30
31#define CONFIG_SKIP_LOWLEVEL_INIT
1079432e
SL
32
33/*
34 * Hardware drivers
35 */
282e27c0
SL
36#define CONFIG_ATMEL_LEGACY
37#define CONFIG_AT91_GPIO
38#define CONFIG_AT91_PULLUP 1
39
40#define CONFIG_ATMEL_USART
41#define CONFIG_USART_BASE ATMEL_BASE_DBGU
42#define CONFIG_USART_ID ATMEL_ID_SYS
43#define CONFIG_USART3 /* USART 3 is DBGU */
1079432e
SL
44
45#define CONFIG_BOOTDELAY 3
46
47/*
48 * BOOTP options
49 */
50#define CONFIG_BOOTP_BOOTFILESIZE 1
51#define CONFIG_BOOTP_BOOTPATH 1
52#define CONFIG_BOOTP_GATEWAY 1
53#define CONFIG_BOOTP_HOSTNAME 1
54
55/*
56 * Command line configuration.
57 */
58#include <config_cmd_default.h>
59#undef CONFIG_CMD_BDI
1079432e 60#undef CONFIG_CMD_FPGA
74de7aef 61#undef CONFIG_CMD_IMI
1079432e 62#undef CONFIG_CMD_IMLS
74de7aef
WD
63#undef CONFIG_CMD_LOADS
64#undef CONFIG_CMD_SOURCE
1079432e 65
282e27c0
SL
66#define CONFIG_CMD_PING
67#define CONFIG_CMD_DHCP
1079432e 68
282e27c0
SL
69#define CONFIG_CMD_NAND
70#define CONFIG_CMD_USB
1079432e
SL
71
72/* SDRAM */
73#define CONFIG_NR_DRAM_BANKS 1
282e27c0
SL
74#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
75#define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 megs */
1079432e
SL
76
77/* DataFlash */
4758ebdd 78#define CONFIG_ATMEL_DATAFLASH_SPI
282e27c0 79#define CONFIG_HAS_DATAFLASH
1079432e
SL
80#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
81#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
82#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
83#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */
84#define AT91_SPI_CLK 15000000
85#define DATAFLASH_TCSS (0x1a << 16)
86#define DATAFLASH_TCHS (0x1 << 24)
87
88/* NAND flash */
74c076d6
JCPV
89#ifdef CONFIG_CMD_NAND
90#define CONFIG_NAND_ATMEL
1079432e 91#define CONFIG_SYS_MAX_NAND_DEVICE 1
282e27c0
SL
92#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
93#define CONFIG_SYS_NAND_DBW_8
74c076d6
JCPV
94/* our ALE is AD21 */
95#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
96/* our CLE is AD22 */
97#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
98#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
99#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
2eb99ca8 100
74c076d6 101#endif
1079432e
SL
102
103/* NOR flash - no real flash on this board */
282e27c0 104#define CONFIG_SYS_NO_FLASH
1079432e
SL
105
106/* Ethernet */
282e27c0
SL
107#define CONFIG_MACB
108#define CONFIG_RESET_PHY_R
1079432e 109
1079432e
SL
110#define CONFIG_NET_RETRY_COUNT 20
111
112/* USB */
2b7178af 113#define CONFIG_USB_ATMEL
282e27c0
SL
114#define CONFIG_USB_OHCI_NEW
115#define CONFIG_DOS_PARTITION
116#define CONFIG_SYS_USB_OHCI_CPU_INIT
1079432e
SL
117#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */
118#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
119#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
282e27c0 120#define CONFIG_USB_STORAGE
1079432e
SL
121
122#define CONFIG_SYS_LOAD_ADDR 0x21000000 /* load address */
123
282e27c0 124#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
1079432e
SL
125#define CONFIG_SYS_MEMTEST_END 0x21e00000
126
282e27c0
SL
127#define CONFIG_SYS_USE_DATAFLASH_CS1
128#define CONFIG_SYS_INIT_SP_ADDR (ATMEL_BASE_SRAM1 + 0x1000 -\
129 GENERATED_GBL_DATA_SIZE)
1079432e
SL
130
131/* bootstrap + u-boot + env + linux in dataflash on CS1 */
282e27c0 132#define CONFIG_ENV_IS_IN_DATAFLASH
1079432e
SL
133#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + 0x8400)
134#define CONFIG_ENV_OFFSET 0x4200
135#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + CONFIG_ENV_OFFSET)
136#define CONFIG_ENV_SIZE 0x4200
137#define CONFIG_BOOTCOMMAND "nand read 0x21000000 0xa0000 0x200000; bootm"
138#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
139 "root=/dev/mtdblock2 " \
140 "rw rootfstype=jffs2 panic=20"
141
142#define CONFIG_BAUDRATE 115200
1079432e
SL
143
144#define CONFIG_SYS_PROMPT "U-Boot> "
145#define CONFIG_SYS_CBSIZE 256
146#define CONFIG_SYS_MAXARGS 16
147#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
282e27c0
SL
148#define CONFIG_SYS_LONGHELP
149#define CONFIG_CMDLINE_EDITING
1079432e 150
1079432e
SL
151/*
152 * Size of malloc() pool
153 */
154#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
1079432e 155
1079432e 156#endif