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Commit | Line | Data |
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8d0afcd7 LV |
1 | /* |
2 | * am43xx_evm.h | |
3 | * | |
4 | * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ | |
5 | * | |
6 | * SPDX-License-Identifier: GPL-2.0+ | |
7 | */ | |
8 | ||
9 | #ifndef __CONFIG_AM43XX_EVM_H | |
10 | #define __CONFIG_AM43XX_EVM_H | |
11 | ||
369cbe1e LV |
12 | #define CONFIG_BOARD_LATE_INIT |
13 | #define CONFIG_ARCH_CPU_INIT | |
42da5adf | 14 | #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 21) /* 2GB */ |
8d0afcd7 | 15 | #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ |
369cbe1e | 16 | |
f843770a | 17 | #include <environment/ti/dfu.h> |
369cbe1e | 18 | #include <asm/arch/omap.h> |
8d0afcd7 LV |
19 | |
20 | /* NS16550 Configuration */ | |
c7b9686d | 21 | #define CONFIG_SYS_NS16550_CLK 48000000 |
2a429d23 | 22 | #if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_DM_SERIAL) |
8d0afcd7 | 23 | #define CONFIG_SYS_NS16550_SERIAL |
2a429d23 | 24 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) |
2a429d23 | 25 | #endif |
8d0afcd7 | 26 | |
9f1a8cd3 SN |
27 | /* I2C Configuration */ |
28 | #define CONFIG_CMD_EEPROM | |
29 | #define CONFIG_ENV_EEPROM_IS_ON_I2C | |
30 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */ | |
31 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 | |
9f1a8cd3 | 32 | |
83bad102 | 33 | /* Power */ |
7aa5598a TR |
34 | #define CONFIG_POWER |
35 | #define CONFIG_POWER_I2C | |
83bad102 | 36 | #define CONFIG_POWER_TPS65218 |
403d70ab | 37 | #define CONFIG_POWER_TPS62362 |
83bad102 | 38 | |
369cbe1e | 39 | /* SPL defines. */ |
9aac7d0e | 40 | #define CONFIG_SPL_TEXT_BASE CONFIG_ISW_ENTRY_ADDR |
d3289aac TR |
41 | #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ |
42 | (128 << 20)) | |
8d0afcd7 | 43 | |
573b020e LV |
44 | /* Enabling L2 Cache */ |
45 | #define CONFIG_SYS_L2_PL310 | |
46 | #define CONFIG_SYS_PL310_BASE 0x48242000 | |
573b020e | 47 | |
8d0afcd7 | 48 | /* |
369cbe1e LV |
49 | * Since SPL did pll and ddr initialization for us, |
50 | * we don't need to do it twice. | |
8d0afcd7 | 51 | */ |
7a5f71bc | 52 | #if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_QSPI_BOOT) |
8d0afcd7 LV |
53 | #define CONFIG_SKIP_LOWLEVEL_INIT |
54 | #endif | |
55 | ||
196311dc TR |
56 | /* |
57 | * When building U-Boot such that there is no previous loader | |
58 | * we need to call board_early_init_f. This is taken care of in | |
59 | * s_init when we have SPL used. | |
60 | */ | |
61 | #if !defined(CONFIG_SKIP_LOWLEVEL_INIT) && !defined(CONFIG_SPL) | |
62 | #define CONFIG_BOARD_EARLY_INIT_F | |
63 | #endif | |
64 | ||
369cbe1e | 65 | /* Now bring in the rest of the common code. */ |
9a0f4004 | 66 | #include <configs/ti_armv7_omap.h> |
8d0afcd7 | 67 | |
7a5f71bc SP |
68 | /* Always 64 KiB env size */ |
69 | #define CONFIG_ENV_SIZE (64 << 10) | |
8d0afcd7 | 70 | |
369cbe1e | 71 | #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG |
8d0afcd7 | 72 | |
369cbe1e LV |
73 | /* Clock Defines */ |
74 | #define V_OSCK 24000000 /* Clock output from T2 */ | |
75 | #define V_SCLK (V_OSCK) | |
8d0afcd7 | 76 | |
369cbe1e LV |
77 | /* NS16550 Configuration */ |
78 | #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ | |
79 | ||
76bfd162 FB |
80 | #define CONFIG_ENV_IS_IN_FAT |
81 | #define FAT_ENV_INTERFACE "mmc" | |
82 | #define FAT_ENV_DEVICE_AND_PART "0:1" | |
83 | #define FAT_ENV_FILE "uboot.env" | |
84 | #define CONFIG_FAT_WRITE | |
369cbe1e | 85 | |
983e3700 | 86 | #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" |
8d0afcd7 | 87 | |
2b36fe57 | 88 | /* SPL USB Support */ |
2b36fe57 | 89 | |
592bc5e2 M |
90 | #if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD) |
91 | #define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1 | |
3d799c7f | 92 | #define CONFIG_USB_XHCI_OMAP |
3d799c7f DM |
93 | #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 |
94 | ||
95 | #define CONFIG_OMAP_USB_PHY | |
96 | #define CONFIG_AM437X_USB2PHY2_HOST | |
aee119bd | 97 | #endif |
3d799c7f | 98 | |
a59a77f8 | 99 | #if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_USBETH_SUPPORT) |
b142729d | 100 | #undef CONFIG_USB_DWC3_PHY_OMAP |
c16bf621 | 101 | #undef CONFIG_USB_DWC3_OMAP |
3457bbaf | 102 | #undef CONFIG_USB_DWC3 |
65403f30 | 103 | #undef CONFIG_USB_DWC3_GADGET |
3457bbaf | 104 | |
aaa4a9e3 | 105 | #undef CONFIG_USB_GADGET_DOWNLOAD |
a59a77f8 | 106 | #undef CONFIG_USB_GADGET_VBUS_DRAW |
e6c0bc06 SP |
107 | #undef CONFIG_G_DNL_MANUFACTURER |
108 | #undef CONFIG_G_DNL_VENDOR_NUM | |
109 | #undef CONFIG_G_DNL_PRODUCT_NUM | |
3457bbaf | 110 | #undef CONFIG_USB_GADGET_DUALSPEED |
a59a77f8 SP |
111 | #endif |
112 | ||
8aff39e3 M |
113 | /* |
114 | * Disable MMC DM for SPL build and can be re-enabled after adding | |
115 | * DM support in SPL | |
116 | */ | |
117 | #ifdef CONFIG_SPL_BUILD | |
118 | #undef CONFIG_DM_MMC | |
49f85b67 M |
119 | #undef CONFIG_DM_SPI |
120 | #undef CONFIG_DM_SPI_FLASH | |
1ce32ba7 | 121 | #undef CONFIG_TIMER |
8aff39e3 M |
122 | #endif |
123 | ||
a69e2c22 KVA |
124 | #ifndef CONFIG_SPL_BUILD |
125 | /* USB Device Firmware Update support */ | |
a69e2c22 KVA |
126 | #define DFUARGS \ |
127 | "dfu_bufsiz=0x10000\0" \ | |
128 | DFU_ALT_INFO_MMC \ | |
129 | DFU_ALT_INFO_EMMC \ | |
42d1b818 | 130 | DFU_ALT_INFO_RAM \ |
f843770a | 131 | DFU_ALT_INFO_QSPI_XIP |
a69e2c22 KVA |
132 | #else |
133 | #define DFUARGS | |
134 | #endif | |
135 | ||
7a5f71bc | 136 | #ifdef CONFIG_QSPI_BOOT |
9aac7d0e MS |
137 | #ifndef CONFIG_SYS_TEXT_BASE |
138 | #define CONFIG_SYS_TEXT_BASE CONFIG_ISW_ENTRY_ADDR | |
139 | #endif | |
76bfd162 | 140 | #undef CONFIG_ENV_IS_IN_FAT |
7a5f71bc SP |
141 | #define CONFIG_ENV_IS_IN_SPI_FLASH |
142 | #define CONFIG_SYS_REDUNDAND_ENVIRONMENT | |
143 | #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED | |
144 | #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64 KB sectors */ | |
145 | #define CONFIG_ENV_OFFSET 0x110000 | |
146 | #define CONFIG_ENV_OFFSET_REDUND 0x120000 | |
147 | #ifdef MTDIDS_DEFAULT | |
148 | #undef MTDIDS_DEFAULT | |
149 | #endif | |
150 | #ifdef MTDPARTS_DEFAULT | |
151 | #undef MTDPARTS_DEFAULT | |
152 | #endif | |
153 | #define MTDPARTS_DEFAULT "mtdparts=qspi.0:512k(QSPI.u-boot)," \ | |
154 | "512k(QSPI.u-boot.backup)," \ | |
155 | "512k(QSPI.u-boot-spl-os)," \ | |
156 | "64k(QSPI.u-boot-env)," \ | |
157 | "64k(QSPI.u-boot-env.backup)," \ | |
158 | "8m(QSPI.kernel)," \ | |
159 | "-(QSPI.file-system)" | |
160 | #endif | |
161 | ||
ea4c7a83 SP |
162 | /* SPI */ |
163 | #undef CONFIG_OMAP3_SPI | |
ea4c7a83 SP |
164 | #define CONFIG_TI_SPI_MMAP |
165 | #define CONFIG_QSPI_SEL_GPIO 48 | |
166 | #define CONFIG_SF_DEFAULT_SPEED 48000000 | |
46f7bb00 | 167 | #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 |
2d134597 V |
168 | #define CONFIG_QSPI_QUAD_SUPPORT |
169 | #define CONFIG_TI_EDMA3 | |
ea4c7a83 | 170 | |
0f1b0443 TR |
171 | /* Enhance our eMMC support / experience. */ |
172 | #define CONFIG_CMD_GPT | |
173 | #define CONFIG_EFI_PARTITION | |
0f1b0443 | 174 | |
1564dba7 LV |
175 | #ifndef CONFIG_SPL_BUILD |
176 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
fb3ad9bd | 177 | DEFAULT_LINUX_BOOT_ENV \ |
85d17be3 | 178 | DEFAULT_MMC_TI_ARGS \ |
1564dba7 LV |
179 | "fdtfile=undefined\0" \ |
180 | "bootpart=0:2\0" \ | |
181 | "bootdir=/boot\0" \ | |
182 | "bootfile=zImage\0" \ | |
183 | "console=ttyO0,115200n8\0" \ | |
0f1b0443 TR |
184 | "partitions=" \ |
185 | "uuid_disk=${uuid_gpt_disk};" \ | |
186 | "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \ | |
1564dba7 | 187 | "optargs=\0" \ |
2b36fe57 DM |
188 | "usbroot=/dev/sda2 rw\0" \ |
189 | "usbrootfstype=ext4 rootwait\0" \ | |
190 | "usbdev=0\0" \ | |
bea0fd5e | 191 | "ramroot=/dev/ram0 rw\0" \ |
1564dba7 | 192 | "ramrootfstype=ext2\0" \ |
2b36fe57 DM |
193 | "usbargs=setenv bootargs console=${console} " \ |
194 | "${optargs} " \ | |
195 | "root=${usbroot} " \ | |
196 | "rootfstype=${usbrootfstype}\0" \ | |
1564dba7 LV |
197 | "ramargs=setenv bootargs console=${console} " \ |
198 | "${optargs} " \ | |
199 | "root=${ramroot} " \ | |
200 | "rootfstype=${ramrootfstype}\0" \ | |
2b36fe57 | 201 | "loadramdisk=load ${devtype} ${devnum} ${rdaddr} ramdisk.gz\0" \ |
2b36fe57 DM |
202 | "usbboot=" \ |
203 | "setenv devnum ${usbdev}; " \ | |
204 | "setenv devtype usb; " \ | |
205 | "usb start ${usbdev}; " \ | |
206 | "if usb dev ${usbdev}; then " \ | |
207 | "if run loadbootenv; then " \ | |
208 | "echo Loaded environment from ${bootenv};" \ | |
209 | "run importbootenv;" \ | |
210 | "fi;" \ | |
211 | "if test -n $uenvcmd; then " \ | |
212 | "echo Running uenvcmd ...;" \ | |
213 | "run uenvcmd;" \ | |
214 | "fi;" \ | |
215 | "if run loadimage; then " \ | |
216 | "run loadfdt; " \ | |
217 | "echo Booting from usb ${usbdev}...; " \ | |
218 | "run usbargs;" \ | |
219 | "bootz ${loadaddr} - ${fdtaddr}; " \ | |
220 | "fi;" \ | |
221 | "fi\0" \ | |
bf0385d7 KVA |
222 | "fi;" \ |
223 | "usb stop ${usbdev};\0" \ | |
1564dba7 LV |
224 | "findfdt="\ |
225 | "if test $board_name = AM43EPOS; then " \ | |
226 | "setenv fdtfile am43x-epos-evm.dtb; fi; " \ | |
227 | "if test $board_name = AM43__GP; then " \ | |
228 | "setenv fdtfile am437x-gp-evm.dtb; fi; " \ | |
a5051b72 MS |
229 | "if test $board_name = AM43XXHS; then " \ |
230 | "setenv fdtfile am437x-gp-evm.dtb; fi; " \ | |
9cb9f333 FB |
231 | "if test $board_name = AM43__SK; then " \ |
232 | "setenv fdtfile am437x-sk-evm.dtb; fi; " \ | |
403d70ab FB |
233 | "if test $board_name = AM43_IDK; then " \ |
234 | "setenv fdtfile am437x-idk-evm.dtb; fi; " \ | |
1564dba7 | 235 | "if test $fdtfile = undefined; then " \ |
a69e2c22 | 236 | "echo WARNING: Could not determine device tree; fi; \0" \ |
0ad5eaa4 | 237 | NANDARGS \ |
2320866b | 238 | NETARGS \ |
a69e2c22 | 239 | DFUARGS \ |
1564dba7 LV |
240 | |
241 | #define CONFIG_BOOTCOMMAND \ | |
242 | "run findfdt; " \ | |
18c534bb | 243 | "run envboot;" \ |
2b36fe57 | 244 | "run mmcboot;" \ |
0ad5eaa4 TR |
245 | "run usbboot;" \ |
246 | NANDBOOT \ | |
1564dba7 | 247 | |
3a3939bf M |
248 | #endif |
249 | ||
f4787eab | 250 | #ifndef CONFIG_SPL_BUILD |
4cdd7fda | 251 | /* CPSW Ethernet */ |
4cdd7fda M |
252 | #define CONFIG_MII |
253 | #define CONFIG_BOOTP_DEFAULT | |
254 | #define CONFIG_BOOTP_DNS | |
255 | #define CONFIG_BOOTP_DNS2 | |
256 | #define CONFIG_BOOTP_SEND_HOSTNAME | |
257 | #define CONFIG_BOOTP_GATEWAY | |
258 | #define CONFIG_BOOTP_SUBNETMASK | |
259 | #define CONFIG_NET_RETRY_COUNT 10 | |
4cdd7fda | 260 | #define CONFIG_PHY_GIGE |
f4787eab M |
261 | #endif |
262 | ||
263 | #define CONFIG_DRIVER_TI_CPSW | |
4cdd7fda | 264 | #define CONFIG_PHYLIB |
d9da26ec | 265 | #define PHY_ANEG_TIMEOUT 8000 /* PHY needs longer aneg time at 1G */ |
3a3939bf | 266 | |
f4787eab M |
267 | #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_ETH_SUPPORT) |
268 | #undef CONFIG_ENV_IS_IN_FAT | |
269 | #define CONFIG_ENV_IS_NOWHERE | |
f4787eab M |
270 | #endif |
271 | ||
4cdd7fda | 272 | #define CONFIG_SYS_RX_ETH_BUFFER 64 |
4cdd7fda | 273 | |
e53ad4b4 | 274 | /* NAND support */ |
275 | #ifdef CONFIG_NAND | |
276 | /* NAND: device related configs */ | |
277 | #define CONFIG_SYS_NAND_PAGE_SIZE 4096 | |
278 | #define CONFIG_SYS_NAND_OOBSIZE 224 | |
279 | #define CONFIG_SYS_NAND_BLOCK_SIZE (256*1024) | |
280 | #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ | |
281 | CONFIG_SYS_NAND_PAGE_SIZE) | |
282 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE | |
283 | /* NAND: driver related configs */ | |
284 | #define CONFIG_NAND_OMAP_GPMC | |
285 | #define CONFIG_NAND_OMAP_ELM | |
286 | #define CONFIG_SYS_NAND_ONFI_DETECTION | |
287 | #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH16_CODE_HW | |
288 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS | |
289 | #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ | |
290 | 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \ | |
291 | 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, \ | |
292 | 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, \ | |
293 | 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, \ | |
294 | 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, \ | |
295 | 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, \ | |
296 | 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, \ | |
297 | 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, \ | |
298 | 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, \ | |
299 | 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, \ | |
300 | 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, \ | |
301 | 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, \ | |
302 | 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, \ | |
303 | 140, 141, 142, 143, 144, 145, 146, 147, 148, 149, \ | |
304 | 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, \ | |
305 | 160, 161, 162, 163, 164, 165, 166, 167, 168, 169, \ | |
306 | 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, \ | |
307 | 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, \ | |
308 | 190, 191, 192, 193, 194, 195, 196, 197, 198, 199, \ | |
309 | 200, 201, 202, 203, 204, 205, 206, 207, 208, 209, \ | |
310 | } | |
311 | #define CONFIG_SYS_NAND_ECCSIZE 512 | |
312 | #define CONFIG_SYS_NAND_ECCBYTES 26 | |
313 | #define MTDIDS_DEFAULT "nand0=nand.0" | |
314 | #define MTDPARTS_DEFAULT "mtdparts=nand.0:" \ | |
315 | "256k(NAND.SPL)," \ | |
316 | "256k(NAND.SPL.backup1)," \ | |
317 | "256k(NAND.SPL.backup2)," \ | |
318 | "256k(NAND.SPL.backup3)," \ | |
319 | "512k(NAND.u-boot-spl-os)," \ | |
320 | "1m(NAND.u-boot)," \ | |
321 | "256k(NAND.u-boot-env)," \ | |
322 | "256k(NAND.u-boot-env.backup1)," \ | |
323 | "7m(NAND.kernel)," \ | |
9ddef489 | 324 | "-(NAND.file-system)" |
e53ad4b4 | 325 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x00180000 |
326 | /* NAND: SPL related configs */ | |
327 | #ifdef CONFIG_SPL_NAND_SUPPORT | |
328 | #define CONFIG_SPL_NAND_AM33XX_BCH | |
329 | #endif | |
330 | /* NAND: SPL falcon mode configs */ | |
331 | #ifdef CONFIG_SPL_OS_BOOT | |
332 | #define CONFIG_CMD_SPL_NAND_OFS 0x00100000 /* os parameters */ | |
333 | #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00300000 /* kernel offset */ | |
334 | #define CONFIG_CMD_SPL_WRITE_SIZE CONFIG_SYS_NAND_BLOCK_SIZE | |
335 | #endif | |
0ad5eaa4 TR |
336 | #define NANDARGS \ |
337 | "mtdids=" MTDIDS_DEFAULT "\0" \ | |
338 | "mtdparts=" MTDPARTS_DEFAULT "\0" \ | |
339 | "nandargs=setenv bootargs console=${console} " \ | |
340 | "${optargs} " \ | |
341 | "root=${nandroot} " \ | |
342 | "rootfstype=${nandrootfstype}\0" \ | |
343 | "nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,4096\0" \ | |
344 | "nandrootfstype=ubifs rootwait=1\0" \ | |
345 | "nandboot=echo Booting from nand ...; " \ | |
346 | "run nandargs; " \ | |
347 | "nand read ${fdtaddr} NAND.u-boot-spl-os; " \ | |
348 | "nand read ${loadaddr} NAND.kernel; " \ | |
349 | "bootz ${loadaddr} - ${fdtaddr}\0" | |
350 | #define NANDBOOT "run nandboot; " | |
351 | #else /* !CONFIG_NAND */ | |
352 | #define NANDARGS | |
353 | #define NANDBOOT | |
354 | #endif /* CONFIG_NAND */ | |
e53ad4b4 | 355 | |
8d0afcd7 | 356 | #endif /* __CONFIG_AM43XX_EVM_H */ |