[people/ms/u-boot.git] / include / configs / am43xx_evm.h

/*
 * am43xx_evm.h
 *
 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_AM43XX_EVM_H
#define __CONFIG_AM43XX_EVM_H

#define CONFIG_ARCH_CPU_INIT
#define CONFIG_MAX_RAM_BANK_SIZE	(1024 << 21)	/* 2GB */
#define CONFIG_SYS_TIMERBASE		0x48040000	/* Use Timer2 */

#include <asm/arch/omap.h>

/* NS16550 Configuration */
#define CONFIG_SYS_NS16550_CLK		48000000
#if !defined(CONFIG_SPL_DM) || !defined(CONFIG_DM_SERIAL)
#define CONFIG_SYS_NS16550_REG_SIZE    (-4)
#define CONFIG_SYS_NS16550_SERIAL
#endif

/* I2C Configuration */
#define CONFIG_ENV_EEPROM_IS_ON_I2C
#define CONFIG_SYS_I2C_EEPROM_ADDR	0x50	/* Main EEPROM */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2

/* Power */
#define CONFIG_POWER
#define CONFIG_POWER_I2C
#define CONFIG_POWER_TPS65218
#define CONFIG_POWER_TPS62362

/* SPL defines. */
#define CONFIG_SPL_TEXT_BASE		CONFIG_ISW_ENTRY_ADDR
#define CONFIG_SYS_SPL_ARGS_ADDR	(CONFIG_SYS_SDRAM_BASE + \
					 (128 << 20))

/* Enabling L2 Cache */
#define CONFIG_SYS_L2_PL310
#define CONFIG_SYS_PL310_BASE	0x48242000

/*
 * Since SPL did pll and ddr initialization for us,
 * we don't need to do it twice.
 */
#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_QSPI_BOOT)
#define CONFIG_SKIP_LOWLEVEL_INIT
#endif

/*
 * When building U-Boot such that there is no previous loader
 * we need to call board_early_init_f.  This is taken care of in
 * s_init when we have SPL used.
 */

/* Now bring in the rest of the common code. */
#include <configs/ti_armv7_omap.h>

/* Always 64 KiB env size */
#define CONFIG_ENV_SIZE			(64 << 10)

#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG

/* Clock Defines */
#define V_OSCK				24000000  /* Clock output from T2 */
#define V_SCLK				(V_OSCK)

/* NS16550 Configuration */
#define CONFIG_SYS_NS16550_COM1		0x44e09000	/* Base EVM has UART0 */

/* SPL USB Support */

#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD)
#define CONFIG_SYS_USB_FAT_BOOT_PARTITION		1
#define CONFIG_USB_XHCI_OMAP

#define CONFIG_AM437X_USB2PHY2_HOST
#endif

#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_USBETH_SUPPORT)
#undef CONFIG_USB_DWC3_PHY_OMAP
#undef CONFIG_USB_DWC3_OMAP
#undef CONFIG_USB_DWC3
#undef CONFIG_USB_DWC3_GADGET

#undef CONFIG_USB_GADGET_DOWNLOAD
#undef CONFIG_USB_GADGET_VBUS_DRAW
#undef CONFIG_USB_GADGET_MANUFACTURER
#undef CONFIG_USB_GADGET_VENDOR_NUM
#undef CONFIG_USB_GADGET_PRODUCT_NUM
#undef CONFIG_USB_GADGET_DUALSPEED
#endif

/*
 * Disable MMC DM for SPL build and can be re-enabled after adding
 * DM support in SPL
 */
#ifdef CONFIG_SPL_BUILD
#undef CONFIG_TIMER
#endif

#ifndef CONFIG_SPL_BUILD
/* USB Device Firmware Update support */
#define DFUARGS \
	"dfu_bufsiz=0x10000\0" \
	DFU_ALT_INFO_MMC \
	DFU_ALT_INFO_EMMC \
	DFU_ALT_INFO_RAM \
	DFU_ALT_INFO_QSPI_XIP
#else
#define DFUARGS
#endif

#ifdef CONFIG_QSPI_BOOT
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
#define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
#define CONFIG_ENV_SECT_SIZE           (64 << 10) /* 64 KB sectors */
#define CONFIG_ENV_OFFSET              0x110000
#define CONFIG_ENV_OFFSET_REDUND       0x120000
#endif

/* SPI */
#define CONFIG_TI_SPI_MMAP
#define CONFIG_QSPI_SEL_GPIO                   48
#define CONFIG_SF_DEFAULT_SPEED                48000000
#define CONFIG_SF_DEFAULT_MODE                 SPI_MODE_3
#define CONFIG_QSPI_QUAD_SUPPORT
#define CONFIG_TI_EDMA3

#ifndef CONFIG_SPL_BUILD
#include <environment/ti/dfu.h>
#include <environment/ti/mmc.h>

#define CONFIG_EXTRA_ENV_SETTINGS \
	DEFAULT_LINUX_BOOT_ENV \
	DEFAULT_MMC_TI_ARGS \
	DEFAULT_FIT_TI_ARGS \
	"fdtfile=undefined\0" \
	"bootpart=0:2\0" \
	"bootdir=/boot\0" \
	"bootfile=zImage\0" \
	"console=ttyO0,115200n8\0" \
	"partitions=" \
		"uuid_disk=${uuid_gpt_disk};" \
		"name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \
	"optargs=\0" \
	"usbroot=/dev/sda2 rw\0" \
	"usbrootfstype=ext4 rootwait\0" \
	"usbdev=0\0" \
	"ramroot=/dev/ram0 rw\0" \
	"ramrootfstype=ext2\0" \
	"usbargs=setenv bootargs console=${console} " \
		"${optargs} " \
		"root=${usbroot} " \
		"rootfstype=${usbrootfstype}\0" \
	"ramargs=setenv bootargs console=${console} " \
		"${optargs} " \
		"root=${ramroot} " \
		"rootfstype=${ramrootfstype}\0" \
	"loadramdisk=load ${devtype} ${devnum} ${rdaddr} ramdisk.gz\0" \
	"usbboot=" \
		"setenv devnum ${usbdev}; " \
		"setenv devtype usb; " \
		"usb start ${usbdev}; " \
		"if usb dev ${usbdev}; then " \
			"if run loadbootenv; then " \
				"echo Loaded environment from ${bootenv};" \
				"run importbootenv;" \
			"fi;" \
			"if test -n $uenvcmd; then " \
				"echo Running uenvcmd ...;" \
				"run uenvcmd;" \
			"fi;" \
			"if run loadimage; then " \
				"run loadfdt; " \
				"echo Booting from usb ${usbdev}...; " \
				"run usbargs;" \
				"bootz ${loadaddr} - ${fdtaddr}; " \
			"fi;" \
		"fi\0" \
		"fi;" \
		"usb stop ${usbdev};\0" \
	"findfdt="\
		"if test $board_name = AM43EPOS; then " \
			"setenv fdtfile am43x-epos-evm.dtb; fi; " \
		"if test $board_name = AM43__GP; then " \
			"setenv fdtfile am437x-gp-evm.dtb; fi; " \
		"if test $board_name = AM43XXHS; then " \
			"setenv fdtfile am437x-gp-evm.dtb; fi; " \
		"if test $board_name = AM43__SK; then " \
			"setenv fdtfile am437x-sk-evm.dtb; fi; " \
		"if test $board_name = AM43_IDK; then " \
			"setenv fdtfile am437x-idk-evm.dtb; fi; " \
		"if test $fdtfile = undefined; then " \
			"echo WARNING: Could not determine device tree; fi; \0" \
	NANDARGS \
	NETARGS \
	DFUARGS \

#define CONFIG_BOOTCOMMAND \
	"if test ${boot_fit} -eq 1; then "	\
		"run update_to_fit;"	\
	"fi;"	\
	"run findfdt; " \
	"run envboot;" \
	"run mmcboot;" \
	"run usbboot;" \
	NANDBOOT \

#endif

#ifndef CONFIG_SPL_BUILD
/* CPSW Ethernet */
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_NET_RETRY_COUNT		10
#endif

#define CONFIG_DRIVER_TI_CPSW
#define PHY_ANEG_TIMEOUT	8000 /* PHY needs longer aneg time at 1G */

#define CONFIG_SYS_RX_ETH_BUFFER	64

/* NAND support */
#ifdef CONFIG_NAND
/* NAND: device related configs */
#define CONFIG_SYS_NAND_PAGE_SIZE	4096
#define CONFIG_SYS_NAND_OOBSIZE		224
#define CONFIG_SYS_NAND_BLOCK_SIZE	(256*1024)
#define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
					 CONFIG_SYS_NAND_PAGE_SIZE)
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
/* NAND: driver related configs */
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH16_CODE_HW
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
#define CONFIG_SYS_NAND_ECCPOS	{ 2, 3, 4, 5, 6, 7, 8, 9, \
				10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \
				20, 21, 22, 23, 24, 25, 26, 27, 28, 29, \
				30, 31, 32, 33, 34, 35, 36, 37, 38, 39, \
				40, 41, 42, 43, 44, 45, 46, 47, 48, 49, \
				50, 51, 52, 53, 54, 55, 56, 57, 58, 59, \
				60, 61, 62, 63, 64, 65, 66, 67, 68, 69, \
				70, 71, 72, 73, 74, 75, 76, 77, 78, 79, \
				80, 81, 82, 83, 84, 85, 86, 87, 88, 89, \
				90, 91, 92, 93, 94, 95, 96, 97, 98, 99, \
			100, 101, 102, 103, 104, 105, 106, 107, 108, 109, \
			110, 111, 112, 113, 114, 115, 116, 117, 118, 119, \
			120, 121, 122, 123, 124, 125, 126, 127, 128, 129, \
			130, 131, 132, 133, 134, 135, 136, 137, 138, 139, \
			140, 141, 142, 143, 144, 145, 146, 147, 148, 149, \
			150, 151, 152, 153, 154, 155, 156, 157, 158, 159, \
			160, 161, 162, 163, 164, 165, 166, 167, 168, 169, \
			170, 171, 172, 173, 174, 175, 176, 177, 178, 179, \
			180, 181, 182, 183, 184, 185, 186, 187, 188, 189, \
			190, 191, 192, 193, 194, 195, 196, 197, 198, 199, \
			200, 201, 202, 203, 204, 205, 206, 207, 208, 209, \
			}
#define CONFIG_SYS_NAND_ECCSIZE		512
#define CONFIG_SYS_NAND_ECCBYTES	26
#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x00180000
/* NAND: SPL related configs */
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	0x00300000 /* kernel offset */
#endif
#define NANDARGS \
	"mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
	"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
	"nandargs=setenv bootargs console=${console} " \
		"${optargs} " \
		"root=${nandroot} " \
		"rootfstype=${nandrootfstype}\0" \
	"nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,4096\0" \
	"nandrootfstype=ubifs rootwait=1\0" \
	"nandboot=echo Booting from nand ...; " \
		"run nandargs; " \
		"nand read ${fdtaddr} NAND.u-boot-spl-os; " \
		"nand read ${loadaddr} NAND.kernel; " \
		"bootz ${loadaddr} - ${fdtaddr}\0"
#define NANDBOOT			"run nandboot; "
#else /* !CONFIG_NAND */
#define NANDARGS
#define NANDBOOT
#endif /* CONFIG_NAND */

#if defined(CONFIG_TI_SECURE_DEVICE)
/* Avoid relocating onto firewalled area at end of DRAM */
#define CONFIG_PRAM (64 * 1024)
#endif /* CONFIG_TI_SECURE_DEVICE */

#endif	/* __CONFIG_AM43XX_EVM_H */
Commit	Line	Data
8d0afcd7 LV	1	/*
	2	* am43xx_evm.h
	3	*
	4	* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
	5	*
	6	* SPDX-License-Identifier: GPL-2.0+
	7	*/
	8
	9	#ifndef __CONFIG_AM43XX_EVM_H
	10	#define __CONFIG_AM43XX_EVM_H
	11
369cbe1e	12	#define CONFIG_ARCH_CPU_INIT
42da5adf	13	#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 21) /* 2GB */
8d0afcd7	14	#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
369cbe1e LV	15
369cbe1e LV	16	#include <asm/arch/omap.h>
8d0afcd7 LV	17
8d0afcd7 LV	18	/* NS16550 Configuration */
c7b9686d	19	#define CONFIG_SYS_NS16550_CLK 48000000
19c1c700 LV	20	#if !defined(CONFIG_SPL_DM) \|\| !defined(CONFIG_DM_SERIAL)
19c1c700 LV	21	#define CONFIG_SYS_NS16550_REG_SIZE (-4)
8d0afcd7	22	#define CONFIG_SYS_NS16550_SERIAL
2a429d23	23	#endif
8d0afcd7	24
9f1a8cd3	25	/* I2C Configuration */
9f1a8cd3 SN	26	#define CONFIG_ENV_EEPROM_IS_ON_I2C
	27	#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
	28	#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
9f1a8cd3	29
83bad102	30	/* Power */
7aa5598a TR	31	#define CONFIG_POWER
7aa5598a TR	32	#define CONFIG_POWER_I2C
83bad102	33	#define CONFIG_POWER_TPS65218
403d70ab	34	#define CONFIG_POWER_TPS62362
83bad102	35
369cbe1e	36	/* SPL defines. */
9aac7d0e	37	#define CONFIG_SPL_TEXT_BASE CONFIG_ISW_ENTRY_ADDR
d3289aac TR	38	#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \
d3289aac TR	39	(128 << 20))
8d0afcd7	40
573b020e LV	41	/* Enabling L2 Cache */
	42	#define CONFIG_SYS_L2_PL310
	43	#define CONFIG_SYS_PL310_BASE 0x48242000
573b020e	44
8d0afcd7	45	/*
369cbe1e LV	46	* Since SPL did pll and ddr initialization for us,
369cbe1e LV	47	* we don't need to do it twice.
8d0afcd7	48	*/
7a5f71bc	49	#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_QSPI_BOOT)
8d0afcd7 LV	50	#define CONFIG_SKIP_LOWLEVEL_INIT
	51	#endif
	52
196311dc TR	53	/*
	54	* When building U-Boot such that there is no previous loader
	55	* we need to call board_early_init_f. This is taken care of in
	56	* s_init when we have SPL used.
	57	*/
196311dc	58
369cbe1e	59	/* Now bring in the rest of the common code. */
9a0f4004	60	#include <configs/ti_armv7_omap.h>
8d0afcd7	61
7a5f71bc SP	62	/* Always 64 KiB env size */
7a5f71bc SP	63	#define CONFIG_ENV_SIZE (64 << 10)
8d0afcd7	64
369cbe1e	65	#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
8d0afcd7	66
369cbe1e LV	67	/* Clock Defines */
	68	#define V_OSCK 24000000 /* Clock output from T2 */
	69	#define V_SCLK (V_OSCK)
8d0afcd7	70
369cbe1e LV	71	/* NS16550 Configuration */
	72	#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
	73
2b36fe57	74	/* SPL USB Support */
2b36fe57	75
592bc5e2 M	76	#if defined(CONFIG_SPL_USB_HOST_SUPPORT) \|\| !defined(CONFIG_SPL_BUILD)
592bc5e2 M	77	#define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1
3d799c7f	78	#define CONFIG_USB_XHCI_OMAP
3d799c7f	79
3d799c7f	80	#define CONFIG_AM437X_USB2PHY2_HOST
aee119bd	81	#endif
3d799c7f	82
a59a77f8	83	#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_USBETH_SUPPORT)
b142729d	84	#undef CONFIG_USB_DWC3_PHY_OMAP
c16bf621	85	#undef CONFIG_USB_DWC3_OMAP
3457bbaf	86	#undef CONFIG_USB_DWC3
65403f30	87	#undef CONFIG_USB_DWC3_GADGET
3457bbaf	88
aaa4a9e3	89	#undef CONFIG_USB_GADGET_DOWNLOAD
a59a77f8	90	#undef CONFIG_USB_GADGET_VBUS_DRAW
a95aee6a MR	91	#undef CONFIG_USB_GADGET_MANUFACTURER
	92	#undef CONFIG_USB_GADGET_VENDOR_NUM
	93	#undef CONFIG_USB_GADGET_PRODUCT_NUM
3457bbaf	94	#undef CONFIG_USB_GADGET_DUALSPEED
a59a77f8 SP	95	#endif
a59a77f8 SP	96
8aff39e3 M	97	/*
	98	* Disable MMC DM for SPL build and can be re-enabled after adding
	99	* DM support in SPL
	100	*/
	101	#ifdef CONFIG_SPL_BUILD
1ce32ba7	102	#undef CONFIG_TIMER
8aff39e3 M	103	#endif
8aff39e3 M	104
a69e2c22 KVA	105	#ifndef CONFIG_SPL_BUILD
a69e2c22 KVA	106	/* USB Device Firmware Update support */
a69e2c22 KVA	107	#define DFUARGS \
	108	"dfu_bufsiz=0x10000\0" \
	109	DFU_ALT_INFO_MMC \
	110	DFU_ALT_INFO_EMMC \
42d1b818	111	DFU_ALT_INFO_RAM \
f843770a	112	DFU_ALT_INFO_QSPI_XIP
a69e2c22 KVA	113	#else
	114	#define DFUARGS
	115	#endif
	116
7a5f71bc	117	#ifdef CONFIG_QSPI_BOOT
7a5f71bc SP	118	#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
	119	#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
	120	#define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64 KB sectors */
	121	#define CONFIG_ENV_OFFSET 0x110000
	122	#define CONFIG_ENV_OFFSET_REDUND 0x120000
7a5f71bc SP	123	#endif
7a5f71bc SP	124
ea4c7a83	125	/* SPI */
ea4c7a83 SP	126	#define CONFIG_TI_SPI_MMAP
	127	#define CONFIG_QSPI_SEL_GPIO 48
	128	#define CONFIG_SF_DEFAULT_SPEED 48000000
46f7bb00	129	#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
2d134597 V	130	#define CONFIG_QSPI_QUAD_SUPPORT
2d134597 V	131	#define CONFIG_TI_EDMA3
ea4c7a83	132
1564dba7	133	#ifndef CONFIG_SPL_BUILD
88fdfcd2 SN	134	#include <environment/ti/dfu.h>
	135	#include <environment/ti/mmc.h>
	136
1564dba7	137	#define CONFIG_EXTRA_ENV_SETTINGS \
fb3ad9bd	138	DEFAULT_LINUX_BOOT_ENV \
85d17be3	139	DEFAULT_MMC_TI_ARGS \
1e93cc84	140	DEFAULT_FIT_TI_ARGS \
1564dba7 LV	141	"fdtfile=undefined\0" \
	142	"bootpart=0:2\0" \
	143	"bootdir=/boot\0" \
	144	"bootfile=zImage\0" \
	145	"console=ttyO0,115200n8\0" \
0f1b0443 TR	146	"partitions=" \
	147	"uuid_disk=${uuid_gpt_disk};" \
	148	"name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \
1564dba7	149	"optargs=\0" \
2b36fe57 DM	150	"usbroot=/dev/sda2 rw\0" \
	151	"usbrootfstype=ext4 rootwait\0" \
	152	"usbdev=0\0" \
bea0fd5e	153	"ramroot=/dev/ram0 rw\0" \
1564dba7	154	"ramrootfstype=ext2\0" \
2b36fe57 DM	155	"usbargs=setenv bootargs console=${console} " \
	156	"${optargs} " \
	157	"root=${usbroot} " \
	158	"rootfstype=${usbrootfstype}\0" \
1564dba7 LV	159	"ramargs=setenv bootargs console=${console} " \
	160	"${optargs} " \
	161	"root=${ramroot} " \
	162	"rootfstype=${ramrootfstype}\0" \
2b36fe57	163	"loadramdisk=load ${devtype} ${devnum} ${rdaddr} ramdisk.gz\0" \
2b36fe57 DM	164	"usbboot=" \
	165	"setenv devnum ${usbdev}; " \
	166	"setenv devtype usb; " \
	167	"usb start ${usbdev}; " \
	168	"if usb dev ${usbdev}; then " \
	169	"if run loadbootenv; then " \
	170	"echo Loaded environment from ${bootenv};" \
	171	"run importbootenv;" \
	172	"fi;" \
	173	"if test -n $uenvcmd; then " \
	174	"echo Running uenvcmd ...;" \
	175	"run uenvcmd;" \
	176	"fi;" \
	177	"if run loadimage; then " \
	178	"run loadfdt; " \
	179	"echo Booting from usb ${usbdev}...; " \
	180	"run usbargs;" \
	181	"bootz ${loadaddr} - ${fdtaddr}; " \
	182	"fi;" \
	183	"fi\0" \
bf0385d7 KVA	184	"fi;" \
bf0385d7 KVA	185	"usb stop ${usbdev};\0" \
1564dba7 LV	186	"findfdt="\
	187	"if test $board_name = AM43EPOS; then " \
	188	"setenv fdtfile am43x-epos-evm.dtb; fi; " \
	189	"if test $board_name = AM43__GP; then " \
	190	"setenv fdtfile am437x-gp-evm.dtb; fi; " \
a5051b72 MS	191	"if test $board_name = AM43XXHS; then " \
a5051b72 MS	192	"setenv fdtfile am437x-gp-evm.dtb; fi; " \
9cb9f333 FB	193	"if test $board_name = AM43__SK; then " \
9cb9f333 FB	194	"setenv fdtfile am437x-sk-evm.dtb; fi; " \
403d70ab FB	195	"if test $board_name = AM43_IDK; then " \
403d70ab FB	196	"setenv fdtfile am437x-idk-evm.dtb; fi; " \
1564dba7	197	"if test $fdtfile = undefined; then " \
a69e2c22	198	"echo WARNING: Could not determine device tree; fi; \0" \
0ad5eaa4	199	NANDARGS \
2320866b	200	NETARGS \
a69e2c22	201	DFUARGS \
1564dba7 LV	202
1564dba7 LV	203	#define CONFIG_BOOTCOMMAND \
1e93cc84 LV	204	"if test ${boot_fit} -eq 1; then " \
	205	"run update_to_fit;" \
	206	"fi;" \
1564dba7	207	"run findfdt; " \
18c534bb	208	"run envboot;" \
2b36fe57	209	"run mmcboot;" \
0ad5eaa4 TR	210	"run usbboot;" \
0ad5eaa4 TR	211	NANDBOOT \
1564dba7	212
3a3939bf M	213	#endif
3a3939bf M	214
f4787eab	215	#ifndef CONFIG_SPL_BUILD
4cdd7fda	216	/* CPSW Ethernet */
4cdd7fda M	217	#define CONFIG_MII
4cdd7fda M	218	#define CONFIG_BOOTP_DEFAULT
4cdd7fda M	219	#define CONFIG_BOOTP_DNS2
4cdd7fda M	220	#define CONFIG_BOOTP_SEND_HOSTNAME
4cdd7fda	221	#define CONFIG_NET_RETRY_COUNT 10
f4787eab M	222	#endif
	223
	224	#define CONFIG_DRIVER_TI_CPSW
d9da26ec	225	#define PHY_ANEG_TIMEOUT 8000 /* PHY needs longer aneg time at 1G */
3a3939bf	226
4cdd7fda	227	#define CONFIG_SYS_RX_ETH_BUFFER 64
4cdd7fda	228
e53ad4b4	229	/* NAND support */
	230	#ifdef CONFIG_NAND
	231	/* NAND: device related configs */
	232	#define CONFIG_SYS_NAND_PAGE_SIZE 4096
	233	#define CONFIG_SYS_NAND_OOBSIZE 224
	234	#define CONFIG_SYS_NAND_BLOCK_SIZE (256*1024)
	235	#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
	236	CONFIG_SYS_NAND_PAGE_SIZE)
	237	#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	238	/* NAND: driver related configs */
e53ad4b4	239	#define CONFIG_SYS_NAND_ONFI_DETECTION
	240	#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH16_CODE_HW
	241	#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
	242	#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
	243	10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \
	244	20, 21, 22, 23, 24, 25, 26, 27, 28, 29, \
	245	30, 31, 32, 33, 34, 35, 36, 37, 38, 39, \
	246	40, 41, 42, 43, 44, 45, 46, 47, 48, 49, \
	247	50, 51, 52, 53, 54, 55, 56, 57, 58, 59, \
	248	60, 61, 62, 63, 64, 65, 66, 67, 68, 69, \
	249	70, 71, 72, 73, 74, 75, 76, 77, 78, 79, \
	250	80, 81, 82, 83, 84, 85, 86, 87, 88, 89, \
	251	90, 91, 92, 93, 94, 95, 96, 97, 98, 99, \
	252	100, 101, 102, 103, 104, 105, 106, 107, 108, 109, \
	253	110, 111, 112, 113, 114, 115, 116, 117, 118, 119, \
	254	120, 121, 122, 123, 124, 125, 126, 127, 128, 129, \
	255	130, 131, 132, 133, 134, 135, 136, 137, 138, 139, \
	256	140, 141, 142, 143, 144, 145, 146, 147, 148, 149, \
	257	150, 151, 152, 153, 154, 155, 156, 157, 158, 159, \
	258	160, 161, 162, 163, 164, 165, 166, 167, 168, 169, \
	259	170, 171, 172, 173, 174, 175, 176, 177, 178, 179, \
	260	180, 181, 182, 183, 184, 185, 186, 187, 188, 189, \
	261	190, 191, 192, 193, 194, 195, 196, 197, 198, 199, \
	262	200, 201, 202, 203, 204, 205, 206, 207, 208, 209, \
	263	}
	264	#define CONFIG_SYS_NAND_ECCSIZE 512
	265	#define CONFIG_SYS_NAND_ECCBYTES 26
e53ad4b4	266	#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x00180000
e53ad4b4	267	/* NAND: SPL related configs */
e53ad4b4	268	/* NAND: SPL falcon mode configs */
e53ad4b4	269	#ifdef CONFIG_SPL_OS_BOOT
e53ad4b4	270	#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00300000 /* kernel offset */
e53ad4b4	271	#endif
0ad5eaa4	272	#define NANDARGS \
43ede0bc TR	273	"mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
43ede0bc TR	274	"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
0ad5eaa4 TR	275	"nandargs=setenv bootargs console=${console} " \
	276	"${optargs} " \
	277	"root=${nandroot} " \
	278	"rootfstype=${nandrootfstype}\0" \
	279	"nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,4096\0" \
	280	"nandrootfstype=ubifs rootwait=1\0" \
	281	"nandboot=echo Booting from nand ...; " \
	282	"run nandargs; " \
	283	"nand read ${fdtaddr} NAND.u-boot-spl-os; " \
	284	"nand read ${loadaddr} NAND.kernel; " \
	285	"bootz ${loadaddr} - ${fdtaddr}\0"
	286	#define NANDBOOT "run nandboot; "
	287	#else /* !CONFIG_NAND */
	288	#define NANDARGS
	289	#define NANDBOOT
	290	#endif /* CONFIG_NAND */
e53ad4b4	291
373358f2 AD	292	#if defined(CONFIG_TI_SECURE_DEVICE)
	293	/* Avoid relocating onto firewalled area at end of DRAM */
	294	#define CONFIG_PRAM (64 * 1024)
	295	#endif /* CONFIG_TI_SECURE_DEVICE */
	296
8d0afcd7	297	#endif /* __CONFIG_AM43XX_EVM_H */