[people/ms/u-boot.git] / include / configs / axs101.h

/*
 * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef _CONFIG_AXS101_H_
#define _CONFIG_AXS101_H_

/*
 *  CPU configuration
 */
#define CONFIG_SYS_TIMER_RATE		CONFIG_SYS_CLK_FREQ

#define ARC_FPGA_PERIPHERAL_BASE	0xE0000000
#define ARC_APB_PERIPHERAL_BASE		0xF0000000
#define ARC_DWMMC_BASE			(ARC_FPGA_PERIPHERAL_BASE + 0x15000)
#define ARC_DWGMAC_BASE			(ARC_FPGA_PERIPHERAL_BASE + 0x18000)

/*
 * Memory configuration
 */
#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE

#define CONFIG_SYS_DDR_SDRAM_BASE	0x80000000
#define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_SYS_SDRAM_SIZE		0x20000000	/* 512 Mb */

#define CONFIG_SYS_INIT_SP_ADDR		\
	(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)

#define CONFIG_SYS_MALLOC_LEN		0x200000	/* 2 MB */
#define CONFIG_SYS_BOOTM_LEN		0x2000000	/* 32 MB */
#define CONFIG_SYS_LOAD_ADDR		0x82000000

/*
 * This board might be of different versions so handle it
 */
#define CONFIG_BOARD_TYPES
#define CONFIG_BOARD_EARLY_INIT_F

/*
 * NAND Flash configuration
 */
#define CONFIG_SYS_NO_FLASH
#define CONFIG_SYS_NAND_BASE		(ARC_FPGA_PERIPHERAL_BASE + 0x16000)
#define CONFIG_SYS_MAX_NAND_DEVICE	1

/*
 * UART configuration
 */
#define CONFIG_DW_SERIAL
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_CLK		33333333
#define CONFIG_SYS_NS16550_MEM32
#define CONFIG_BAUDRATE			115200

/*
 * I2C configuration
 */
#define CONFIG_SYS_I2C
#define CONFIG_I2C_ENV_EEPROM_BUS	2
#define CONFIG_SYS_I2C_SPEED		100000
#define CONFIG_SYS_I2C_SPEED1		100000
#define CONFIG_SYS_I2C_SPEED2		100000
#define CONFIG_SYS_I2C_SLAVE		0
#define CONFIG_SYS_I2C_SLAVE1		0
#define CONFIG_SYS_I2C_SLAVE2		0
#define CONFIG_SYS_I2C_BASE		0xE001D000
#define CONFIG_SYS_I2C_BASE1		0xE001E000
#define CONFIG_SYS_I2C_BASE2		0xE001F000
#define CONFIG_SYS_I2C_BUS_MAX		3
#define IC_CLK				50

/*
 * EEPROM configuration
 */
#define CONFIG_SYS_I2C_EEPROM_ADDR		(0xA8 >> 1)
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW	1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	64

/*
 * SD/MMC configuration
 */
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_DWMMC
#define CONFIG_DOS_PARTITION

/*
 * Ethernet PHY configuration
 */
#define CONFIG_MII
#define CONFIG_PHY_GIGE

/*
 * USB 1.1 configuration
 */
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1

/*
 * Commands still not supported in Kconfig
 */
#define CONFIG_CMD_NAND

#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_MAXARGS		16

/*
 * Environment settings
 */
#define CONFIG_ENV_IS_IN_EEPROM
#define CONFIG_ENV_SIZE			0x00200		/* 512 bytes */
#define CONFIG_ENV_OFFSET		0

/*
 * Environment configuration
 */
#define CONFIG_BOOTFILE			"uImage"
#define CONFIG_BOOTARGS			"console=ttyS3,115200n8"
#define CONFIG_LOADADDR			CONFIG_SYS_LOAD_ADDR

/*
 * Console configuration
 */
#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_CBSIZE		256
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
						sizeof(CONFIG_SYS_PROMPT) + 16)

/*
 * Misc utility configuration
 */
#define CONFIG_BOUNCE_BUFFER

#endif /* _CONFIG_AXS101_H_ */
Commit	Line	Data
a7069ddf AB	1	/*
	2	* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
	3	*
	4	* SPDX-License-Identifier: GPL-2.0+
	5	*/
	6
	7	#ifndef _CONFIG_AXS101_H_
	8	#define _CONFIG_AXS101_H_
	9
	10	/*
	11	* CPU configuration
	12	*/
a7069ddf AB	13	#define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ
a7069ddf AB	14
a7069ddf AB	15	#define ARC_FPGA_PERIPHERAL_BASE 0xE0000000
	16	#define ARC_APB_PERIPHERAL_BASE 0xF0000000
	17	#define ARC_DWMMC_BASE (ARC_FPGA_PERIPHERAL_BASE + 0x15000)
	18	#define ARC_DWGMAC_BASE (ARC_FPGA_PERIPHERAL_BASE + 0x18000)
	19
	20	/*
	21	* Memory configuration
	22	*/
a7069ddf AB	23	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
	24
	25	#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
	26	#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
0cdd7620	27	#define CONFIG_SYS_SDRAM_SIZE 0x20000000 /* 512 Mb */
a7069ddf AB	28
	29	#define CONFIG_SYS_INIT_SP_ADDR \
	30	(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
	31
	32	#define CONFIG_SYS_MALLOC_LEN 0x200000 /* 2 MB */
	33	#define CONFIG_SYS_BOOTM_LEN 0x2000000 /* 32 MB */
	34	#define CONFIG_SYS_LOAD_ADDR 0x82000000
	35
0241c313 AB	36	/*
	37	* This board might be of different versions so handle it
	38	*/
	39	#define CONFIG_BOARD_TYPES
	40	#define CONFIG_BOARD_EARLY_INIT_F
	41
a7069ddf AB	42	/*
	43	* NAND Flash configuration
	44	*/
	45	#define CONFIG_SYS_NO_FLASH
	46	#define CONFIG_SYS_NAND_BASE (ARC_FPGA_PERIPHERAL_BASE + 0x16000)
	47	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	48
	49	/*
	50	* UART configuration
a7069ddf	51	*/
fb2dea60	52	#define CONFIG_DW_SERIAL
a7069ddf	53	#define CONFIG_SYS_NS16550_SERIAL
fb2dea60	54	#define CONFIG_SYS_NS16550_CLK 33333333
a7069ddf	55	#define CONFIG_SYS_NS16550_MEM32
a7069ddf	56	#define CONFIG_BAUDRATE 115200
fb2dea60	57
a7069ddf AB	58	/*
	59	* I2C configuration
	60	*/
678398b1	61	#define CONFIG_SYS_I2C
a7069ddf AB	62	#define CONFIG_I2C_ENV_EEPROM_BUS 2
a7069ddf AB	63	#define CONFIG_SYS_I2C_SPEED 100000
678398b1 SR	64	#define CONFIG_SYS_I2C_SPEED1 100000
678398b1 SR	65	#define CONFIG_SYS_I2C_SPEED2 100000
a7069ddf	66	#define CONFIG_SYS_I2C_SLAVE 0
678398b1 SR	67	#define CONFIG_SYS_I2C_SLAVE1 0
678398b1 SR	68	#define CONFIG_SYS_I2C_SLAVE2 0
a7069ddf AB	69	#define CONFIG_SYS_I2C_BASE 0xE001D000
	70	#define CONFIG_SYS_I2C_BASE1 0xE001E000
	71	#define CONFIG_SYS_I2C_BASE2 0xE001F000
	72	#define CONFIG_SYS_I2C_BUS_MAX 3
	73	#define IC_CLK 50
	74
	75	/*
	76	* EEPROM configuration
	77	*/
a7069ddf AB	78	#define CONFIG_SYS_I2C_EEPROM_ADDR (0xA8 >> 1)
	79	#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
	80	#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 1
	81	#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
6bfa4420	82	#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 64
a7069ddf AB	83
	84	/*
	85	* SD/MMC configuration
	86	*/
	87	#define CONFIG_MMC
	88	#define CONFIG_GENERIC_MMC
	89	#define CONFIG_DWMMC
	90	#define CONFIG_DOS_PARTITION
	91
	92	/*
	93	* Ethernet PHY configuration
	94	*/
a7069ddf AB	95	#define CONFIG_MII
	96	#define CONFIG_PHY_GIGE
	97
d0602bd4 AB	98	/*
	99	* USB 1.1 configuration
	100	*/
	101	#define CONFIG_USB_OHCI_NEW
	102	#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
	103
a7069ddf	104	/*
fb2dea60	105	* Commands still not supported in Kconfig
a7069ddf	106	*/
a7069ddf	107	#define CONFIG_CMD_NAND
a7069ddf AB	108
	109	#define CONFIG_AUTO_COMPLETE
	110	#define CONFIG_SYS_MAXARGS 16
	111
	112	/*
	113	* Environment settings
	114	*/
	115	#define CONFIG_ENV_IS_IN_EEPROM
	116	#define CONFIG_ENV_SIZE 0x00200 /* 512 bytes */
	117	#define CONFIG_ENV_OFFSET 0
	118
	119	/*
	120	* Environment configuration
	121	*/
a7069ddf AB	122	#define CONFIG_BOOTFILE "uImage"
	123	#define CONFIG_BOOTARGS "console=ttyS3,115200n8"
	124	#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
	125
	126	/*
	127	* Console configuration
	128	*/
	129	#define CONFIG_SYS_LONGHELP
a7069ddf AB	130	#define CONFIG_SYS_CBSIZE 256
	131	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	132	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
	133	sizeof(CONFIG_SYS_PROMPT) + 16)
	134
	135	/*
	136	* Misc utility configuration
	137	*/
	138	#define CONFIG_BOUNCE_BUFFER
	139
	140	#endif /* _CONFIG_AXS101_H_ */