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89b765c7 SR |
1 | /* |
2 | * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ | |
3 | * | |
4 | * Based on davinci_dvevm.h. Original Copyrights follow: | |
5 | * | |
6 | * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | */ | |
22 | ||
23 | #ifndef __CONFIG_H | |
24 | #define __CONFIG_H | |
25 | ||
26 | /* | |
27 | * Board | |
28 | */ | |
3d248d37 | 29 | #define CONFIG_DRIVER_TI_EMAC |
d73a8a1b | 30 | #define CONFIG_USE_SPIFLASH |
89b765c7 | 31 | |
1506b0a8 | 32 | |
89b765c7 SR |
33 | /* |
34 | * SoC Configuration | |
35 | */ | |
36 | #define CONFIG_MACH_DAVINCI_DA850_EVM | |
37 | #define CONFIG_ARM926EJS /* arm926ejs CPU core */ | |
38 | #define CONFIG_SOC_DA8XX /* TI DA8xx SoC */ | |
39 | #define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID) | |
40 | #define CONFIG_SYS_OSCIN_FREQ 24000000 | |
41 | #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE | |
42 | #define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID) | |
43 | #define CONFIG_SYS_HZ 1000 | |
44 | #define CONFIG_SKIP_LOWLEVEL_INIT | |
f760d14a | 45 | #define CONFIG_SYS_TEXT_BASE 0xc1080000 |
bd65d006 NN |
46 | #define CONFIG_SYS_ICACHE_OFF |
47 | #define CONFIG_SYS_DCACHE_OFF | |
48 | #define CONFIG_SYS_L2CACHE_OFF | |
89b765c7 SR |
49 | |
50 | /* | |
51 | * Memory Info | |
52 | */ | |
53 | #define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024) /* malloc() len */ | |
89b765c7 SR |
54 | #define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE /* DDR Start */ |
55 | #define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */ | |
97003756 | 56 | #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/ |
89b765c7 SR |
57 | |
58 | /* memtest start addr */ | |
59 | #define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000) | |
60 | ||
61 | /* memtest will be run on 16MB */ | |
62 | #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024) | |
63 | ||
64 | #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ | |
65 | #define CONFIG_STACKSIZE (256*1024) /* regular stack */ | |
66 | ||
67 | /* | |
68 | * Serial Driver info | |
69 | */ | |
70 | #define CONFIG_SYS_NS16550 | |
71 | #define CONFIG_SYS_NS16550_SERIAL | |
72 | #define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size */ | |
73 | #define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE /* Base address of UART2 */ | |
74 | #define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID) | |
75 | #define CONFIG_CONS_INDEX 1 /* use UART0 for console */ | |
76 | #define CONFIG_BAUDRATE 115200 /* Default baud rate */ | |
77 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } | |
78 | ||
d73a8a1b SB |
79 | #define CONFIG_SPI |
80 | #define CONFIG_SPI_FLASH | |
81 | #define CONFIG_SPI_FLASH_STMICRO | |
8cf47399 | 82 | #define CONFIG_SPI_FLASH_WINBOND |
d73a8a1b SB |
83 | #define CONFIG_DAVINCI_SPI |
84 | #define CONFIG_SYS_SPI_BASE DAVINCI_SPI1_BASE | |
85 | #define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID) | |
86 | #define CONFIG_SF_DEFAULT_SPEED 30000000 | |
87 | #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED | |
88 | ||
89b765c7 SR |
89 | /* |
90 | * I2C Configuration | |
91 | */ | |
92 | #define CONFIG_HARD_I2C | |
93 | #define CONFIG_DRIVER_DAVINCI_I2C | |
94 | #define CONFIG_SYS_I2C_SPEED 25000 | |
95 | #define CONFIG_SYS_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ | |
d2607401 | 96 | #define CONFIG_SYS_I2C_EXPANDER_ADDR 0x20 |
89b765c7 | 97 | |
6b2c6468 BG |
98 | /* |
99 | * Flash & Environment | |
100 | */ | |
101 | #ifdef CONFIG_USE_NAND | |
102 | #undef CONFIG_ENV_IS_IN_FLASH | |
103 | #define CONFIG_NAND_DAVINCI | |
104 | #define CONFIG_SYS_NO_FLASH | |
105 | #define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ | |
106 | #define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ | |
107 | #define CONFIG_ENV_SIZE (128 << 10) | |
108 | #define CONFIG_SYS_NAND_USE_FLASH_BBT | |
109 | #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST | |
110 | #define CONFIG_SYS_NAND_PAGE_2K | |
111 | #define CONFIG_SYS_NAND_CS 3 | |
112 | #define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE | |
113 | #define CONFIG_SYS_CLE_MASK 0x10 | |
114 | #define CONFIG_SYS_ALE_MASK 0x8 | |
115 | #undef CONFIG_SYS_NAND_HW_ECC | |
116 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ | |
117 | #define NAND_MAX_CHIPS 1 | |
6b2c6468 BG |
118 | #endif |
119 | ||
3d248d37 BG |
120 | /* |
121 | * Network & Ethernet Configuration | |
122 | */ | |
123 | #ifdef CONFIG_DRIVER_TI_EMAC | |
3d248d37 BG |
124 | #define CONFIG_MII |
125 | #define CONFIG_BOOTP_DEFAULT | |
126 | #define CONFIG_BOOTP_DNS | |
127 | #define CONFIG_BOOTP_DNS2 | |
128 | #define CONFIG_BOOTP_SEND_HOSTNAME | |
129 | #define CONFIG_NET_RETRY_COUNT 10 | |
3d248d37 BG |
130 | #endif |
131 | ||
1506b0a8 NN |
132 | #ifdef CONFIG_USE_NOR |
133 | #define CONFIG_ENV_IS_IN_FLASH | |
134 | #define CONFIG_FLASH_CFI_DRIVER | |
135 | #define CONFIG_SYS_FLASH_CFI | |
136 | #define CONFIG_SYS_FLASH_PROTECTION | |
137 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */ | |
138 | #define CONFIG_SYS_FLASH_SECT_SZ (128 << 10) /* 128KB */ | |
139 | #define CONFIG_ENV_OFFSET (CONFIG_SYS_FLASH_SECT_SZ * 3) | |
140 | #define CONFIG_ENV_SIZE (10 << 10) /* 10KB */ | |
141 | #define CONFIG_SYS_FLASH_BASE DAVINCI_ASYNC_EMIF_DATA_CE2_BASE | |
142 | #define PHYS_FLASH_SIZE (8 << 20) /* Flash size 8MB */ | |
143 | #define CONFIG_SYS_MAX_FLASH_SECT ((PHYS_FLASH_SIZE/CONFIG_SYS_FLASH_SECT_SZ)\ | |
144 | + 3) | |
145 | #define CONFIG_ENV_SECT_SIZE CONFIG_SYS_FLASH_SECT_SZ | |
146 | #endif | |
147 | ||
d73a8a1b SB |
148 | #ifdef CONFIG_USE_SPIFLASH |
149 | #undef CONFIG_ENV_IS_IN_FLASH | |
150 | #undef CONFIG_ENV_IS_IN_NAND | |
151 | #define CONFIG_ENV_IS_IN_SPI_FLASH | |
152 | #define CONFIG_ENV_SIZE (64 << 10) | |
153 | #define CONFIG_ENV_OFFSET (256 << 10) | |
154 | #define CONFIG_ENV_SECT_SIZE (64 << 10) | |
155 | #define CONFIG_SYS_NO_FLASH | |
156 | #endif | |
157 | ||
89b765c7 SR |
158 | /* |
159 | * U-Boot general configuration | |
160 | */ | |
cf2c24e3 | 161 | #define CONFIG_MISC_INIT_R |
ae5c77dd | 162 | #define CONFIG_BOARD_EARLY_INIT_F |
89b765c7 | 163 | #define CONFIG_BOOTFILE "uImage" /* Boot file name */ |
ac935e56 | 164 | #define CONFIG_SYS_PROMPT "U-Boot > " /* Command Prompt */ |
89b765c7 SR |
165 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
166 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) | |
167 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | |
168 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ | |
169 | #define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000) | |
170 | #define CONFIG_VERSION_VARIABLE | |
171 | #define CONFIG_AUTO_COMPLETE | |
172 | #define CONFIG_SYS_HUSH_PARSER | |
173 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " | |
174 | #define CONFIG_CMDLINE_EDITING | |
175 | #define CONFIG_SYS_LONGHELP | |
176 | #define CONFIG_CRC32_VERIFY | |
177 | #define CONFIG_MX_CYCLIC | |
178 | ||
179 | /* | |
180 | * Linux Information | |
181 | */ | |
59e0d611 | 182 | #define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100) |
cf2c24e3 | 183 | #define CONFIG_HWCONFIG /* enable hwconfig */ |
89b765c7 | 184 | #define CONFIG_CMDLINE_TAG |
4f6fc15b | 185 | #define CONFIG_REVISION_TAG |
89b765c7 SR |
186 | #define CONFIG_SETUP_MEMORY_TAGS |
187 | #define CONFIG_BOOTARGS \ | |
188 | "mem=32M console=ttyS2,115200n8 root=/dev/mtdblock2 rw noinitrd ip=dhcp" | |
189 | #define CONFIG_BOOTDELAY 3 | |
cf2c24e3 | 190 | #define CONFIG_EXTRA_ENV_SETTINGS "hwconfig=dsp:wake=yes" |
89b765c7 SR |
191 | |
192 | /* | |
193 | * U-Boot commands | |
194 | */ | |
195 | #include <config_cmd_default.h> | |
196 | #define CONFIG_CMD_ENV | |
197 | #define CONFIG_CMD_ASKENV | |
198 | #define CONFIG_CMD_DHCP | |
199 | #define CONFIG_CMD_DIAG | |
200 | #define CONFIG_CMD_MII | |
201 | #define CONFIG_CMD_PING | |
202 | #define CONFIG_CMD_SAVES | |
203 | #define CONFIG_CMD_MEMORY | |
204 | ||
205 | #ifndef CONFIG_DRIVER_TI_EMAC | |
206 | #undef CONFIG_CMD_NET | |
207 | #undef CONFIG_CMD_DHCP | |
208 | #undef CONFIG_CMD_MII | |
209 | #undef CONFIG_CMD_PING | |
210 | #endif | |
211 | ||
6b2c6468 BG |
212 | #ifdef CONFIG_USE_NAND |
213 | #undef CONFIG_CMD_FLASH | |
214 | #undef CONFIG_CMD_IMLS | |
215 | #define CONFIG_CMD_NAND | |
771d028a BG |
216 | |
217 | #define CONFIG_CMD_MTDPARTS | |
218 | #define CONFIG_MTD_DEVICE | |
219 | #define CONFIG_MTD_PARTITIONS | |
220 | #define CONFIG_LZO | |
221 | #define CONFIG_RBTREE | |
222 | #define CONFIG_CMD_UBI | |
223 | #define CONFIG_CMD_UBIFS | |
6b2c6468 BG |
224 | #endif |
225 | ||
d73a8a1b SB |
226 | #ifdef CONFIG_USE_SPIFLASH |
227 | #undef CONFIG_CMD_IMLS | |
228 | #undef CONFIG_CMD_FLASH | |
229 | #define CONFIG_CMD_SPI | |
230 | #define CONFIG_CMD_SF | |
231 | #define CONFIG_CMD_SAVEENV | |
232 | #endif | |
233 | ||
89b765c7 SR |
234 | #if !defined(CONFIG_USE_NAND) && \ |
235 | !defined(CONFIG_USE_NOR) && \ | |
236 | !defined(CONFIG_USE_SPIFLASH) | |
237 | #define CONFIG_ENV_IS_NOWHERE | |
238 | #define CONFIG_SYS_NO_FLASH | |
239 | #define CONFIG_ENV_SIZE (16 << 10) | |
240 | #undef CONFIG_CMD_IMLS | |
241 | #undef CONFIG_CMD_ENV | |
242 | #endif | |
243 | ||
ab86f72c | 244 | /* additions for new relocation code, must added to all boards */ |
ab86f72c HS |
245 | #define CONFIG_SYS_SDRAM_BASE 0xc0000000 |
246 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \ | |
25ddd1fb | 247 | GENERATED_GBL_DATA_SIZE) |
89b765c7 | 248 | #endif /* __CONFIG_H */ |