[people/ms/u-boot.git] / include / configs / gw_ventana.h

/*
 * Copyright (C) 2013 Gateworks Corporation
 *
 * SPDX-License-Identifier: GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/* SPL */
#define CONFIG_SPL_BOARD_INIT
/* Location in NAND to read U-Boot from */
#define CONFIG_SYS_NAND_U_BOOT_OFFS     (14 * SZ_1M)

/* Falcon Mode */
#define CONFIG_CMD_SPL
#define CONFIG_SPL_OS_BOOT
#define CONFIG_SYS_SPL_ARGS_ADDR	0x18000000
#define CONFIG_CMD_SPL_WRITE_SIZE	(128 * SZ_1K)

/* Falcon Mode - NAND support: args@17MB kernel@18MB */
#define CONFIG_CMD_SPL_NAND_OFS		(17 * SZ_1M)
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	(18 * SZ_1M)

/* Falcon Mode - MMC support: args@1MB kernel@2MB */
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	0x800	/* 1MB */
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	(CONFIG_CMD_SPL_WRITE_SIZE / 512)
#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	0x1000	/* 2MB */

#include "imx6_spl.h"                  /* common IMX6 SPL configuration */
#include "mx6_common.h"
#define CONFIG_DISPLAY_BOARDINFO_LATE

#define CONFIG_MACH_TYPE	4520   /* Gateworks Ventana Platform */

/* Serial ATAG */
#define CONFIG_SERIAL_TAG

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(10 * SZ_1M)

/* Init Functions */
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_MISC_INIT_R

/* Driver Model */
#ifndef CONFIG_SPL_BUILD
#define CONFIG_DM_GPIO
#define CONFIG_DM_THERMAL
#endif

/* Thermal */
#define CONFIG_IMX_THERMAL

/* Serial */
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE	       UART2_BASE

#ifdef CONFIG_SPI_FLASH

/* SPI */
#ifdef CONFIG_CMD_SF
  #define CONFIG_MXC_SPI
  #define CONFIG_SPI_FLASH_MTD
  #define CONFIG_SPI_FLASH_BAR
  #define CONFIG_SF_DEFAULT_BUS              0
  #define CONFIG_SF_DEFAULT_CS               0
					     /* GPIO 3-19 (21248) */
  #define CONFIG_SF_DEFAULT_SPEED            30000000
  #define CONFIG_SF_DEFAULT_MODE             (SPI_MODE_0)
#endif

#else
/* Enable NAND support */
#define CONFIG_CMD_NAND
#define CONFIG_CMD_NAND_TRIMFFS
#ifdef CONFIG_CMD_NAND
  #define CONFIG_NAND_MXS
  #define CONFIG_SYS_MAX_NAND_DEVICE	1
  #define CONFIG_SYS_NAND_BASE		0x40000000
  #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  #define CONFIG_SYS_NAND_ONFI_DETECTION

  /* DMA stuff, needed for GPMI/MXS NAND support */
  #define CONFIG_APBH_DMA
  #define CONFIG_APBH_DMA_BURST
  #define CONFIG_APBH_DMA_BURST8
#endif

#endif /* CONFIG_SPI_FLASH */

/* I2C Configs */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED		100000
#define CONFIG_I2C_GSC			0
#define CONFIG_I2C_PMIC			1
#define CONFIG_I2C_EDID

/* MMC Configs */
#define CONFIG_SYS_FSL_ESDHC_ADDR      0
#define CONFIG_SYS_FSL_USDHC_NUM       1

/* Filesystem support */
#define CONFIG_CMD_UBIFS

/*
 * SATA Configs
 */
#define CONFIG_CMD_SATA
#ifdef CONFIG_CMD_SATA
  #define CONFIG_DWC_AHSATA
  #define CONFIG_SYS_SATA_MAX_DEVICE	1
  #define CONFIG_DWC_AHSATA_PORT_ID	0
  #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
  #define CONFIG_LBA48
  #define CONFIG_LIBATA
#endif

/*
 * PCI express
 */
#define CONFIG_CMD_PCI
#ifdef CONFIG_CMD_PCI
#define CONFIG_PCI
#define CONFIG_PCI_PNP
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCI_FIXUP_DEV
#define CONFIG_PCIE_IMX
#endif

/*
 * PMIC
 */
#define CONFIG_POWER
#define CONFIG_POWER_I2C
#define CONFIG_POWER_PFUZE100
#define CONFIG_POWER_PFUZE100_I2C_ADDR	0x08
#define CONFIG_POWER_LTC3676
#define CONFIG_POWER_LTC3676_I2C_ADDR  0x3c

/* Various command support */
#define CONFIG_CMD_BMODE         /* set eFUSE shadow for a boot dev and reset */
#define CONFIG_CMD_HDMIDETECT    /* detect HDMI output device */
#define CONFIG_CMD_GSC
#define CONFIG_CMD_EECONFIG      /* Gateworks EEPROM config cmd */
#define CONFIG_RBTREE

/* Ethernet support */
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE             ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE      RGMII
#define CONFIG_FEC_MXC_PHYADDR   0
#define CONFIG_PHYLIB
#define CONFIG_ARP_TIMEOUT       200UL

/* USB Configs */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MX6
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_USB_ETHER_SMSC95XX
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET  /* For OTG port */
#define CONFIG_MXC_USB_PORTSC     (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS      0
#define CONFIG_USB_KEYBOARD
#define CONFIG_USBD_HS
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_CDC
#define CONFIG_NETCONSOLE
#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP

/* USB Mass Storage Gadget */
#define CONFIG_USB_FUNCTION_MASS_STORAGE

/* Framebuffer and LCD */
#define CONFIG_VIDEO
#define CONFIG_VIDEO_IPUV3
#define CONFIG_CFB_CONSOLE
#define CONFIG_VGA_AS_SINGLE_DEVICE
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#define CONFIG_VIDEO_LOGO
#define CONFIG_IPUV3_CLK          260000000
#define CONFIG_CMD_HDMIDETECT
#define CONFIG_CONSOLE_MUX
#define CONFIG_IMX_HDMI
#define CONFIG_IMX_VIDEO_SKIP
#define CONFIG_VIDEO_BMP_LOGO
#define CONFIG_SPLASH_SCREEN_ALIGN
#define CONFIG_HIDE_LOGO_VERSION  /* Custom config to hide U-boot version */

/* Miscellaneous configurable options */
#define CONFIG_HWCONFIG
#define CONFIG_PREBOOT

/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)

/* Memory configuration */
#define CONFIG_SYS_MEMTEST_START       0x10000000
#define CONFIG_SYS_MEMTEST_END	       0x10010000
#define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000

/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS           1
#define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

/*
 * MTD Command for mtdparts
 */
#define CONFIG_LZO
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
#ifdef CONFIG_SPI_FLASH
#define MTDIDS_DEFAULT    "nor0=nor"
#define MTDPARTS_DEFAULT  \
	"mtdparts=nor:512k(uboot),64k(env),2m(kernel),-(rootfs)"
#else
#define MTDIDS_DEFAULT    "nand0=nand"
#define MTDPARTS_DEFAULT  "mtdparts=nand:16m(uboot),1m(env),-(rootfs)"
#endif

/* Persistent Environment Config */
#ifdef CONFIG_SPI_FLASH
#define CONFIG_ENV_IS_IN_SPI_FLASH
#else
#define CONFIG_ENV_IS_IN_NAND
#endif
#if defined(CONFIG_ENV_IS_IN_MMC)
  #define CONFIG_SYS_MMC_ENV_DEV         0
  #define CONFIG_ENV_OFFSET              (709 * SZ_1K)
  #define CONFIG_ENV_SIZE                (128 * SZ_1K)
  #define CONFIG_ENV_OFFSET_REDUND       (CONFIG_ENV_OFFSET + (128 * SZ_1K))
#elif defined(CONFIG_ENV_IS_IN_NAND)
  #define CONFIG_ENV_OFFSET              (16 * SZ_1M)
  #define CONFIG_ENV_SECT_SIZE           (128 * SZ_1K)
  #define CONFIG_ENV_SIZE                CONFIG_ENV_SECT_SIZE
  #define CONFIG_ENV_OFFSET_REDUND       (CONFIG_ENV_OFFSET + (512 * SZ_1K))
  #define CONFIG_ENV_SIZE_REDUND         CONFIG_ENV_SIZE
#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
  #define CONFIG_ENV_OFFSET		(512 * SZ_1K)
  #define CONFIG_ENV_SECT_SIZE		(64 * SZ_1K)
  #define CONFIG_ENV_SIZE		(8 * SZ_1K)
  #define CONFIG_ENV_SPI_BUS             CONFIG_SF_DEFAULT_BUS
  #define CONFIG_ENV_SPI_CS              CONFIG_SF_DEFAULT_CS
  #define CONFIG_ENV_SPI_MODE            CONFIG_SF_DEFAULT_MODE
  #define CONFIG_ENV_SPI_MAX_HZ          CONFIG_SF_DEFAULT_SPEED
#endif

/* Environment */
#define CONFIG_IPADDR             192.168.1.1
#define CONFIG_SERVERIP           192.168.1.146

#define CONFIG_EXTRA_ENV_SETTINGS_COMMON \
	"pcidisable=1\0" \
	"splashpos=m,m\0" \
	"usb_pgood_delay=2000\0" \
	"console=ttymxc1\0" \
	"bootdevs=usb mmc sata flash\0" \
	"hwconfig=_UNKNOWN_\0" \
	"video=\0" \
	\
	"mtdparts=" MTDPARTS_DEFAULT "\0" \
	"mtdids=" MTDIDS_DEFAULT "\0" \
	"disk=0\0" \
	"part=1\0" \
	\
	"fdt_high=0xffffffff\0" \
	"fdt_addr=0x18000000\0" \
	"initrd_high=0xffffffff\0" \
	"fixfdt=" \
		"fdt addr ${fdt_addr}\0" \
	"bootdir=boot\0" \
	"loadfdt=" \
		"if ${fsload} ${fdt_addr} ${bootdir}/${fdt_file}; then " \
			"echo Loaded DTB from ${bootdir}/${fdt_file}; " \
			"run fixfdt; " \
		"elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file1}; then " \
			"echo Loaded DTB from ${bootdir}/${fdt_file1}; " \
			"run fixfdt; " \
		"elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file2}; then " \
			"echo Loaded DTB from ${bootdir}/${fdt_file2}; " \
			"run fixfdt; " \
		"fi\0" \
	\
	"fs=ext4\0" \
	"script=6x_bootscript-ventana\0" \
	"loadscript=" \
		"if ${fsload} ${loadaddr} ${bootdir}/${script}; then " \
			"source ${loadaddr}; " \
		"fi\0" \
	\
	"uimage=uImage\0" \
	"mmc_root=/dev/mmcblk0p1 rootfstype=${fs} rootwait rw\0" \
	"mmc_boot=" \
		"setenv fsload \"${fs}load mmc ${disk}:${part}\"; " \
		"mmc dev ${disk} && mmc rescan && " \
		"setenv dtype mmc; run loadscript; " \
		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
			"setenv bootargs console=${console},${baudrate} " \
				"root=/dev/mmcblk0p1 rootfstype=${fs} " \
				"rootwait rw ${video} ${extra}; " \
			"if run loadfdt; then " \
				"bootm ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"bootm; " \
			"fi; " \
		"fi\0" \
	\
	"sata_boot=" \
		"setenv fsload \"${fs}load sata ${disk}:${part}\"; " \
		"sata init && " \
		"setenv dtype sata; run loadscript; " \
		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
			"setenv bootargs console=${console},${baudrate} " \
				"root=/dev/sda1 rootfstype=${fs} " \
				"rootwait rw ${video} ${extra}; " \
			"if run loadfdt; then " \
				"bootm ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"bootm; " \
			"fi; " \
		"fi\0" \
	"usb_boot=" \
		"setenv fsload \"${fs}load usb ${disk}:${part}\"; " \
		"usb start && usb dev ${disk} && " \
		"setenv dtype usb; run loadscript; " \
		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
			"setenv bootargs console=${console},${baudrate} " \
				"root=/dev/sda1 rootfstype=${fs} " \
				"rootwait rw ${video} ${extra}; " \
			"if run loadfdt; then " \
				"bootm ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"bootm; " \
			"fi; " \
		"fi\0"

#ifdef CONFIG_SPI_FLASH
	#define CONFIG_EXTRA_ENV_SETTINGS \
	CONFIG_EXTRA_ENV_SETTINGS_COMMON \
	"image_os=ventana/openwrt-imx6-imx6q-gw5400-a-squashfs.bin\0" \
	"image_uboot=ventana/u-boot_spi.imx\0" \
	\
	"spi_koffset=0x90000\0" \
	"spi_klen=0x200000\0" \
	\
	"spi_updateuboot=echo Updating uboot from " \
		"${serverip}:${image_uboot}...; " \
		"tftpboot ${loadaddr} ${image_uboot} && " \
		"sf probe && sf erase 0 80000 && " \
			"sf write ${loadaddr} 400 ${filesize}\0" \
	"spi_update=echo Updating OS from ${serverip}:${image_os} " \
		"to ${spi_koffset} ...; " \
		"tftp ${loadaddr} ${image_os} && " \
		"sf probe && " \
		"sf update ${loadaddr} ${spi_koffset} ${filesize}\0" \
	\
	"flash_boot=" \
		"if sf probe && " \
		"sf read ${loadaddr} ${spi_koffset} ${spi_klen}; then " \
			"setenv bootargs console=${console},${baudrate} " \
				"root=/dev/mtdblock3 " \
				"rootfstype=squashfs,jffs2 " \
				"${video} ${extra}; " \
			"bootm; " \
		"fi\0"
#else
	#define CONFIG_EXTRA_ENV_SETTINGS \
	CONFIG_EXTRA_ENV_SETTINGS_COMMON \
	\
	"image_rootfs=openwrt-imx6-ventana-rootfs.ubi\0" \
	"nand_update=echo Updating NAND from ${serverip}:${image_rootfs}...; " \
		"tftp ${loadaddr} ${image_rootfs} && " \
		"nand erase.part rootfs && " \
		"nand write ${loadaddr} rootfs ${filesize}\0" \
	\
	"flash_boot=" \
		"setenv fsload 'ubifsload'; " \
		"ubi part rootfs; " \
		"if ubi check boot; then " \
			"ubifsmount ubi0:boot; " \
			"setenv root ubi0:rootfs ubi.mtd=2 " \
				"rootfstype=squashfs,ubifs; " \
			"setenv bootdir; " \
		"elif ubi check rootfs; then " \
			"ubifsmount ubi0:rootfs; " \
			"setenv root ubi0:rootfs ubi.mtd=2 " \
				"rootfstype=ubifs; " \
		"fi; " \
		"setenv dtype nand; run loadscript; " \
		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
			"setenv bootargs console=${console},${baudrate} " \
				"root=${root} ${video} ${extra}; " \
			"if run loadfdt; then " \
				"ubifsumount; " \
				"bootm ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"ubifsumount; bootm; " \
			"fi; " \
		"fi\0"
#endif

#define CONFIG_BOOTCOMMAND \
	"for btype in ${bootdevs}; do " \
		"echo; echo Attempting ${btype} boot...; " \
		"if run ${btype}_boot; then; fi; " \
	"done"

/* Device Tree Support */
#define CONFIG_FDT_FIXUP_PARTITIONS

#endif			       /* __CONFIG_H */
Commit	Line	Data
59189a8b TH	1	/*
	2	* Copyright (C) 2013 Gateworks Corporation
	3	*
	4	* SPDX-License-Identifier: GPL-2.0+
	5	*/
	6
	7	#ifndef __CONFIG_H
	8	#define __CONFIG_H
	9
0cc11dea	10	/* SPL */
06c3564d	11	#define CONFIG_SPL_BOARD_INIT
0cc11dea	12	/* Location in NAND to read U-Boot from */
55ff55e9	13	#define CONFIG_SYS_NAND_U_BOOT_OFFS (14 * SZ_1M)
0cc11dea	14
53940a50 TH	15	/* Falcon Mode */
	16	#define CONFIG_CMD_SPL
	17	#define CONFIG_SPL_OS_BOOT
53940a50 TH	18	#define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000
	19	#define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K)
	20
	21	/* Falcon Mode - NAND support: args@17MB kernel@18MB */
	22	#define CONFIG_CMD_SPL_NAND_OFS (17 * SZ_1M)
	23	#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS (18 * SZ_1M)
	24
	25	/* Falcon Mode - MMC support: args@1MB kernel@2MB */
	26	#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */
	27	#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512)
	28	#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */
	29
0cc11dea	30	#include "imx6_spl.h" /* common IMX6 SPL configuration */
59189a8b	31	#include "mx6_common.h"
6eab98a0	32	#define CONFIG_DISPLAY_BOARDINFO_LATE
59189a8b TH	33
	34	#define CONFIG_MACH_TYPE 4520 /* Gateworks Ventana Platform */
	35
ea690917	36	/* Serial ATAG */
59189a8b	37	#define CONFIG_SERIAL_TAG
59189a8b TH	38
59189a8b TH	39	/* Size of malloc() pool */
55ff55e9	40	#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
59189a8b TH	41
	42	/* Init Functions */
	43	#define CONFIG_BOARD_EARLY_INIT_F
	44	#define CONFIG_MISC_INIT_R
	45
e1b4770c TH	46	/* Driver Model */
e1b4770c TH	47	#ifndef CONFIG_SPL_BUILD
e1b4770c	48	#define CONFIG_DM_GPIO
50de5088	49	#define CONFIG_DM_THERMAL
e1b4770c TH	50	#endif
e1b4770c TH	51
50de5088	52	/* Thermal */
1368f993	53	#define CONFIG_IMX_THERMAL
50de5088	54
59189a8b TH	55	/* Serial */
	56	#define CONFIG_MXC_UART
	57	#define CONFIG_MXC_UART_BASE UART2_BASE
	58
	59	#ifdef CONFIG_SPI_FLASH
	60
	61	/* SPI */
59189a8b TH	62	#ifdef CONFIG_CMD_SF
	63	#define CONFIG_MXC_SPI
	64	#define CONFIG_SPI_FLASH_MTD
	65	#define CONFIG_SPI_FLASH_BAR
59189a8b	66	#define CONFIG_SF_DEFAULT_BUS 0
155fa9af	67	#define CONFIG_SF_DEFAULT_CS 0
59189a8b TH	68	/* GPIO 3-19 (21248) */
	69	#define CONFIG_SF_DEFAULT_SPEED 30000000
	70	#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
	71	#endif
	72
	73	#else
	74	/* Enable NAND support */
59189a8b TH	75	#define CONFIG_CMD_NAND
	76	#define CONFIG_CMD_NAND_TRIMFFS
	77	#ifdef CONFIG_CMD_NAND
	78	#define CONFIG_NAND_MXS
	79	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	80	#define CONFIG_SYS_NAND_BASE 0x40000000
	81	#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	82	#define CONFIG_SYS_NAND_ONFI_DETECTION
	83
	84	/* DMA stuff, needed for GPMI/MXS NAND support */
	85	#define CONFIG_APBH_DMA
	86	#define CONFIG_APBH_DMA_BURST
	87	#define CONFIG_APBH_DMA_BURST8
	88	#endif
	89
	90	#endif /* CONFIG_SPI_FLASH */
	91
59189a8b	92	/* I2C Configs */
59189a8b TH	93	#define CONFIG_SYS_I2C
59189a8b TH	94	#define CONFIG_SYS_I2C_MXC
03544c66 AA	95	#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
03544c66 AA	96	#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
f8cb101e	97	#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
9c0fe83e TH	98	#define CONFIG_SYS_I2C_SPEED 100000
	99	#define CONFIG_I2C_GSC 0
	100	#define CONFIG_I2C_PMIC 1
f6747cda	101	#define CONFIG_I2C_EDID
59189a8b TH	102
59189a8b TH	103	/* MMC Configs */
59189a8b TH	104	#define CONFIG_SYS_FSL_ESDHC_ADDR 0
59189a8b TH	105	#define CONFIG_SYS_FSL_USDHC_NUM 1
59189a8b TH	106
59189a8b TH	107	/* Filesystem support */
59189a8b	108	#define CONFIG_CMD_UBIFS
59189a8b	109
59189a8b TH	110	/*
	111	* SATA Configs
	112	*/
	113	#define CONFIG_CMD_SATA
	114	#ifdef CONFIG_CMD_SATA
	115	#define CONFIG_DWC_AHSATA
	116	#define CONFIG_SYS_SATA_MAX_DEVICE 1
	117	#define CONFIG_DWC_AHSATA_PORT_ID 0
	118	#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
	119	#define CONFIG_LBA48
	120	#define CONFIG_LIBATA
	121	#endif
	122
	123	/*
	124	* PCI express
	125	*/
	126	#define CONFIG_CMD_PCI
	127	#ifdef CONFIG_CMD_PCI
	128	#define CONFIG_PCI
	129	#define CONFIG_PCI_PNP
	130	#define CONFIG_PCI_SCAN_SHOW
dad08286	131	#define CONFIG_PCI_FIXUP_DEV
59189a8b TH	132	#define CONFIG_PCIE_IMX
	133	#endif
	134
	135	/*
	136	* PMIC
	137	*/
	138	#define CONFIG_POWER
	139	#define CONFIG_POWER_I2C
	140	#define CONFIG_POWER_PFUZE100
	141	#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
234d89da TH	142	#define CONFIG_POWER_LTC3676
234d89da TH	143	#define CONFIG_POWER_LTC3676_I2C_ADDR 0x3c
59189a8b TH	144
59189a8b TH	145	/* Various command support */
59189a8b TH	146	#define CONFIG_CMD_BMODE /* set eFUSE shadow for a boot dev and reset */
59189a8b TH	147	#define CONFIG_CMD_HDMIDETECT /* detect HDMI output device */
59189a8b	148	#define CONFIG_CMD_GSC
9c0fe83e	149	#define CONFIG_CMD_EECONFIG /* Gateworks EEPROM config cmd */
59189a8b	150	#define CONFIG_RBTREE
59189a8b TH	151
	152	/* Ethernet support */
	153	#define CONFIG_FEC_MXC
	154	#define CONFIG_MII
	155	#define IMX_FEC_BASE ENET_BASE_ADDR
	156	#define CONFIG_FEC_XCV_TYPE RGMII
59189a8b TH	157	#define CONFIG_FEC_MXC_PHYADDR 0
	158	#define CONFIG_PHYLIB
	159	#define CONFIG_ARP_TIMEOUT 200UL
	160
	161	/* USB Configs */
59189a8b TH	162	#define CONFIG_USB_EHCI
59189a8b TH	163	#define CONFIG_USB_EHCI_MX6
59189a8b TH	164	#define CONFIG_USB_HOST_ETHER
	165	#define CONFIG_USB_ETHER_ASIX
	166	#define CONFIG_USB_ETHER_SMSC95XX
	167	#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
	168	#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
	169	#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI \| PORT_PTS_PTW)
	170	#define CONFIG_MXC_USB_FLAGS 0
	171	#define CONFIG_USB_KEYBOARD
59189a8b	172	#define CONFIG_USBD_HS
59189a8b TH	173	#define CONFIG_USB_ETHER
	174	#define CONFIG_USB_ETH_CDC
	175	#define CONFIG_NETCONSOLE
	176	#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
59189a8b	177
9543e954	178	/* USB Mass Storage Gadget */
01acd6ab	179	#define CONFIG_USB_FUNCTION_MASS_STORAGE
9543e954	180
7a278f9f TH	181	/* Framebuffer and LCD */
	182	#define CONFIG_VIDEO
	183	#define CONFIG_VIDEO_IPUV3
	184	#define CONFIG_CFB_CONSOLE
	185	#define CONFIG_VGA_AS_SINGLE_DEVICE
	186	#define CONFIG_SYS_CONSOLE_IS_IN_ENV
7a278f9f TH	187	#define CONFIG_VIDEO_LOGO
	188	#define CONFIG_IPUV3_CLK 260000000
	189	#define CONFIG_CMD_HDMIDETECT
	190	#define CONFIG_CONSOLE_MUX
	191	#define CONFIG_IMX_HDMI
	192	#define CONFIG_IMX_VIDEO_SKIP
0a22c7f0 TH	193	#define CONFIG_VIDEO_BMP_LOGO
	194	#define CONFIG_SPLASH_SCREEN_ALIGN
	195	#define CONFIG_HIDE_LOGO_VERSION /* Custom config to hide U-boot version */
7a278f9f	196
59189a8b	197	/* Miscellaneous configurable options */
59189a8b	198	#define CONFIG_HWCONFIG
899f589b	199	#define CONFIG_PREBOOT
59189a8b TH	200
	201	/* Print Buffer Size */
	202	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
59189a8b TH	203
	204	/* Memory configuration */
	205	#define CONFIG_SYS_MEMTEST_START 0x10000000
	206	#define CONFIG_SYS_MEMTEST_END 0x10010000
	207	#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
59189a8b TH	208
	209	/* Physical Memory Map */
	210	#define CONFIG_NR_DRAM_BANKS 1
	211	#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
	212	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
	213	#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
	214	#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
	215
	216	#define CONFIG_SYS_INIT_SP_OFFSET \
	217	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	218	#define CONFIG_SYS_INIT_SP_ADDR \
	219	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	220
59189a8b TH	221	/*
	222	* MTD Command for mtdparts
	223	*/
a380ce6e	224	#define CONFIG_LZO
59189a8b TH	225	#define CONFIG_CMD_MTDPARTS
	226	#define CONFIG_MTD_DEVICE
	227	#define CONFIG_MTD_PARTITIONS
	228	#ifdef CONFIG_SPI_FLASH
	229	#define MTDIDS_DEFAULT "nor0=nor"
	230	#define MTDPARTS_DEFAULT \
	231	"mtdparts=nor:512k(uboot),64k(env),2m(kernel),-(rootfs)"
	232	#else
	233	#define MTDIDS_DEFAULT "nand0=nand"
	234	#define MTDPARTS_DEFAULT "mtdparts=nand:16m(uboot),1m(env),-(rootfs)"
	235	#endif
	236
	237	/* Persistent Environment Config */
59189a8b TH	238	#ifdef CONFIG_SPI_FLASH
	239	#define CONFIG_ENV_IS_IN_SPI_FLASH
	240	#else
	241	#define CONFIG_ENV_IS_IN_NAND
	242	#endif
	243	#if defined(CONFIG_ENV_IS_IN_MMC)
59189a8b	244	#define CONFIG_SYS_MMC_ENV_DEV 0
0a9c2150 TH	245	#define CONFIG_ENV_OFFSET (709 * SZ_1K)
	246	#define CONFIG_ENV_SIZE (128 * SZ_1K)
	247	#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (128 * SZ_1K))
59189a8b	248	#elif defined(CONFIG_ENV_IS_IN_NAND)
55ff55e9 TH	249	#define CONFIG_ENV_OFFSET (16 * SZ_1M)
55ff55e9 TH	250	#define CONFIG_ENV_SECT_SIZE (128 * SZ_1K)
59189a8b	251	#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
55ff55e9	252	#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (512 * SZ_1K))
59189a8b TH	253	#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
59189a8b TH	254	#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
55ff55e9 TH	255	#define CONFIG_ENV_OFFSET (512 * SZ_1K)
	256	#define CONFIG_ENV_SECT_SIZE (64 * SZ_1K)
	257	#define CONFIG_ENV_SIZE (8 * SZ_1K)
59189a8b TH	258	#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
	259	#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
	260	#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
	261	#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
	262	#endif
	263
	264	/* Environment */
59189a8b TH	265	#define CONFIG_IPADDR 192.168.1.1
59189a8b TH	266	#define CONFIG_SERVERIP 192.168.1.146
59189a8b TH	267
59189a8b TH	268	#define CONFIG_EXTRA_ENV_SETTINGS_COMMON \
f4416579	269	"pcidisable=1\0" \
0a22c7f0	270	"splashpos=m,m\0" \
04171690	271	"usb_pgood_delay=2000\0" \
59189a8b TH	272	"console=ttymxc1\0" \
59189a8b TH	273	"bootdevs=usb mmc sata flash\0" \
5911c092	274	"hwconfig=_UNKNOWN_\0" \
59189a8b TH	275	"video=\0" \
	276	\
	277	"mtdparts=" MTDPARTS_DEFAULT "\0" \
	278	"mtdids=" MTDIDS_DEFAULT "\0" \
7698cdfd TH	279	"disk=0\0" \
7698cdfd TH	280	"part=1\0" \
59189a8b TH	281	\
	282	"fdt_high=0xffffffff\0" \
	283	"fdt_addr=0x18000000\0" \
8cc25eb8	284	"initrd_high=0xffffffff\0" \
4df0bff3 TH	285	"fixfdt=" \
4df0bff3 TH	286	"fdt addr ${fdt_addr}\0" \
e2801a96	287	"bootdir=boot\0" \
59189a8b	288	"loadfdt=" \
1b740001 TH	289	"if ${fsload} ${fdt_addr} ${bootdir}/${fdt_file}; then " \
1b740001 TH	290	"echo Loaded DTB from ${bootdir}/${fdt_file}; " \
4df0bff3	291	"run fixfdt; " \
1b740001 TH	292	"elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file1}; then " \
1b740001 TH	293	"echo Loaded DTB from ${bootdir}/${fdt_file1}; " \
4df0bff3	294	"run fixfdt; " \
1b740001 TH	295	"elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file2}; then " \
1b740001 TH	296	"echo Loaded DTB from ${bootdir}/${fdt_file2}; " \
4df0bff3	297	"run fixfdt; " \
59189a8b TH	298	"fi\0" \
59189a8b TH	299	\
543a4aba	300	"fs=ext4\0" \
e2801a96	301	"script=6x_bootscript-ventana\0" \
59189a8b	302	"loadscript=" \
e2801a96	303	"if ${fsload} ${loadaddr} ${bootdir}/${script}; then " \
50987095	304	"source ${loadaddr}; " \
59189a8b TH	305	"fi\0" \
59189a8b TH	306	\
e2801a96	307	"uimage=uImage\0" \
543a4aba	308	"mmc_root=/dev/mmcblk0p1 rootfstype=${fs} rootwait rw\0" \
59189a8b	309	"mmc_boot=" \
543a4aba	310	"setenv fsload \"${fs}load mmc ${disk}:${part}\"; " \
7698cdfd	311	"mmc dev ${disk} && mmc rescan && " \
560e8b3f	312	"setenv dtype mmc; run loadscript; " \
e2801a96	313	"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
59189a8b	314	"setenv bootargs console=${console},${baudrate} " \
543a4aba	315	"root=/dev/mmcblk0p1 rootfstype=${fs} " \
59189a8b	316	"rootwait rw ${video} ${extra}; " \
4df0bff3	317	"if run loadfdt; then " \
59189a8b TH	318	"bootm ${loadaddr} - ${fdt_addr}; " \
	319	"else " \
	320	"bootm; " \
	321	"fi; " \
	322	"fi\0" \
	323	\
	324	"sata_boot=" \
543a4aba	325	"setenv fsload \"${fs}load sata ${disk}:${part}\"; " \
7698cdfd	326	"sata init && " \
560e8b3f	327	"setenv dtype sata; run loadscript; " \
e2801a96	328	"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
59189a8b	329	"setenv bootargs console=${console},${baudrate} " \
543a4aba	330	"root=/dev/sda1 rootfstype=${fs} " \
59189a8b	331	"rootwait rw ${video} ${extra}; " \
4df0bff3	332	"if run loadfdt; then " \
59189a8b TH	333	"bootm ${loadaddr} - ${fdt_addr}; " \
	334	"else " \
	335	"bootm; " \
	336	"fi; " \
	337	"fi\0" \
	338	"usb_boot=" \
543a4aba	339	"setenv fsload \"${fs}load usb ${disk}:${part}\"; " \
7698cdfd	340	"usb start && usb dev ${disk} && " \
560e8b3f	341	"setenv dtype usb; run loadscript; " \
e2801a96	342	"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
59189a8b	343	"setenv bootargs console=${console},${baudrate} " \
543a4aba	344	"root=/dev/sda1 rootfstype=${fs} " \
59189a8b	345	"rootwait rw ${video} ${extra}; " \
4df0bff3	346	"if run loadfdt; then " \
59189a8b TH	347	"bootm ${loadaddr} - ${fdt_addr}; " \
	348	"else " \
	349	"bootm; " \
	350	"fi; " \
	351	"fi\0"
	352
	353	#ifdef CONFIG_SPI_FLASH
	354	#define CONFIG_EXTRA_ENV_SETTINGS \
	355	CONFIG_EXTRA_ENV_SETTINGS_COMMON \
	356	"image_os=ventana/openwrt-imx6-imx6q-gw5400-a-squashfs.bin\0" \
	357	"image_uboot=ventana/u-boot_spi.imx\0" \
	358	\
	359	"spi_koffset=0x90000\0" \
	360	"spi_klen=0x200000\0" \
	361	\
	362	"spi_updateuboot=echo Updating uboot from " \
	363	"${serverip}:${image_uboot}...; " \
	364	"tftpboot ${loadaddr} ${image_uboot} && " \
	365	"sf probe && sf erase 0 80000 && " \
	366	"sf write ${loadaddr} 400 ${filesize}\0" \
	367	"spi_update=echo Updating OS from ${serverip}:${image_os} " \
	368	"to ${spi_koffset} ...; " \
	369	"tftp ${loadaddr} ${image_os} && " \
	370	"sf probe && " \
	371	"sf update ${loadaddr} ${spi_koffset} ${filesize}\0" \
	372	\
	373	"flash_boot=" \
	374	"if sf probe && " \
	375	"sf read ${loadaddr} ${spi_koffset} ${spi_klen}; then " \
	376	"setenv bootargs console=${console},${baudrate} " \
	377	"root=/dev/mtdblock3 " \
	378	"rootfstype=squashfs,jffs2 " \
	379	"${video} ${extra}; " \
	380	"bootm; " \
	381	"fi\0"
	382	#else
	383	#define CONFIG_EXTRA_ENV_SETTINGS \
	384	CONFIG_EXTRA_ENV_SETTINGS_COMMON \
59189a8b	385	\
e2801a96	386	"image_rootfs=openwrt-imx6-ventana-rootfs.ubi\0" \
59189a8b TH	387	"nand_update=echo Updating NAND from ${serverip}:${image_rootfs}...; " \
	388	"tftp ${loadaddr} ${image_rootfs} && " \
	389	"nand erase.part rootfs && " \
	390	"nand write ${loadaddr} rootfs ${filesize}\0" \
	391	\
	392	"flash_boot=" \
	393	"setenv fsload 'ubifsload'; " \
e2801a96 TH	394	"ubi part rootfs; " \
	395	"if ubi check boot; then " \
	396	"ubifsmount ubi0:boot; " \
	397	"setenv root ubi0:rootfs ubi.mtd=2 " \
	398	"rootfstype=squashfs,ubifs; " \
	399	"setenv bootdir; " \
	400	"elif ubi check rootfs; then " \
	401	"ubifsmount ubi0:rootfs; " \
	402	"setenv root ubi0:rootfs ubi.mtd=2 " \
	403	"rootfstype=ubifs; " \
	404	"fi; " \
560e8b3f	405	"setenv dtype nand; run loadscript; " \
e2801a96	406	"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
59189a8b	407	"setenv bootargs console=${console},${baudrate} " \
e2801a96	408	"root=${root} ${video} ${extra}; " \
4df0bff3	409	"if run loadfdt; then " \
59189a8b TH	410	"ubifsumount; " \
	411	"bootm ${loadaddr} - ${fdt_addr}; " \
	412	"else " \
	413	"ubifsumount; bootm; " \
	414	"fi; " \
	415	"fi\0"
	416	#endif
	417
	418	#define CONFIG_BOOTCOMMAND \
	419	"for btype in ${bootdevs}; do " \
	420	"echo; echo Attempting ${btype} boot...; " \
	421	"if run ${btype}_boot; then; fi; " \
	422	"done"
	423
	424	/* Device Tree Support */
59189a8b TH	425	#define CONFIG_FDT_FIXUP_PARTITIONS
59189a8b TH	426
59189a8b	427	#endif /* __CONFIG_H */