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1/*
2 * (C) Copyright 2009
3 * Marvell Semiconductor <www.marvell.com>
4 * Prafulla Wadaskar <prafulla@marvell.com>
5 *
6 * (C) Copyright 2009
7 * Stefan Roese, DENX Software Engineering, sr@denx.de.
8 *
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9 * (C) Copyright 2010-2011
10 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
11 *
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12 * See file CREDITS for list of people who contributed to this
13 * project.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
28 * MA 02110-1301 USA
29 */
30
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31/*
32 * for linking errors see
33 * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
34 */
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35
36#ifndef _CONFIG_KM_ARM_H
37#define _CONFIG_KM_ARM_H
38
39/*
40 * High Level Configuration Options (easy to change)
41 */
42#define CONFIG_MARVELL
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43#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */
44#define CONFIG_KIRKWOOD /* SOC Family Name */
45#define CONFIG_KW88F6281 /* SOC Name */
802d9963 46#define CONFIG_MACH_KM_KIRKWOOD /* Machine type */
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47
48/* include common defines/options for all Keymile boards */
49#include "keymile-common.h"
de3ad13d 50
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51#define CONFIG_CMD_NAND
52#define CONFIG_CMD_SF
53#define CONFIG_SOFT_I2C /* I2C bit-banged */
54
55#include "asm/arch/config.h"
56
731b9680 57#define CONFIG_SYS_TEXT_BASE 0x04000000 /* code address after reloc */
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58#define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */
59#define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */
60#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
61
62/* pseudo-non volatile RAM [hex] */
63#define CONFIG_KM_PNVRAM 0x80000
64/* physical RAM MTD size [hex] */
65#define CONFIG_KM_PHRAM 0x17F000
66
67#define CONFIG_KM_CRAMFS_ADDR 0x2400000
68#define CONFIG_KM_KERNEL_ADDR 0x2000000 /* 4096KBytes */
69
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70/* architecture specific default bootargs */
71#define CONFIG_KM_DEF_BOOT_ARGS_CPU \
72 "bootcountaddr=${bootcountaddr} ${mtdparts}"
73
de3ad13d 74#define CONFIG_KM_DEF_ENV_CPU \
db0bb572 75 "boot=bootm ${load_addr_r} - -\0" \
2d9528e3 76 "cramfsloadfdt=true\0" \
8519d180 77 "u-boot="xstr(CONFIG_HOSTNAME) "/u-boot.kwb\0" \
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78 CONFIG_KM_DEF_ENV_UPDATE \
79 ""
80
67fa8c25 81#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
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82#define CONFIG_MISC_INIT_R
83
84/*
85 * NS16550 Configuration
86 */
87#define CONFIG_SYS_NS16550
88#define CONFIG_SYS_NS16550_SERIAL
89#define CONFIG_SYS_NS16550_REG_SIZE (-4)
90#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
91#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE
3d3c7096 92#define CONFIG_SYS_NS16550_COM2 KW_UART1_BASE
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93
94/*
95 * Serial Port configuration
96 * The following definitions let you select what serial you want to use
97 * for your console driver.
98 */
99
100#define CONFIG_CONS_INDEX 1 /* Console on UART0 */
101
102/*
103 * For booting Linux, the board info and command line data
104 * have to be in the first 8 MB of memory, since this is
105 * the maximum mapped by the Linux kernel during initialization.
106 */
107#define CONFIG_BOOTMAPSZ (8 << 20) /* Initial Memmap for Linux */
108#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
109#define CONFIG_INITRD_TAG /* enable INITRD tag */
499b1a4d 110#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
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111
112/*
113 * Commands configuration
114 */
115#define CONFIG_CMD_ELF
116#define CONFIG_CMD_MTDPARTS
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117#define CONFIG_CMD_NFS
118
119/*
120 * Without NOR FLASH we need this
121 */
122#define CONFIG_SYS_NO_FLASH
123#undef CONFIG_CMD_FLASH
124#undef CONFIG_CMD_IMLS
125
126/*
127 * NAND Flash configuration
128 */
129#define CONFIG_SYS_MAX_NAND_DEVICE 1
130#define NAND_MAX_CHIPS 1
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131
132#define BOOTFLASH_START 0x0
133
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134/* Kirkwood has two serial IF */
135#if (CONFIG_CONS_INDEX == 2)
136#define CONFIG_KM_CONSOLE_TTY "ttyS1"
137#else
67fa8c25 138#define CONFIG_KM_CONSOLE_TTY "ttyS0"
3d3c7096 139#endif
67fa8c25 140
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141/*
142 * Other required minimal configurations
143 */
144#define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */
145#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
146#define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */
147#define CONFIG_DISPLAY_CPUINFO /* Display cpu info */
148#define CONFIG_NR_DRAM_BANKS 4
149#define CONFIG_STACKSIZE 0x00100000 /* regular stack- 1M */
150#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
151
152/*
153 * Ethernet Driver configuration
154 */
155#define CONFIG_NETCONSOLE /* include NetConsole support */
156#define CONFIG_NET_MULTI /* specify more that one ports available */
157#define CONFIG_MII /* expose smi ove miiphy interface */
d44265ad 158#define CONFIG_MVGBE /* Enable Marvell Gbe Controller Driver */
67fa8c25 159#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */
d44265ad 160#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */
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161#define CONFIG_PHY_BASE_ADR 0
162#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
163#define CONFIG_RESET_PHY_R /* use reset_phy() to init 88E1118 PHY */
164
165/*
166 * UBI related stuff
167 */
168#define CONFIG_SYS_USE_UBI
169
170/*
171 * I2C related stuff
172 */
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173#define CONFIG_KIRKWOOD_GPIO /* Enable GPIO Support */
174#if defined(CONFIG_SOFT_I2C)
175#ifndef __ASSEMBLY__
176#include <asm/arch-kirkwood/gpio.h>
177extern void __set_direction(unsigned pin, int high);
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178void set_sda(int state);
179void set_scl(int state);
180int get_sda(void);
181int get_scl(void);
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182#define KM_KIRKWOOD_SDA_PIN 8
183#define KM_KIRKWOOD_SCL_PIN 9
184#define KM_KIRKWOOD_ENV_WP 38
185
186#define I2C_ACTIVE __set_direction(KM_KIRKWOOD_SDA_PIN, 0)
187#define I2C_TRISTATE __set_direction(KM_KIRKWOOD_SDA_PIN, 1)
188#define I2C_READ (kw_gpio_get_value(KM_KIRKWOOD_SDA_PIN) ? 1 : 0)
189#define I2C_SDA(bit) kw_gpio_set_value(KM_KIRKWOOD_SDA_PIN, bit)
190#define I2C_SCL(bit) kw_gpio_set_value(KM_KIRKWOOD_SCL_PIN, bit)
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191#endif
192
193#define I2C_DELAY udelay(3) /* 1/4 I2C clock duration */
194#define I2C_SOFT_DECLARATIONS
195
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196#endif
197
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198/* EEprom support 24C128, 24C256 valid for environment eeprom */
199#define CONFIG_SYS_I2C_MULTI_EEPROMS
200#define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
201#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 Byte write page */
202#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
203
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204#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
205#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
206
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207/*
208 * Environment variables configurations
209 */
210#define CONFIG_ENV_IS_IN_EEPROM /* use EEPROM for environment vars */
211#define CONFIG_SYS_DEF_EEPROM_ADDR 0x50
212#define CONFIG_ENV_EEPROM_IS_ON_I2C
213#define CONFIG_SYS_EEPROM_WREN
214#define CONFIG_ENV_OFFSET 0x0 /* no bracets! */
331a30dc 215#define CONFIG_ENV_SIZE (0x2000 - CONFIG_ENV_OFFSET)
680cfaf8 216#define CONFIG_I2C_ENV_EEPROM_BUS KM_ENV_BUS "\0"
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217
218/* offset redund: (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */
219#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
220#define CONFIG_ENV_OFFSET_REDUND 0x2000 /* no bracets! */
221#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
222
331a30dc 223#define CONFIG_SPI_FLASH
331a30dc 224#define CONFIG_SPI_FLASH_STMICRO
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225
226#define FLASH_GPIO_PIN 0x00010000
227
228#define MTDIDS_DEFAULT "nand0=orion_nand"
229/* test-only: partitioning needs some tuning, this is just for tests */
230#define MTDPARTS_DEFAULT "mtdparts=" \
231 "orion_nand:" \
232 "-(" CONFIG_KM_UBI_PARTITION_NAME ")"
233
234#define CONFIG_KM_DEF_ENV_UPDATE \
235 "update=" \
236 "spi on;sf probe 0;sf erase 0 50000;" \
db0bb572 237 "sf write ${load_addr_r} 0 ${filesize};" \
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238 "spi off\0"
239
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240/*
241 * Default environment variables
242 */
243#define CONFIG_EXTRA_ENV_SETTINGS \
244 CONFIG_KM_DEF_ENV \
245 "newenv=setenv addr 0x100000 && " \
246 "i2c dev 1; mw.b ${addr} 0 4 && " \
247 "eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR) \
248 " ${addr} " xstr(CONFIG_ENV_OFFSET) " 4 && " \
249 "eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR) \
250 " ${addr} " xstr(CONFIG_ENV_OFFSET_REDUND) " 4\0" \
b648bfc2 251 "arch=arm\0" \
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252 "EEprom_ivm=" KM_IVM_BUS "\0" \
253 ""
254
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255#if defined(CONFIG_SYS_NO_FLASH)
256#define CONFIG_KM_UBI_PARTITION_NAME "ubi0"
257#undef CONFIG_FLASH_CFI_MTD
95e39793 258#undef CONFIG_CMD_JFFS2
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259#undef CONFIG_JFFS2_CMDLINE
260#endif
261
a784c01a 262/* additions for new relocation code, must be added to all boards */
ab86f72c 263#define CONFIG_SYS_SDRAM_BASE 0x00000000
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264/* Do early setups now in board_init_f() */
265#define CONFIG_BOARD_EARLY_INIT_F
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266
267/*
268 * resereved pram area at the end of memroy [hex]
269 * 8Mbytes for switch + 4Kbytes for bootcount
270 */
271#define CONFIG_KM_RESERVED_PRAM 0x801000
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272/* address for the bootcount (taken from end of RAM) */
273#define BOOTCOUNT_ADDR (CONFIG_KM_RESERVED_PRAM)
f1fef1d8 274
67fa8c25 275#endif /* _CONFIG_KM_ARM_H */