[people/ms/u-boot.git] / include / configs / km / km_arm.h

/*
 * (C) Copyright 2009
 * Marvell Semiconductor <www.marvell.com>
 * Prafulla Wadaskar <prafulla@marvell.com>
 *
 * (C) Copyright 2009
 * Stefan Roese, DENX Software Engineering, sr@denx.de.
 *
 * (C) Copyright 2010-2011
 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 * MA 02110-1301 USA
 */

/*
 * for linking errors see
 * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
 */

#ifndef _CONFIG_KM_ARM_H
#define _CONFIG_KM_ARM_H

/*
 * High Level Configuration Options (easy to change)
 */
#define CONFIG_MARVELL
#define CONFIG_FEROCEON_88FR131		/* CPU Core subversion */
#define CONFIG_KIRKWOOD			/* SOC Family Name */
#define CONFIG_KW88F6281		/* SOC Name */
#define CONFIG_MACH_KM_KIRKWOOD		/* Machine type */

/* include common defines/options for all Keymile boards */
#include "keymile-common.h"

#define CONFIG_CMD_NAND
#define CONFIG_CMD_SF
#define CONFIG_SOFT_I2C		/* I2C bit-banged	*/

#include "asm/arch/config.h"

#define CONFIG_SYS_TEXT_BASE	0x04000000	/* code address after reloc */
#define CONFIG_ENV_SIZE		(128 << 10)	/* NAND chip block size	*/
#define CONFIG_SYS_MEMTEST_START 0x00400000	/* 4M */
#define CONFIG_SYS_MEMTEST_END	0x007fffff	/*(_8M -1) */
#define CONFIG_SYS_LOAD_ADDR	0x00800000	/* default load adr- 8M */

/* pseudo-non volatile RAM [hex] */
#define CONFIG_KM_PNVRAM	0x80000
/* physical RAM MTD size [hex] */
#define CONFIG_KM_PHRAM		0x17F000

#define CONFIG_KM_CRAMFS_ADDR	0x2400000
#define CONFIG_KM_KERNEL_ADDR	0x2000000	/* 4096KBytes */

#define CONFIG_KM_DEF_ENV_CPU						\
	"addbootcount="							\
		"setenv bootargs ${bootargs} "				\
		"bootcountaddr=${bootcountaddr}\0"			\
	"addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0"		\
	"boot=bootm ${actual_kernel_addr} - -\0"			\
	"cramfsloadfdt=true\0"						\
	CONFIG_KM_DEF_ENV_UPDATE					\
	""

#define CONFIG_KM_ARCH_DBG_FILE		"scripts/debug-arm-env.txt"

#define CONFIG_SKIP_LOWLEVEL_INIT	/* disable board lowlevel_init */
#define CONFIG_MISC_INIT_R

/*
 * NS16550 Configuration
 */
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
#define CONFIG_SYS_NS16550_CLK		CONFIG_SYS_TCLK
#define CONFIG_SYS_NS16550_COM1		KW_UART0_BASE
#define CONFIG_SYS_NS16550_COM2		KW_UART1_BASE

/*
 * Serial Port configuration
 * The following definitions let you select what serial you want to use
 * for your console driver.
 */

#define CONFIG_CONS_INDEX	1	/* Console on UART0 */

/*
 * For booting Linux, the board info and command line data
 * have to be in the first 8 MB of memory, since this is
 * the maximum mapped by the Linux kernel during initialization.
 */
#define CONFIG_BOOTMAPSZ	(8 << 20)	/* Initial Memmap for Linux */
#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs  */
#define CONFIG_INITRD_TAG		/* enable INITRD tag */
#define CONFIG_SETUP_MEMORY_TAGS	/* enable memory tag */

/*
 * Commands configuration
 */
#define CONFIG_CMD_ELF
#define CONFIG_CMD_MTDPARTS
#define CONFIG_CMD_NFS

/*
 * Without NOR FLASH we need this
 */
#define CONFIG_SYS_NO_FLASH
#undef CONFIG_CMD_FLASH
#undef CONFIG_CMD_IMLS

/*
 * NAND Flash configuration
 */
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define NAND_MAX_CHIPS			1

#define BOOTFLASH_START		0x0

/* Kirkwood has two serial IF */
#if (CONFIG_CONS_INDEX == 2)
#define CONFIG_KM_CONSOLE_TTY	"ttyS1"
#else
#define CONFIG_KM_CONSOLE_TTY	"ttyS0"
#endif

/*
 * Other required minimal configurations
 */
#define CONFIG_CONSOLE_INFO_QUIET	/* some code reduction */
#define CONFIG_ARCH_CPU_INIT		/* call arch_cpu_init() */
#define CONFIG_ARCH_MISC_INIT		/* call arch_misc_init() */
#define CONFIG_DISPLAY_CPUINFO		/* Display cpu info */
#define CONFIG_NR_DRAM_BANKS	4
#define CONFIG_STACKSIZE	0x00100000	/* regular stack- 1M */
#define CONFIG_SYS_RESET_ADDRESS 0xffff0000	/* Rst Vector Adr */

/*
 * Ethernet Driver configuration
 */
#define CONFIG_NETCONSOLE	/* include NetConsole support   */
#define CONFIG_NET_MULTI	/* specify more that one ports available */
#define CONFIG_MII		/* expose smi ove miiphy interface */
#define CONFIG_MVGBE		/* Enable Marvell Gbe Controller Driver */
#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN	/* detect link using phy */
#define CONFIG_MVGBE_PORTS	{1, 0}	/* enable port 0 only */
#define CONFIG_PHY_BASE_ADR	0
#define CONFIG_ENV_OVERWRITE	/* ethaddr can be reprogrammed */
#define CONFIG_RESET_PHY_R	/* use reset_phy() to init 88E1118 PHY */

/*
 * UBI related stuff
 */
#define CONFIG_SYS_USE_UBI

/*
 * I2C related stuff
 */
#define	CONFIG_KIRKWOOD_GPIO		/* Enable GPIO Support */
#if defined(CONFIG_SOFT_I2C)
#ifndef __ASSEMBLY__
#include <asm/arch-kirkwood/gpio.h>
extern void __set_direction(unsigned pin, int high);
void set_sda(int state);
void set_scl(int state);
int get_sda(void);
int get_scl(void);
#define KM_KIRKWOOD_SDA_PIN	8
#define KM_KIRKWOOD_SCL_PIN	9
#define KM_KIRKWOOD_ENV_WP	38

#define I2C_ACTIVE	__set_direction(KM_KIRKWOOD_SDA_PIN, 0)
#define I2C_TRISTATE	__set_direction(KM_KIRKWOOD_SDA_PIN, 1)
#define I2C_READ	(kw_gpio_get_value(KM_KIRKWOOD_SDA_PIN) ? 1 : 0)
#define I2C_SDA(bit)	kw_gpio_set_value(KM_KIRKWOOD_SDA_PIN, bit)
#define I2C_SCL(bit)	kw_gpio_set_value(KM_KIRKWOOD_SCL_PIN, bit)
#endif

#define I2C_DELAY	udelay(3)	/* 1/4 I2C clock duration */
#define I2C_SOFT_DECLARATIONS

#endif

#define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2

/*
 *  Environment variables configurations
 */
#define CONFIG_ENV_IS_IN_EEPROM		/* use EEPROM for environment vars */
#define CONFIG_SYS_DEF_EEPROM_ADDR	0x50
#define CONFIG_ENV_EEPROM_IS_ON_I2C
#define CONFIG_SYS_EEPROM_WREN
#define CONFIG_ENV_OFFSET		0x0 /* no bracets! */
#undef	CONFIG_ENV_SIZE
#define CONFIG_ENV_SIZE			(0x2000 - CONFIG_ENV_OFFSET)
#define CONFIG_I2C_ENV_EEPROM_BUS	"pca9547:70:d\0"

/* offset redund: (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
#define CONFIG_ENV_OFFSET_REDUND	0x2000 /* no bracets! */
#define CONFIG_ENV_SIZE_REDUND		(CONFIG_ENV_SIZE)

#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_STMICRO

#define FLASH_GPIO_PIN			0x00010000

#define MTDIDS_DEFAULT		"nand0=orion_nand"
/* test-only: partitioning needs some tuning, this is just for tests */
#define MTDPARTS_DEFAULT	"mtdparts="				\
	"orion_nand:"							\
		"-(" CONFIG_KM_UBI_PARTITION_NAME ")"

#define	CONFIG_KM_DEF_ENV_UPDATE					\
	"update="							\
		"spi on;sf probe 0;sf erase 0 50000;"			\
		"sf write ${u-boot_addr_r} 0 ${filesize};"		\
		"spi off\0"

/*
 * Default environment variables
 */
#define CONFIG_EXTRA_ENV_SETTINGS					\
	CONFIG_KM_DEF_ENV						\
	"newenv=setenv addr 0x100000 && "				\
		"i2c dev 1; mw.b ${addr} 0 4 && "			\
		"eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR)	\
		" ${addr} " xstr(CONFIG_ENV_OFFSET) " 4 && "		\
		"eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR)	\
		" ${addr} " xstr(CONFIG_ENV_OFFSET_REDUND) " 4\0"	\
	"rootpath=/opt/eldk/arm\0"					\
	"EEprom_ivm=" KM_IVM_BUS "\0"					\
	""

#if defined(CONFIG_SYS_NO_FLASH)
#define CONFIG_KM_UBI_PARTITION_NAME   "ubi0"
#undef	CONFIG_FLASH_CFI_MTD
#undef	CONFIG_CMD_JFFS2
#undef	CONFIG_JFFS2_CMDLINE
#endif

/* additions for new relocation code, must be added to all boards */
#define CONFIG_SYS_SDRAM_BASE		0x00000000
/* Do early setups now in board_init_f() */
#define CONFIG_BOARD_EARLY_INIT_F

/*
 * resereved pram area at the end of memroy [hex]
 * 8Mbytes for switch + 4Kbytes for bootcount
 */
#define CONFIG_KM_RESERVED_PRAM 0x801000
/* address for the bootcount (taken from end of RAM) */
#define BOOTCOUNT_ADDR          (CONFIG_KM_RESERVED_PRAM)

#endif /* _CONFIG_KM_ARM_H */
Commit	Line	Data
67fa8c25 HS	1	/*
	2	* (C) Copyright 2009
	3	* Marvell Semiconductor <www.marvell.com>
	4	* Prafulla Wadaskar <prafulla@marvell.com>
	5	*
	6	* (C) Copyright 2009
	7	* Stefan Roese, DENX Software Engineering, sr@denx.de.
	8	*
b11f53f3 HS	9	* (C) Copyright 2010-2011
	10	* Heiko Schocher, DENX Software Engineering, hs@denx.de.
	11	*
67fa8c25 HS	12	* See file CREDITS for list of people who contributed to this
	13	* project.
	14	*
	15	* This program is free software; you can redistribute it and/or
	16	* modify it under the terms of the GNU General Public License as
	17	* published by the Free Software Foundation; either version 2 of
	18	* the License, or (at your option) any later version.
	19	*
	20	* This program is distributed in the hope that it will be useful,
	21	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	22	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	23	* GNU General Public License for more details.
	24	*
	25	* You should have received a copy of the GNU General Public License
	26	* along with this program; if not, write to the Free Software
	27	* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
	28	* MA 02110-1301 USA
	29	*/
	30
b11f53f3 HS	31	/*
	32	* for linking errors see
	33	* http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
	34	*/
67fa8c25 HS	35
	36	#ifndef _CONFIG_KM_ARM_H
	37	#define _CONFIG_KM_ARM_H
	38
	39	/*
	40	* High Level Configuration Options (easy to change)
	41	*/
	42	#define CONFIG_MARVELL
67fa8c25 HS	43	#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */
	44	#define CONFIG_KIRKWOOD /* SOC Family Name */
	45	#define CONFIG_KW88F6281 /* SOC Name */
802d9963	46	#define CONFIG_MACH_KM_KIRKWOOD /* Machine type */
67fa8c25 HS	47
	48	/* include common defines/options for all Keymile boards */
	49	#include "keymile-common.h"
de3ad13d	50
b5befd82 HB	51	#define CONFIG_CMD_NAND
	52	#define CONFIG_CMD_SF
	53	#define CONFIG_SOFT_I2C /* I2C bit-banged */
	54
	55	#include "asm/arch/config.h"
	56
731b9680	57	#define CONFIG_SYS_TEXT_BASE 0x04000000 /* code address after reloc */
de3ad13d HB	58	#define CONFIG_ENV_SIZE (128 << 10) /* NAND chip block size */
	59	#define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */
	60	#define CONFIG_SYS_MEMTEST_END 0x007fffff /(_8M -1) /
	61	#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
	62
	63	/* pseudo-non volatile RAM [hex] */
	64	#define CONFIG_KM_PNVRAM 0x80000
	65	/* physical RAM MTD size [hex] */
	66	#define CONFIG_KM_PHRAM 0x17F000
	67
	68	#define CONFIG_KM_CRAMFS_ADDR 0x2400000
	69	#define CONFIG_KM_KERNEL_ADDR 0x2000000 /* 4096KBytes */
	70
	71	#define CONFIG_KM_DEF_ENV_CPU \
22c67d08 VL	72	"addbootcount=" \
	73	"setenv bootargs ${bootargs} " \
	74	"bootcountaddr=${bootcountaddr}\0" \
de3ad13d HB	75	"addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0" \
de3ad13d HB	76	"boot=bootm ${actual_kernel_addr} - -\0" \
2d9528e3	77	"cramfsloadfdt=true\0" \
de3ad13d HB	78	CONFIG_KM_DEF_ENV_UPDATE \
	79	""
	80
2d9528e3	81	#define CONFIG_KM_ARCH_DBG_FILE "scripts/debug-arm-env.txt"
67fa8c25	82
67fa8c25	83	#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
67fa8c25 HS	84	#define CONFIG_MISC_INIT_R
	85
	86	/*
	87	* NS16550 Configuration
	88	*/
	89	#define CONFIG_SYS_NS16550
	90	#define CONFIG_SYS_NS16550_SERIAL
	91	#define CONFIG_SYS_NS16550_REG_SIZE (-4)
	92	#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
	93	#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE
3d3c7096	94	#define CONFIG_SYS_NS16550_COM2 KW_UART1_BASE
67fa8c25 HS	95
	96	/*
	97	* Serial Port configuration
	98	* The following definitions let you select what serial you want to use
	99	* for your console driver.
	100	*/
	101
	102	#define CONFIG_CONS_INDEX 1 /* Console on UART0 */
	103
	104	/*
	105	* For booting Linux, the board info and command line data
	106	* have to be in the first 8 MB of memory, since this is
	107	* the maximum mapped by the Linux kernel during initialization.
	108	*/
	109	#define CONFIG_BOOTMAPSZ (8 << 20) /* Initial Memmap for Linux */
	110	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	111	#define CONFIG_INITRD_TAG /* enable INITRD tag */
499b1a4d	112	#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
67fa8c25 HS	113
	114	/*
	115	* Commands configuration
	116	*/
	117	#define CONFIG_CMD_ELF
	118	#define CONFIG_CMD_MTDPARTS
67fa8c25 HS	119	#define CONFIG_CMD_NFS
	120
	121	/*
	122	* Without NOR FLASH we need this
	123	*/
	124	#define CONFIG_SYS_NO_FLASH
	125	#undef CONFIG_CMD_FLASH
	126	#undef CONFIG_CMD_IMLS
	127
	128	/*
	129	* NAND Flash configuration
	130	*/
	131	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	132	#define NAND_MAX_CHIPS 1
67fa8c25 HS	133
	134	#define BOOTFLASH_START 0x0
	135
3d3c7096 HB	136	/* Kirkwood has two serial IF */
	137	#if (CONFIG_CONS_INDEX == 2)
	138	#define CONFIG_KM_CONSOLE_TTY "ttyS1"
	139	#else
67fa8c25	140	#define CONFIG_KM_CONSOLE_TTY "ttyS0"
3d3c7096	141	#endif
67fa8c25	142
67fa8c25 HS	143	/*
	144	* Other required minimal configurations
	145	*/
	146	#define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */
	147	#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
	148	#define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */
	149	#define CONFIG_DISPLAY_CPUINFO /* Display cpu info */
	150	#define CONFIG_NR_DRAM_BANKS 4
	151	#define CONFIG_STACKSIZE 0x00100000 /* regular stack- 1M */
	152	#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
	153
	154	/*
	155	* Ethernet Driver configuration
	156	*/
	157	#define CONFIG_NETCONSOLE /* include NetConsole support */
	158	#define CONFIG_NET_MULTI /* specify more that one ports available */
	159	#define CONFIG_MII /* expose smi ove miiphy interface */
d44265ad	160	#define CONFIG_MVGBE /* Enable Marvell Gbe Controller Driver */
67fa8c25	161	#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */
d44265ad	162	#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */
67fa8c25 HS	163	#define CONFIG_PHY_BASE_ADR 0
	164	#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
	165	#define CONFIG_RESET_PHY_R /* use reset_phy() to init 88E1118 PHY */
	166
	167	/*
	168	* UBI related stuff
	169	*/
	170	#define CONFIG_SYS_USE_UBI
	171
	172	/*
	173	* I2C related stuff
	174	*/
67fa8c25 HS	175	#define CONFIG_KIRKWOOD_GPIO /* Enable GPIO Support */
	176	#if defined(CONFIG_SOFT_I2C)
	177	#ifndef __ASSEMBLY__
	178	#include <asm/arch-kirkwood/gpio.h>
	179	extern void __set_direction(unsigned pin, int high);
499b1a4d HB	180	void set_sda(int state);
	181	void set_scl(int state);
	182	int get_sda(void);
	183	int get_scl(void);
44097e26 HS	184	#define KM_KIRKWOOD_SDA_PIN 8
	185	#define KM_KIRKWOOD_SCL_PIN 9
	186	#define KM_KIRKWOOD_ENV_WP 38
	187
	188	#define I2C_ACTIVE __set_direction(KM_KIRKWOOD_SDA_PIN, 0)
	189	#define I2C_TRISTATE __set_direction(KM_KIRKWOOD_SDA_PIN, 1)
	190	#define I2C_READ (kw_gpio_get_value(KM_KIRKWOOD_SDA_PIN) ? 1 : 0)
	191	#define I2C_SDA(bit) kw_gpio_set_value(KM_KIRKWOOD_SDA_PIN, bit)
	192	#define I2C_SCL(bit) kw_gpio_set_value(KM_KIRKWOOD_SCL_PIN, bit)
67fa8c25 HS	193	#endif
	194
	195	#define I2C_DELAY udelay(3) /* 1/4 I2C clock duration */
	196	#define I2C_SOFT_DECLARATIONS
	197
67fa8c25 HS	198	#endif
	199
	200	#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
	201	#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
	202
331a30dc HS	203	/*
	204	* Environment variables configurations
	205	*/
	206	#define CONFIG_ENV_IS_IN_EEPROM /* use EEPROM for environment vars */
	207	#define CONFIG_SYS_DEF_EEPROM_ADDR 0x50
	208	#define CONFIG_ENV_EEPROM_IS_ON_I2C
	209	#define CONFIG_SYS_EEPROM_WREN
	210	#define CONFIG_ENV_OFFSET 0x0 /* no bracets! */
	211	#undef CONFIG_ENV_SIZE
	212	#define CONFIG_ENV_SIZE (0x2000 - CONFIG_ENV_OFFSET)
	213	#define CONFIG_I2C_ENV_EEPROM_BUS "pca9547:70:d\0"
	214
	215	/* offset redund: (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */
	216	#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
	217	#define CONFIG_ENV_OFFSET_REDUND 0x2000 /* no bracets! */
	218	#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
	219
331a30dc	220	#define CONFIG_SPI_FLASH
331a30dc	221	#define CONFIG_SPI_FLASH_STMICRO
331a30dc HS	222
	223	#define FLASH_GPIO_PIN 0x00010000
	224
	225	#define MTDIDS_DEFAULT "nand0=orion_nand"
	226	/* test-only: partitioning needs some tuning, this is just for tests */
	227	#define MTDPARTS_DEFAULT "mtdparts=" \
	228	"orion_nand:" \
	229	"-(" CONFIG_KM_UBI_PARTITION_NAME ")"
	230
	231	#define CONFIG_KM_DEF_ENV_UPDATE \
	232	"update=" \
	233	"spi on;sf probe 0;sf erase 0 50000;" \
	234	"sf write ${u-boot_addr_r} 0 ${filesize};" \
	235	"spi off\0"
	236
ea616d4d VL	237	/*
	238	* Default environment variables
	239	*/
	240	#define CONFIG_EXTRA_ENV_SETTINGS \
	241	CONFIG_KM_DEF_ENV \
	242	"newenv=setenv addr 0x100000 && " \
	243	"i2c dev 1; mw.b ${addr} 0 4 && " \
	244	"eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR) \
	245	" ${addr} " xstr(CONFIG_ENV_OFFSET) " 4 && " \
	246	"eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR) \
	247	" ${addr} " xstr(CONFIG_ENV_OFFSET_REDUND) " 4\0" \
	248	"rootpath=/opt/eldk/arm\0" \
	249	"EEprom_ivm=" KM_IVM_BUS "\0" \
	250	""
	251
67fa8c25 HS	252	#if defined(CONFIG_SYS_NO_FLASH)
	253	#define CONFIG_KM_UBI_PARTITION_NAME "ubi0"
	254	#undef CONFIG_FLASH_CFI_MTD
95e39793	255	#undef CONFIG_CMD_JFFS2
67fa8c25 HS	256	#undef CONFIG_JFFS2_CMDLINE
	257	#endif
	258
a784c01a	259	/* additions for new relocation code, must be added to all boards */
ab86f72c	260	#define CONFIG_SYS_SDRAM_BASE 0x00000000
6b0ccc3b HS	261	/* Do early setups now in board_init_f() */
6b0ccc3b HS	262	#define CONFIG_BOARD_EARLY_INIT_F
f1fef1d8 HS	263
	264	/*
	265	* resereved pram area at the end of memroy [hex]
	266	* 8Mbytes for switch + 4Kbytes for bootcount
	267	*/
	268	#define CONFIG_KM_RESERVED_PRAM 0x801000
a21b5d4b HB	269	/* address for the bootcount (taken from end of RAM) */
a21b5d4b HB	270	#define BOOTCOUNT_ADDR (CONFIG_KM_RESERVED_PRAM)
f1fef1d8	271
67fa8c25	272	#endif /* _CONFIG_KM_ARM_H */