[people/ms/u-boot.git] / include / configs / motionpro.h

/*
 * (C) Copyright 2003-2007
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * Based on Motion-PRO board config file by Robert McCullough, rob@promessinc.com
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * High Level Configuration Options
 */

/* CPU and board */
#define CONFIG_MPC5200		1	/* This is a MPC5200 CPU */
#define CONFIG_MOTIONPRO	1	/* ... on Promess Motion-PRO board */

#define CONFIG_HIGH_BATS	1	/* High BATs supported */

#define	CONFIG_SYS_TEXT_BASE	0xfff00000

/*
 * BOOTP options
 */
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME

/*
 * Command line configuration.
 */
#define CONFIG_CMD_DTT
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_IDE
#define CONFIG_CMD_IMMAP
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_REGINFO

/*
 * Serial console configuration
 */
#define CONFIG_PSC_CONSOLE	1	/* console is on PSC1 */
#define CONFIG_NETCONSOLE	1	/* network console */
#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }

/*
 * Ethernet configuration
 */
#define CONFIG_MPC5xxx_FEC	1
#define CONFIG_MPC5xxx_FEC_MII100
#define CONFIG_PHY_ADDR		0x2
#define CONFIG_PHY_TYPE		0x79c874
#define CONFIG_RESET_PHY_R	1

/*
 * Autobooting
 */
#undef CONFIG_BOOTARGS

#define CONFIG_CMDLINE_EDITING		1	/* add command line history	*/

/*
 * Default environment settings
 */
#define CONFIG_EXTRA_ENV_SETTINGS					\
	"netdev=eth0\0"							\
	"hostname=motionpro\0"						\
	"netmask=255.255.255.0\0"					\
	"ipaddr=192.168.1.106\0"					\
	"serverip=192.168.1.100\0"					\
	"gatewayip=192.168.1.100\0"					\
	"console=ttyPSC0,115200\0"					\
	"u-boot_addr=400000\0"						\
	"kernel_addr=400000\0"						\
	"fdt_addr=700000\0"						\
	"ramdisk_addr=800000\0"						\
	"multi_image_addr=800000\0"					\
	"rootpath=/opt/eldk-4.2/ppc_6xx\0"				\
	"u-boot=/tftpboot/motionpro/u-boot.bin\0"			\
	"bootfile=/tftpboot/motionpro/uImage\0"				\
	"fdt_file=/tftpboot/motionpro/motionpro.dtb\0"			\
	"ramdisk_file=/tftpboot/motionpro/uRamdisk\0"			\
	"multi_image_file=kernel+initrd+dtb.img\0"			\
	"load=tftp ${u-boot_addr} ${u-boot}\0"				\
	"update=prot off fff00000 +${filesize};"			\
		"era fff00000 +${filesize}; "				\
		"cp.b ${u-boot_addr} fff00000 ${filesize};"		\
		"prot on fff00000 +${filesize}\0"			\
	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
		"nfsroot=${serverip}:${rootpath}\0"			\
	"fat_args=setenv bootargs root=/dev/sda rw\0"			\
	"mtdids=nor0=ff000000.flash\0"					\
	"mtdparts=ff000000.flash:13m(fs),2m(kernel),384k(uboot)," 	\
				"128k(env),128k(redund_env),"	  	\
				"128k(dtb),128k(user_data)\0"		\
	"addcons=setenv bootargs ${bootargs} console=${console}\0"	\
	"addmtd=setenv bootargs ${bootargs} mtdparts=${mtdparts}\0"	\
	"addip=setenv bootargs ${bootargs} "				\
		"ip=${ipaddr}:${serverip}:${gatewayip}:"		\
		"${netmask}:${hostname}:${netdev}:off panic=1 "		\
		"console=${console}\0"					\
	"net_nfs=tftp ${kernel_addr} ${bootfile}; "			\
		"tftp ${fdt_addr} ${fdt_file}; "			\
		"run nfsargs addip addmtd; "				\
		"bootm ${kernel_addr} - ${fdt_addr}\0"			\
	"net_self=tftp ${kernel_addr} ${bootfile}; "			\
		"tftp ${fdt_addr} ${fdt_file}; "			\
		"tftp ${ramdisk_addr} ${ramdisk_file}; "		\
		"nfs ${ramdisk_addr} ${serverip}:${rootpath}/images/uRamdisk; "	\
		"run ramargs addip addcons addmtd; "			\
		"bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0"	\
	"fat_multi=run fat_args addip addmtd; fatload ide 0:1 "		\
		"${multi_image_addr} ${multi_image_file}; "		\
		"bootm ${multi_image_addr}\0"				\
	""
#define CONFIG_BOOTCOMMAND	"run fat_multi"

/*
 * do board-specific init
 */
#define CONFIG_BOARD_EARLY_INIT_R	1

/*
 * Low level configuration
 */

/*
 * Clock configuration: SYS_XTALIN = 33MHz
 */
#define CONFIG_SYS_MPC5XXX_CLKIN	33000000

/*
 * Set IPB speed to 100MHz
 */
#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK

/*
 * Memory map
 */
/*
 * Warning!!! with the current BestComm Task, MBAR MUST BE set to 0xf0000000.
 * Setting MBAR to otherwise will cause system hang when using SmartDMA such
 * as network commands.
 */
#define CONFIG_SYS_MBAR			0xf0000000
#define CONFIG_SYS_SDRAM_BASE		0x00000000

/*
 * If building for running out of SDRAM, then MBAR has been set up beforehand
 * (e.g., by the BDI). Otherwise we must specify the default boot-up value of
 * MBAR, as given in the doccumentation.
 */
#if CONFIG_SYS_TEXT_BASE == 0x00100000
#define CONFIG_SYS_DEFAULT_MBAR	0xf0000000
#else /* CONFIG_SYS_TEXT_BASE != 0x00100000 */
#define CONFIG_SYS_DEFAULT_MBAR	0x80000000
#define CONFIG_SYS_LOWBOOT		1
#endif /* CONFIG_SYS_TEXT_BASE == 0x00100000 */

/* Use SRAM until RAM will be available */
#define CONFIG_SYS_INIT_RAM_ADDR	MPC5XXX_SRAM
#define CONFIG_SYS_INIT_RAM_SIZE	MPC5XXX_SRAM_SIZE

#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET

#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
#define CONFIG_SYS_RAMBOOT		1
#endif

#define CONFIG_SYS_MONITOR_LEN		(384 << 10)	/* 384 kB for Monitor */
#define CONFIG_SYS_MALLOC_LEN		(1024 << 10)	/* 1 MiB for malloc() */
#define CONFIG_SYS_BOOTMAPSZ		(8 << 20)	/* initial mem map for Linux */

/*
 * Chip selects configuration
 */
/* Boot Chipselect */
#define CONFIG_SYS_BOOTCS_START	CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_BOOTCS_SIZE		CONFIG_SYS_FLASH_SIZE
#define CONFIG_SYS_BOOTCS_CFG		0x00045D00

/* Flash memory addressing */
#define CONFIG_SYS_CS0_START		CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_CS0_SIZE		CONFIG_SYS_FLASH_SIZE
#define CONFIG_SYS_CS0_CFG		CONFIG_SYS_BOOTCS_CFG

/* Dual Port SRAM -- Kollmorgen Drive memory addressing */
#define CONFIG_SYS_CS1_START		0x50000000
#define CONFIG_SYS_CS1_SIZE		0x10000
#define CONFIG_SYS_CS1_CFG		0x05055800

/* Local register access */
#define CONFIG_SYS_CS2_START		0x50010000
#define CONFIG_SYS_CS2_SIZE		0x10000
#define CONFIG_SYS_CS2_CFG		0x05055800

/* Anybus CompactCom Module memory addressing */
#define CONFIG_SYS_CS3_START		0x50020000
#define CONFIG_SYS_CS3_SIZE		0x10000
#define CONFIG_SYS_CS3_CFG		0x05055800

/* No burst and dead cycle = 2 for all CSs */
#define CONFIG_SYS_CS_BURST		0x00000000
#define CONFIG_SYS_CS_DEADCYCLE	0x22222222

/*
 * SDRAM configuration
 */
/* 2 x MT48LC16M16A2BG-75 IT:D, CASL 3, 32 bit data bus */
#define SDRAM_CONFIG1		0x62322900
#define SDRAM_CONFIG2		0x88c70000
#define SDRAM_CONTROL		0x504f0000
#define SDRAM_MODE		0x00cd0000

/*
 * Flash configuration
 */
#define CONFIG_SYS_FLASH_CFI		1	/* Flash is CFI conformant */
#define CONFIG_FLASH_CFI_DRIVER	1
#define CONFIG_SYS_FLASH_BASE		0xff000000
#define CONFIG_SYS_FLASH_SIZE		0x01000000
#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max num of memory banks */
#define CONFIG_SYS_FLASH_BANKS_LIST	{ CONFIG_SYS_FLASH_BASE }
#define CONFIG_SYS_MAX_FLASH_SECT	128	/* max num of sects on one chip */
#define CONFIG_FLASH_16BIT		/* Flash is 16-bit */

/*
 * MTD configuration
 */
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_DEVICE		/* needed for mtdparts commands */
#define CONFIG_FLASH_CFI_MTD
#define MTDIDS_DEFAULT		"nor0=motionpro-0"
#define MTDPARTS_DEFAULT	"mtdparts=motionpro-0:"			  \
					"13m(fs),2m(kernel),384k(uboot)," \
					"128k(env),128k(redund_env),"	  \
					"128k(dtb),-(user_data)"

/*
 * IDE/ATA configuration
 */
#define CONFIG_SYS_ATA_BASE_ADDR	MPC5XXX_ATA
#define CONFIG_SYS_IDE_MAXBUS		1
#define CONFIG_SYS_IDE_MAXDEVICE	1
#define CONFIG_IDE_PREINIT

#define CONFIG_SYS_ATA_DATA_OFFSET	0x0060
#define CONFIG_SYS_ATA_REG_OFFSET	CONFIG_SYS_ATA_DATA_OFFSET
#define CONFIG_SYS_ATA_STRIDE		4

/*
 * I2C configuration
 */
#define CONFIG_HARD_I2C		1	/* I2C with hardware support */
#define CONFIG_SYS_I2C_MODULE		2	/* select I2C module #2 */
#define CONFIG_SYS_I2C_SPEED		100000	/* 100 kHz */
#define CONFIG_SYS_I2C_SLAVE		0x7F

/*
 * EEPROM configuration
 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	1	/* 2 bytes per write cycle */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5	/* 2ms/cycle + 3ms extra */

/*
 * RTC configuration
 */
#define CONFIG_RTC_DS1337	1
#define CONFIG_SYS_I2C_RTC_ADDR	0x68

/*
 * Status LED configuration
 */

#define ENABLE_GPIO_OUT		0x00000024
#define LED_ON			0x00000010

/*
 * Temperature sensor
 */
#define CONFIG_DTT_LM75		1
#define CONFIG_DTT_SENSORS	{ 0x49 }

/*
 * Environment settings
 */
#define CONFIG_ENV_IS_IN_FLASH	1
/* This has to be a multiple of the Flash sector size */
#define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
#define CONFIG_ENV_SIZE		0x1000
#define CONFIG_ENV_SECT_SIZE	0x20000

/* Configuration of redundant environment */
#define CONFIG_ENV_ADDR_REDUND	(CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
#define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SIZE)

/*
 * Pin multiplexing configuration
 */

/* PSC1: UART1
 * PSC2: GPIO (default)
 * PSC3: GPIO (default)
 * USB: 2xUART4/5
 * Ethernet: Ethernet 100Mbit with MD
 * Timer: CAN2/GPIO
 * PSC6/IRDA: GPIO (default)
 */
#define CONFIG_SYS_GPS_PORT_CONFIG	0x1105a004

/*
 * Motion-PRO's CPLD revision control register
 */
#define CPLD_REV_REGISTER	(CONFIG_SYS_CS2_START + 0x06)

/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_LONGHELP			/* undef to save memory    */
#define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)	/* Print Buffer Size */
#define CONFIG_SYS_MAXARGS		16		/* max number of command args */
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size */

#define CONFIG_SYS_MEMTEST_START	0x00100000	/* memtest works on */
#define CONFIG_SYS_MEMTEST_END		0x03e00000	/* 1 ... 62 MiB in DRAM */
#define CONFIG_SYS_ALT_MEMTEST

#define CONFIG_SYS_LOAD_ADDR		0x200000	/* default kernel load addr */

/*
 * Various low-level settings
 */
#define CONFIG_SYS_HID0_INIT		HID0_ICE | HID0_ICFI
#define CONFIG_SYS_HID0_FINAL		HID0_ICE

#define CONFIG_SYS_CACHELINE_SIZE	32	/* For MPC5xxx CPUs */

/* Not needed for MPC 5xxx U-Boot, but used by tools/updater */
#define CONFIG_SYS_RESET_ADDRESS	0xfff00100

#define OF_CPU			"PowerPC,5200@0"
#define OF_SOC			"soc5200@f0000000"
#define OF_TBCLK		(bd->bi_busfreq / 4)
#define OF_STDOUT_PATH		"/soc5200@f0000000/serial@2000"

#endif /* __CONFIG_H */
Commit	Line	Data
53d4a498 BS	1	/*
	2	* (C) Copyright 2003-2007
	3	* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
	4	*
0ffb941c	5	* Based on Motion-PRO board config file by Robert McCullough, rob@promessinc.com
53d4a498	6	*
3765b3e7	7	* SPDX-License-Identifier: GPL-2.0+
53d4a498 BS	8	*/
	9
	10	#ifndef __CONFIG_H
	11	#define __CONFIG_H
	12
53d4a498 BS	13	/*
	14	* High Level Configuration Options
	15	*/
	16
53d4a498	17	/* CPU and board */
b2a6dfe4	18	#define CONFIG_MPC5200 1 /* This is a MPC5200 CPU */
53d4a498 BS	19	#define CONFIG_MOTIONPRO 1 /* ... on Promess Motion-PRO board */
53d4a498 BS	20
31d82672	21	#define CONFIG_HIGH_BATS 1 /* High BATs supported */
53d4a498	22
2ae18241 WD	23	#define CONFIG_SYS_TEXT_BASE 0xfff00000
2ae18241 WD	24
079a136c JL	25	/*
	26	* BOOTP options
	27	*/
	28	#define CONFIG_BOOTP_BOOTFILESIZE
	29	#define CONFIG_BOOTP_BOOTPATH
	30	#define CONFIG_BOOTP_GATEWAY
	31	#define CONFIG_BOOTP_HOSTNAME
	32
53d4a498	33	/*
5dc11a51	34	* Command line configuration.
53d4a498	35	*/
7a8ddeea WD	36	#define CONFIG_CMD_DTT
7a8ddeea WD	37	#define CONFIG_CMD_EEPROM
7a8ddeea WD	38	#define CONFIG_CMD_IDE
	39	#define CONFIG_CMD_IMMAP
	40	#define CONFIG_CMD_JFFS2
7a8ddeea	41	#define CONFIG_CMD_REGINFO
53d4a498 BS	42
	43	/*
	44	* Serial console configuration
	45	*/
	46	#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
	47	#define CONFIG_NETCONSOLE 1 /* network console */
6d0f6bcf	48	#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
53d4a498	49
53d4a498 BS	50	/*
	51	* Ethernet configuration
	52	*/
	53	#define CONFIG_MPC5xxx_FEC 1
86321fc1	54	#define CONFIG_MPC5xxx_FEC_MII100
53d4a498 BS	55	#define CONFIG_PHY_ADDR 0x2
53d4a498 BS	56	#define CONFIG_PHY_TYPE 0x79c874
c00125e0	57	#define CONFIG_RESET_PHY_R 1
53d4a498 BS	58
	59	/*
	60	* Autobooting
	61	*/
53d4a498	62	#undef CONFIG_BOOTARGS
53d4a498	63
7a8ddeea	64	#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
7a8ddeea	65
53d4a498 BS	66	/*
	67	* Default environment settings
	68	*/
	69	#define CONFIG_EXTRA_ENV_SETTINGS \
53d4a498 BS	70	"netdev=eth0\0" \
53d4a498 BS	71	"hostname=motionpro\0" \
0ffb941c WG	72	"netmask=255.255.255.0\0" \
	73	"ipaddr=192.168.1.106\0" \
	74	"serverip=192.168.1.100\0" \
	75	"gatewayip=192.168.1.100\0" \
1f1369c3	76	"console=ttyPSC0,115200\0" \
7a8ddeea WD	77	"u-boot_addr=400000\0" \
	78	"kernel_addr=400000\0" \
	79	"fdt_addr=700000\0" \
	80	"ramdisk_addr=800000\0" \
fa5c2ba1	81	"multi_image_addr=800000\0" \
0ffb941c WG	82	"rootpath=/opt/eldk-4.2/ppc_6xx\0" \
	83	"u-boot=/tftpboot/motionpro/u-boot.bin\0" \
	84	"bootfile=/tftpboot/motionpro/uImage\0" \
	85	"fdt_file=/tftpboot/motionpro/motionpro.dtb\0" \
	86	"ramdisk_file=/tftpboot/motionpro/uRamdisk\0" \
fa5c2ba1	87	"multi_image_file=kernel+initrd+dtb.img\0" \
7049288f	88	"load=tftp ${u-boot_addr} ${u-boot}\0" \
7a8ddeea WD	89	"update=prot off fff00000 +${filesize};" \
7a8ddeea WD	90	"era fff00000 +${filesize}; " \
7049288f	91	"cp.b ${u-boot_addr} fff00000 ${filesize};" \
7a8ddeea	92	"prot on fff00000 +${filesize}\0" \
53d4a498	93	"ramargs=setenv bootargs root=/dev/ram rw\0" \
53d4a498	94	"nfsargs=setenv bootargs root=/dev/nfs rw " \
7049288f	95	"nfsroot=${serverip}:${rootpath}\0" \
0ffb941c WG	96	"fat_args=setenv bootargs root=/dev/sda rw\0" \
	97	"mtdids=nor0=ff000000.flash\0" \
	98	"mtdparts=ff000000.flash:13m(fs),2m(kernel),384k(uboot)," \
	99	"128k(env),128k(redund_env)," \
	100	"128k(dtb),128k(user_data)\0" \
	101	"addcons=setenv bootargs ${bootargs} console=${console}\0" \
	102	"addmtd=setenv bootargs ${bootargs} mtdparts=${mtdparts}\0" \
7049288f BS	103	"addip=setenv bootargs ${bootargs} " \
	104	"ip=${ipaddr}:${serverip}:${gatewayip}:" \
	105	"${netmask}:${hostname}:${netdev}:off panic=1 " \
	106	"console=${console}\0" \
	107	"net_nfs=tftp ${kernel_addr} ${bootfile}; " \
0ffb941c WG	108	"tftp ${fdt_addr} ${fdt_file}; " \
0ffb941c WG	109	"run nfsargs addip addmtd; " \
7049288f BS	110	"bootm ${kernel_addr} - ${fdt_addr}\0" \
	111	"net_self=tftp ${kernel_addr} ${bootfile}; " \
	112	"tftp ${fdt_addr} ${fdt_file}; " \
	113	"tftp ${ramdisk_addr} ${ramdisk_file}; " \
0ffb941c WG	114	"nfs ${ramdisk_addr} ${serverip}:${rootpath}/images/uRamdisk; " \
0ffb941c WG	115	"run ramargs addip addcons addmtd; " \
7049288f	116	"bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
0ffb941c	117	"fat_multi=run fat_args addip addmtd; fatload ide 0:1 " \
fa5c2ba1 BS	118	"${multi_image_addr} ${multi_image_file}; " \
fa5c2ba1 BS	119	"bootm ${multi_image_addr}\0" \
53d4a498	120	""
0ffb941c	121	#define CONFIG_BOOTCOMMAND "run fat_multi"
53d4a498	122
53d4a498 BS	123	/*
	124	* do board-specific init
	125	*/
	126	#define CONFIG_BOARD_EARLY_INIT_R 1
	127
53d4a498 BS	128	/*
	129	* Low level configuration
	130	*/
	131
53d4a498	132	/*
d3afa1ee	133	* Clock configuration: SYS_XTALIN = 33MHz
53d4a498	134	*/
6d0f6bcf	135	#define CONFIG_SYS_MPC5XXX_CLKIN 33000000
53d4a498	136
06241d50	137	/*
c99512d6	138	* Set IPB speed to 100MHz
06241d50	139	*/
6d0f6bcf	140	#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK
06241d50	141
53d4a498 BS	142	/*
	143	* Memory map
	144	*/
	145	/*
	146	* Warning!!! with the current BestComm Task, MBAR MUST BE set to 0xf0000000.
	147	* Setting MBAR to otherwise will cause system hang when using SmartDMA such
	148	* as network commands.
	149	*/
7a8ddeea	150	#define CONFIG_SYS_MBAR 0xf0000000
6d0f6bcf	151	#define CONFIG_SYS_SDRAM_BASE 0x00000000
53d4a498 BS	152
	153	/*
	154	* If building for running out of SDRAM, then MBAR has been set up beforehand
	155	* (e.g., by the BDI). Otherwise we must specify the default boot-up value of
	156	* MBAR, as given in the doccumentation.
	157	*/
14d0a02a	158	#if CONFIG_SYS_TEXT_BASE == 0x00100000
6d0f6bcf	159	#define CONFIG_SYS_DEFAULT_MBAR 0xf0000000
14d0a02a	160	#else /* CONFIG_SYS_TEXT_BASE != 0x00100000 */
6d0f6bcf JCPV	161	#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
6d0f6bcf JCPV	162	#define CONFIG_SYS_LOWBOOT 1
14d0a02a	163	#endif /* CONFIG_SYS_TEXT_BASE == 0x00100000 */
53d4a498 BS	164
53d4a498 BS	165	/* Use SRAM until RAM will be available */
6d0f6bcf	166	#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
553f0982	167	#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE
53d4a498	168
25ddd1fb	169	#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
6d0f6bcf	170	#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
53d4a498	171
14d0a02a	172	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
6d0f6bcf JCPV	173	#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
6d0f6bcf JCPV	174	#define CONFIG_SYS_RAMBOOT 1
53d4a498 BS	175	#endif
53d4a498 BS	176
0ffb941c	177	#define CONFIG_SYS_MONITOR_LEN (384 << 10) /* 384 kB for Monitor */
6d0f6bcf JCPV	178	#define CONFIG_SYS_MALLOC_LEN (1024 << 10) /* 1 MiB for malloc() */
6d0f6bcf JCPV	179	#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* initial mem map for Linux */
53d4a498	180
53d4a498 BS	181	/*
	182	* Chip selects configuration
	183	*/
	184	/* Boot Chipselect */
6d0f6bcf JCPV	185	#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
	186	#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
	187	#define CONFIG_SYS_BOOTCS_CFG 0x00045D00
53d4a498 BS	188
53d4a498 BS	189	/* Flash memory addressing */
6d0f6bcf JCPV	190	#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
	191	#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
	192	#define CONFIG_SYS_CS0_CFG CONFIG_SYS_BOOTCS_CFG
53d4a498 BS	193
53d4a498 BS	194	/* Dual Port SRAM -- Kollmorgen Drive memory addressing */
6d0f6bcf JCPV	195	#define CONFIG_SYS_CS1_START 0x50000000
	196	#define CONFIG_SYS_CS1_SIZE 0x10000
	197	#define CONFIG_SYS_CS1_CFG 0x05055800
53d4a498 BS	198
53d4a498 BS	199	/* Local register access */
6d0f6bcf JCPV	200	#define CONFIG_SYS_CS2_START 0x50010000
	201	#define CONFIG_SYS_CS2_SIZE 0x10000
	202	#define CONFIG_SYS_CS2_CFG 0x05055800
53d4a498 BS	203
53d4a498 BS	204	/* Anybus CompactCom Module memory addressing */
6d0f6bcf JCPV	205	#define CONFIG_SYS_CS3_START 0x50020000
	206	#define CONFIG_SYS_CS3_SIZE 0x10000
	207	#define CONFIG_SYS_CS3_CFG 0x05055800
53d4a498 BS	208
53d4a498 BS	209	/* No burst and dead cycle = 2 for all CSs */
6d0f6bcf JCPV	210	#define CONFIG_SYS_CS_BURST 0x00000000
6d0f6bcf JCPV	211	#define CONFIG_SYS_CS_DEADCYCLE 0x22222222
53d4a498	212
53d4a498 BS	213	/*
	214	* SDRAM configuration
	215	*/
d3afa1ee BS	216	/* 2 x MT48LC16M16A2BG-75 IT:D, CASL 3, 32 bit data bus */
	217	#define SDRAM_CONFIG1 0x62322900
	218	#define SDRAM_CONFIG2 0x88c70000
	219	#define SDRAM_CONTROL 0x504f0000
	220	#define SDRAM_MODE 0x00cd0000
53d4a498	221
53d4a498 BS	222	/*
	223	* Flash configuration
	224	*/
6d0f6bcf	225	#define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */
00b1883a	226	#define CONFIG_FLASH_CFI_DRIVER 1
6d0f6bcf JCPV	227	#define CONFIG_SYS_FLASH_BASE 0xff000000
	228	#define CONFIG_SYS_FLASH_SIZE 0x01000000
	229	#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
	230	#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
	231	#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max num of sects on one chip */
53d4a498 BS	232	#define CONFIG_FLASH_16BIT /* Flash is 16-bit */
53d4a498 BS	233
7d98ba77 PK	234	/*
	235	* MTD configuration
	236	*/
68d7d651	237	#define CONFIG_CMD_MTDPARTS
942556a9 SR	238	#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
942556a9 SR	239	#define CONFIG_FLASH_CFI_MTD
7d98ba77 PK	240	#define MTDIDS_DEFAULT "nor0=motionpro-0"
7d98ba77 PK	241	#define MTDPARTS_DEFAULT "mtdparts=motionpro-0:" \
0ffb941c	242	"13m(fs),2m(kernel),384k(uboot)," \
d3afa1ee BS	243	"128k(env),128k(redund_env)," \
d3afa1ee BS	244	"128k(dtb),-(user_data)"
53d4a498	245
fa5c2ba1 BS	246	/*
	247	* IDE/ATA configuration
	248	*/
6d0f6bcf JCPV	249	#define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA
	250	#define CONFIG_SYS_IDE_MAXBUS 1
	251	#define CONFIG_SYS_IDE_MAXDEVICE 1
fa5c2ba1 BS	252	#define CONFIG_IDE_PREINIT
fa5c2ba1 BS	253
6d0f6bcf JCPV	254	#define CONFIG_SYS_ATA_DATA_OFFSET 0x0060
	255	#define CONFIG_SYS_ATA_REG_OFFSET CONFIG_SYS_ATA_DATA_OFFSET
	256	#define CONFIG_SYS_ATA_STRIDE 4
fa5c2ba1	257
de1de02a PK	258	/*
	259	* I2C configuration
	260	*/
	261	#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
6d0f6bcf JCPV	262	#define CONFIG_SYS_I2C_MODULE 2 /* select I2C module #2 */
	263	#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
	264	#define CONFIG_SYS_I2C_SLAVE 0x7F
de1de02a	265
de1de02a PK	266	/*
	267	* EEPROM configuration
	268	*/
6d0f6bcf JCPV	269	#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
	270	#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 1 /* 2 bytes per write cycle */
	271	#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 /* 2ms/cycle + 3ms extra */
de1de02a	272
de1de02a PK	273	/*
	274	* RTC configuration
	275	*/
	276	#define CONFIG_RTC_DS1337 1
6d0f6bcf	277	#define CONFIG_SYS_I2C_RTC_ADDR 0x68
de1de02a	278
a11c0b85 BS	279	/*
	280	* Status LED configuration
	281	*/
a11c0b85 BS	282
	283	#define ENABLE_GPIO_OUT 0x00000024
	284	#define LED_ON 0x00000010
	285
93b78f53 BS	286	/*
	287	* Temperature sensor
	288	*/
	289	#define CONFIG_DTT_LM75 1
	290	#define CONFIG_DTT_SENSORS { 0x49 }
	291
53d4a498 BS	292	/*
	293	* Environment settings
	294	*/
5a1aceb0	295	#define CONFIG_ENV_IS_IN_FLASH 1
53d4a498	296	/* This has to be a multiple of the Flash sector size */
6d0f6bcf	297	#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
0e8d1586 JCPV	298	#define CONFIG_ENV_SIZE 0x1000
0e8d1586 JCPV	299	#define CONFIG_ENV_SECT_SIZE 0x20000
53d4a498	300
4520fd4d	301	/* Configuration of redundant environment */
0e8d1586 JCPV	302	#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
0e8d1586 JCPV	303	#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
53d4a498 BS	304
	305	/*
	306	* Pin multiplexing configuration
	307	*/
	308
	309	/* PSC1: UART1
	310	* PSC2: GPIO (default)
	311	* PSC3: GPIO (default)
	312	* USB: 2xUART4/5
	313	* Ethernet: Ethernet 100Mbit with MD
	314	* Timer: CAN2/GPIO
	315	* PSC6/IRDA: GPIO (default)
	316	*/
6d0f6bcf	317	#define CONFIG_SYS_GPS_PORT_CONFIG 0x1105a004
53d4a498	318
c75e6396 BS	319	/*
	320	* Motion-PRO's CPLD revision control register
	321	*/
6d0f6bcf	322	#define CPLD_REV_REGISTER (CONFIG_SYS_CS2_START + 0x06)
c75e6396	323
53d4a498 BS	324	/*
	325	* Miscellaneous configurable options
	326	*/
6d0f6bcf	327	#define CONFIG_SYS_LONGHELP /* undef to save memory */
6d0f6bcf JCPV	328	#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
	329	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
	330	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	331	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
53d4a498	332
6d0f6bcf JCPV	333	#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
	334	#define CONFIG_SYS_MEMTEST_END 0x03e00000 /* 1 ... 62 MiB in DRAM */
	335	#define CONFIG_SYS_ALT_MEMTEST
53d4a498	336
6d0f6bcf	337	#define CONFIG_SYS_LOAD_ADDR 0x200000 /* default kernel load addr */
53d4a498	338
53d4a498 BS	339	/*
	340	* Various low-level settings
	341	*/
6d0f6bcf JCPV	342	#define CONFIG_SYS_HID0_INIT HID0_ICE \| HID0_ICFI
6d0f6bcf JCPV	343	#define CONFIG_SYS_HID0_FINAL HID0_ICE
53d4a498	344
6d0f6bcf	345	#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
53d4a498	346
53d4a498	347	/* Not needed for MPC 5xxx U-Boot, but used by tools/updater */
6d0f6bcf	348	#define CONFIG_SYS_RESET_ADDRESS 0xfff00100
53d4a498	349
1f1369c3 BS	350	#define OF_CPU "PowerPC,5200@0"
	351	#define OF_SOC "soc5200@f0000000"
	352	#define OF_TBCLK (bd->bi_busfreq / 4)
7049288f	353	#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
1f1369c3	354
53d4a498	355	#endif /* __CONFIG_H */